1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
3; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s \
4; RUN:   -check-prefix=P9
5; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
6; RUN:   -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s \
7; RUN:   -check-prefix=P8
8; RUN: llc -mcpu=pwr7 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
9; RUN:   -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s \
10; RUN:   -check-prefix=P7
11; RUN: llc -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
12; RUN:   -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s \
13; RUN:   -check-prefix=P9-AIX32
14; RUN: llc -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
15; RUN:   -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s \
16; RUN:   -check-prefix=P8-AIX32
17; RUN: llc -mcpu=pwr7 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
18; RUN:   -mtriple=powerpc-ibm-aix-xcoff < %s | FileCheck %s \
19; RUN:   -check-prefix=P7-AIX32
20
21; v2f64
22define dso_local void @test(<2 x double>* nocapture %c, double* nocapture readonly %a) local_unnamed_addr {
23; P9-LABEL: test:
24; P9:       # %bb.0: # %entry
25; P9-NEXT:    addi r4, r4, 24
26; P9-NEXT:    lxvdsx vs0, 0, r4
27; P9-NEXT:    stxv vs0, 0(r3)
28; P9-NEXT:    blr
29;
30; P8-LABEL: test:
31; P8:       # %bb.0: # %entry
32; P8-NEXT:    addi r4, r4, 24
33; P8-NEXT:    lxvdsx vs0, 0, r4
34; P8-NEXT:    stxvd2x vs0, 0, r3
35; P8-NEXT:    blr
36;
37; P7-LABEL: test:
38; P7:       # %bb.0: # %entry
39; P7-NEXT:    addi r4, r4, 24
40; P7-NEXT:    lxvdsx vs0, 0, r4
41; P7-NEXT:    stxvd2x vs0, 0, r3
42; P7-NEXT:    blr
43;
44; P9-AIX32-LABEL: test:
45; P9-AIX32:       # %bb.0: # %entry
46; P9-AIX32-NEXT:    addi r4, r4, 24
47; P9-AIX32-NEXT:    lxvdsx vs0, 0, r4
48; P9-AIX32-NEXT:    stxv vs0, 0(r3)
49; P9-AIX32-NEXT:    blr
50;
51; P8-AIX32-LABEL: test:
52; P8-AIX32:       # %bb.0: # %entry
53; P8-AIX32-NEXT:    addi r4, r4, 24
54; P8-AIX32-NEXT:    lxvdsx vs0, 0, r4
55; P8-AIX32-NEXT:    stxvd2x vs0, 0, r3
56; P8-AIX32-NEXT:    blr
57;
58; P7-AIX32-LABEL: test:
59; P7-AIX32:       # %bb.0: # %entry
60; P7-AIX32-NEXT:    addi r4, r4, 24
61; P7-AIX32-NEXT:    lxvdsx vs0, 0, r4
62; P7-AIX32-NEXT:    stxvd2x vs0, 0, r3
63; P7-AIX32-NEXT:    blr
64entry:
65  %arrayidx = getelementptr inbounds double, double* %a, i64 3
66  %0 = load double, double* %arrayidx, align 8
67  %splat.splatinsert.i = insertelement <2 x double> undef, double %0, i32 0
68  %splat.splat.i = shufflevector <2 x double> %splat.splatinsert.i, <2 x double> undef, <2 x i32> zeroinitializer
69  store <2 x double> %splat.splat.i, <2 x double>* %c, align 16
70  ret void
71}
72
73; v4f32
74define dso_local void @test2(<4 x float>* nocapture %c, float* nocapture readonly %a) local_unnamed_addr {
75; P9-LABEL: test2:
76; P9:       # %bb.0: # %entry
77; P9-NEXT:    addi r4, r4, 12
78; P9-NEXT:    lxvwsx vs0, 0, r4
79; P9-NEXT:    stxv vs0, 0(r3)
80; P9-NEXT:    blr
81;
82; P8-LABEL: test2:
83; P8:       # %bb.0: # %entry
84; P8-NEXT:    addi r4, r4, 12
85; P8-NEXT:    lfiwzx f0, 0, r4
86; P8-NEXT:    xxspltw v2, vs0, 1
87; P8-NEXT:    stvx v2, 0, r3
88; P8-NEXT:    blr
89;
90; P7-LABEL: test2:
91; P7:       # %bb.0: # %entry
92; P7-NEXT:    addi r4, r4, 12
93; P7-NEXT:    lfiwzx f0, 0, r4
94; P7-NEXT:    xxspltw vs0, vs0, 1
95; P7-NEXT:    stxvw4x vs0, 0, r3
96; P7-NEXT:    blr
97;
98; P9-AIX32-LABEL: test2:
99; P9-AIX32:       # %bb.0: # %entry
100; P9-AIX32-NEXT:    addi r4, r4, 12
101; P9-AIX32-NEXT:    lxvwsx vs0, 0, r4
102; P9-AIX32-NEXT:    stxv vs0, 0(r3)
103; P9-AIX32-NEXT:    blr
104;
105; P8-AIX32-LABEL: test2:
106; P8-AIX32:       # %bb.0: # %entry
107; P8-AIX32-NEXT:    addi r4, r4, 12
108; P8-AIX32-NEXT:    lfiwzx f0, 0, r4
109; P8-AIX32-NEXT:    xxspltw vs0, vs0, 1
110; P8-AIX32-NEXT:    stxvw4x vs0, 0, r3
111; P8-AIX32-NEXT:    blr
112;
113; P7-AIX32-LABEL: test2:
114; P7-AIX32:       # %bb.0: # %entry
115; P7-AIX32-NEXT:    addi r4, r4, 12
116; P7-AIX32-NEXT:    lfiwzx f0, 0, r4
117; P7-AIX32-NEXT:    xxspltw vs0, vs0, 1
118; P7-AIX32-NEXT:    stxvw4x vs0, 0, r3
119; P7-AIX32-NEXT:    blr
120entry:
121  %arrayidx = getelementptr inbounds float, float* %a, i64 3
122  %0 = load float, float* %arrayidx, align 4
123  %splat.splatinsert.i = insertelement <4 x float> undef, float %0, i32 0
124  %splat.splat.i = shufflevector <4 x float> %splat.splatinsert.i, <4 x float> undef, <4 x i32> zeroinitializer
125  store <4 x float> %splat.splat.i, <4 x float>* %c, align 16
126  ret void
127}
128
129; v4i32
130define dso_local void @test3(<4 x i32>* nocapture %c, i32* nocapture readonly %a) local_unnamed_addr {
131; P9-LABEL: test3:
132; P9:       # %bb.0: # %entry
133; P9-NEXT:    addi r4, r4, 12
134; P9-NEXT:    lxvwsx vs0, 0, r4
135; P9-NEXT:    stxv vs0, 0(r3)
136; P9-NEXT:    blr
137;
138; P8-LABEL: test3:
139; P8:       # %bb.0: # %entry
140; P8-NEXT:    addi r4, r4, 12
141; P8-NEXT:    lfiwzx f0, 0, r4
142; P8-NEXT:    xxspltw v2, vs0, 1
143; P8-NEXT:    stvx v2, 0, r3
144; P8-NEXT:    blr
145;
146; P7-LABEL: test3:
147; P7:       # %bb.0: # %entry
148; P7-NEXT:    addi r4, r4, 12
149; P7-NEXT:    lfiwzx f0, 0, r4
150; P7-NEXT:    xxspltw vs0, vs0, 1
151; P7-NEXT:    stxvw4x vs0, 0, r3
152; P7-NEXT:    blr
153;
154; P9-AIX32-LABEL: test3:
155; P9-AIX32:       # %bb.0: # %entry
156; P9-AIX32-NEXT:    addi r4, r4, 12
157; P9-AIX32-NEXT:    lxvwsx vs0, 0, r4
158; P9-AIX32-NEXT:    stxv vs0, 0(r3)
159; P9-AIX32-NEXT:    blr
160;
161; P8-AIX32-LABEL: test3:
162; P8-AIX32:       # %bb.0: # %entry
163; P8-AIX32-NEXT:    addi r4, r4, 12
164; P8-AIX32-NEXT:    lfiwzx f0, 0, r4
165; P8-AIX32-NEXT:    xxspltw vs0, vs0, 1
166; P8-AIX32-NEXT:    stxvw4x vs0, 0, r3
167; P8-AIX32-NEXT:    blr
168;
169; P7-AIX32-LABEL: test3:
170; P7-AIX32:       # %bb.0: # %entry
171; P7-AIX32-NEXT:    addi r4, r4, 12
172; P7-AIX32-NEXT:    lfiwzx f0, 0, r4
173; P7-AIX32-NEXT:    xxspltw vs0, vs0, 1
174; P7-AIX32-NEXT:    stxvw4x vs0, 0, r3
175; P7-AIX32-NEXT:    blr
176entry:
177  %arrayidx = getelementptr inbounds i32, i32* %a, i64 3
178  %0 = load i32, i32* %arrayidx, align 4
179  %splat.splatinsert.i = insertelement <4 x i32> undef, i32 %0, i32 0
180  %splat.splat.i = shufflevector <4 x i32> %splat.splatinsert.i, <4 x i32> undef, <4 x i32> zeroinitializer
181  store <4 x i32> %splat.splat.i, <4 x i32>* %c, align 16
182  ret void
183}
184
185
186; v2i64
187define dso_local void @test4(<2 x i64>* nocapture %c, i64* nocapture readonly %a) local_unnamed_addr {
188; P9-LABEL: test4:
189; P9:       # %bb.0: # %entry
190; P9-NEXT:    addi r4, r4, 24
191; P9-NEXT:    lxvdsx vs0, 0, r4
192; P9-NEXT:    stxv vs0, 0(r3)
193; P9-NEXT:    blr
194;
195; P8-LABEL: test4:
196; P8:       # %bb.0: # %entry
197; P8-NEXT:    addi r4, r4, 24
198; P8-NEXT:    lxvdsx vs0, 0, r4
199; P8-NEXT:    stxvd2x vs0, 0, r3
200; P8-NEXT:    blr
201;
202; P7-LABEL: test4:
203; P7:       # %bb.0: # %entry
204; P7-NEXT:    addi r4, r4, 24
205; P7-NEXT:    lxvdsx vs0, 0, r4
206; P7-NEXT:    stxvd2x vs0, 0, r3
207; P7-NEXT:    blr
208;
209; P9-AIX32-LABEL: test4:
210; P9-AIX32:       # %bb.0: # %entry
211; P9-AIX32-NEXT:    lwz r5, 24(r4)
212; P9-AIX32-NEXT:    lwz r4, 28(r4)
213; P9-AIX32-NEXT:    stw r4, -16(r1)
214; P9-AIX32-NEXT:    lwz r4, L..C0(r2) # %const.0
215; P9-AIX32-NEXT:    stw r5, -32(r1)
216; P9-AIX32-NEXT:    lxv v3, -16(r1)
217; P9-AIX32-NEXT:    lxv v4, -32(r1)
218; P9-AIX32-NEXT:    lxv v2, 0(r4)
219; P9-AIX32-NEXT:    vperm v2, v4, v3, v2
220; P9-AIX32-NEXT:    stxv v2, 0(r3)
221; P9-AIX32-NEXT:    blr
222;
223; P8-AIX32-LABEL: test4:
224; P8-AIX32:       # %bb.0: # %entry
225; P8-AIX32-NEXT:    lwz r5, L..C0(r2) # %const.0
226; P8-AIX32-NEXT:    lwz r6, 28(r4)
227; P8-AIX32-NEXT:    lwz r4, 24(r4)
228; P8-AIX32-NEXT:    stw r6, -16(r1)
229; P8-AIX32-NEXT:    stw r4, -32(r1)
230; P8-AIX32-NEXT:    addi r4, r1, -16
231; P8-AIX32-NEXT:    lxvw4x v2, 0, r5
232; P8-AIX32-NEXT:    addi r5, r1, -32
233; P8-AIX32-NEXT:    lxvw4x v3, 0, r4
234; P8-AIX32-NEXT:    lxvw4x v4, 0, r5
235; P8-AIX32-NEXT:    vperm v2, v4, v3, v2
236; P8-AIX32-NEXT:    stxvw4x v2, 0, r3
237; P8-AIX32-NEXT:    blr
238;
239; P7-AIX32-LABEL: test4:
240; P7-AIX32:       # %bb.0: # %entry
241; P7-AIX32-NEXT:    lwz r5, L..C0(r2) # %const.0
242; P7-AIX32-NEXT:    lwz r6, 24(r4)
243; P7-AIX32-NEXT:    lwz r4, 28(r4)
244; P7-AIX32-NEXT:    stw r4, -16(r1)
245; P7-AIX32-NEXT:    stw r6, -32(r1)
246; P7-AIX32-NEXT:    lxvw4x v2, 0, r5
247; P7-AIX32-NEXT:    addi r4, r1, -16
248; P7-AIX32-NEXT:    addi r5, r1, -32
249; P7-AIX32-NEXT:    lxvw4x v3, 0, r4
250; P7-AIX32-NEXT:    lxvw4x v4, 0, r5
251; P7-AIX32-NEXT:    vperm v2, v4, v3, v2
252; P7-AIX32-NEXT:    stxvw4x v2, 0, r3
253; P7-AIX32-NEXT:    blr
254entry:
255  %arrayidx = getelementptr inbounds i64, i64* %a, i64 3
256  %0 = load i64, i64* %arrayidx, align 8
257  %splat.splatinsert.i = insertelement <2 x i64> undef, i64 %0, i32 0
258  %splat.splat.i = shufflevector <2 x i64> %splat.splatinsert.i, <2 x i64> undef, <2 x i32> zeroinitializer
259  store <2 x i64> %splat.splat.i, <2 x i64>* %c, align 16
260  ret void
261}
262
263; sext v2i64
264define void @test5(<2 x i64>* %a, i32* %in) {
265; P9-LABEL: test5:
266; P9:       # %bb.0: # %entry
267; P9-NEXT:    lfiwax f0, 0, r4
268; P9-NEXT:    xxspltd vs0, f0, 0
269; P9-NEXT:    stxv vs0, 0(r3)
270; P9-NEXT:    blr
271;
272; P8-LABEL: test5:
273; P8:       # %bb.0: # %entry
274; P8-NEXT:    lfiwax f0, 0, r4
275; P8-NEXT:    xxspltd vs0, f0, 0
276; P8-NEXT:    stxvd2x vs0, 0, r3
277; P8-NEXT:    blr
278;
279; P7-LABEL: test5:
280; P7:       # %bb.0: # %entry
281; P7-NEXT:    lfiwax f0, 0, r4
282; P7-NEXT:    xxspltd vs0, f0, 0
283; P7-NEXT:    stxvd2x vs0, 0, r3
284; P7-NEXT:    blr
285;
286; P9-AIX32-LABEL: test5:
287; P9-AIX32:       # %bb.0: # %entry
288; P9-AIX32-NEXT:    lwz r4, 0(r4)
289; P9-AIX32-NEXT:    srawi r5, r4, 31
290; P9-AIX32-NEXT:    stw r4, -16(r1)
291; P9-AIX32-NEXT:    lwz r4, L..C1(r2) # %const.0
292; P9-AIX32-NEXT:    lxv v3, -16(r1)
293; P9-AIX32-NEXT:    stw r5, -32(r1)
294; P9-AIX32-NEXT:    lxv v4, -32(r1)
295; P9-AIX32-NEXT:    lxv v2, 0(r4)
296; P9-AIX32-NEXT:    vperm v2, v4, v3, v2
297; P9-AIX32-NEXT:    stxv v2, 0(r3)
298; P9-AIX32-NEXT:    blr
299;
300; P8-AIX32-LABEL: test5:
301; P8-AIX32:       # %bb.0: # %entry
302; P8-AIX32-NEXT:    lwz r5, L..C1(r2) # %const.0
303; P8-AIX32-NEXT:    lwz r4, 0(r4)
304; P8-AIX32-NEXT:    stw r4, -16(r1)
305; P8-AIX32-NEXT:    srawi r4, r4, 31
306; P8-AIX32-NEXT:    stw r4, -32(r1)
307; P8-AIX32-NEXT:    lxvw4x v2, 0, r5
308; P8-AIX32-NEXT:    addi r4, r1, -16
309; P8-AIX32-NEXT:    addi r5, r1, -32
310; P8-AIX32-NEXT:    lxvw4x v3, 0, r4
311; P8-AIX32-NEXT:    lxvw4x v4, 0, r5
312; P8-AIX32-NEXT:    vperm v2, v4, v3, v2
313; P8-AIX32-NEXT:    stxvw4x v2, 0, r3
314; P8-AIX32-NEXT:    blr
315;
316; P7-AIX32-LABEL: test5:
317; P7-AIX32:       # %bb.0: # %entry
318; P7-AIX32-NEXT:    lwz r4, 0(r4)
319; P7-AIX32-NEXT:    lwz r5, L..C1(r2) # %const.0
320; P7-AIX32-NEXT:    srawi r6, r4, 31
321; P7-AIX32-NEXT:    stw r4, -16(r1)
322; P7-AIX32-NEXT:    addi r4, r1, -16
323; P7-AIX32-NEXT:    stw r6, -32(r1)
324; P7-AIX32-NEXT:    lxvw4x v2, 0, r5
325; P7-AIX32-NEXT:    addi r5, r1, -32
326; P7-AIX32-NEXT:    lxvw4x v3, 0, r4
327; P7-AIX32-NEXT:    lxvw4x v4, 0, r5
328; P7-AIX32-NEXT:    vperm v2, v4, v3, v2
329; P7-AIX32-NEXT:    stxvw4x v2, 0, r3
330; P7-AIX32-NEXT:    blr
331entry:
332  %0 = load i32, i32* %in, align 4
333  %conv = sext i32 %0 to i64
334  %splat.splatinsert.i = insertelement <2 x i64> poison, i64 %conv, i32 0
335  %splat.splat.i = shufflevector <2 x i64> %splat.splatinsert.i, <2 x i64> poison, <2 x i32> zeroinitializer
336  store <2 x i64> %splat.splat.i, <2 x i64>* %a, align 16
337  ret void
338}
339
340; zext v2i64
341define void @test6(<2 x i64>* %a, i32* %in) {
342; P9-LABEL: test6:
343; P9:       # %bb.0: # %entry
344; P9-NEXT:    lfiwzx f0, 0, r4
345; P9-NEXT:    xxspltd vs0, f0, 0
346; P9-NEXT:    stxv vs0, 0(r3)
347; P9-NEXT:    blr
348;
349; P8-LABEL: test6:
350; P8:       # %bb.0: # %entry
351; P8-NEXT:    lfiwzx f0, 0, r4
352; P8-NEXT:    xxspltd vs0, f0, 0
353; P8-NEXT:    stxvd2x vs0, 0, r3
354; P8-NEXT:    blr
355;
356; P7-LABEL: test6:
357; P7:       # %bb.0: # %entry
358; P7-NEXT:    lfiwzx f0, 0, r4
359; P7-NEXT:    xxspltd vs0, f0, 0
360; P7-NEXT:    stxvd2x vs0, 0, r3
361; P7-NEXT:    blr
362;
363; P9-AIX32-LABEL: test6:
364; P9-AIX32:       # %bb.0: # %entry
365; P9-AIX32-NEXT:    lwz r4, 0(r4)
366; P9-AIX32-NEXT:    li r5, 0
367; P9-AIX32-NEXT:    stw r5, -32(r1)
368; P9-AIX32-NEXT:    lxv v3, -32(r1)
369; P9-AIX32-NEXT:    stw r4, -16(r1)
370; P9-AIX32-NEXT:    lwz r4, L..C2(r2) # %const.0
371; P9-AIX32-NEXT:    lxv v4, -16(r1)
372; P9-AIX32-NEXT:    lxv v2, 0(r4)
373; P9-AIX32-NEXT:    vperm v2, v3, v4, v2
374; P9-AIX32-NEXT:    stxv v2, 0(r3)
375; P9-AIX32-NEXT:    blr
376;
377; P8-AIX32-LABEL: test6:
378; P8-AIX32:       # %bb.0: # %entry
379; P8-AIX32-NEXT:    lwz r6, L..C2(r2) # %const.0
380; P8-AIX32-NEXT:    lwz r4, 0(r4)
381; P8-AIX32-NEXT:    li r5, 0
382; P8-AIX32-NEXT:    stw r5, -32(r1)
383; P8-AIX32-NEXT:    addi r5, r1, -16
384; P8-AIX32-NEXT:    stw r4, -16(r1)
385; P8-AIX32-NEXT:    addi r4, r1, -32
386; P8-AIX32-NEXT:    lxvw4x v2, 0, r6
387; P8-AIX32-NEXT:    lxvw4x v3, 0, r4
388; P8-AIX32-NEXT:    lxvw4x v4, 0, r5
389; P8-AIX32-NEXT:    vperm v2, v3, v4, v2
390; P8-AIX32-NEXT:    stxvw4x v2, 0, r3
391; P8-AIX32-NEXT:    blr
392;
393; P7-AIX32-LABEL: test6:
394; P7-AIX32:       # %bb.0: # %entry
395; P7-AIX32-NEXT:    lwz r5, L..C2(r2) # %const.0
396; P7-AIX32-NEXT:    lwz r4, 0(r4)
397; P7-AIX32-NEXT:    li r6, 0
398; P7-AIX32-NEXT:    stw r6, -32(r1)
399; P7-AIX32-NEXT:    stw r4, -16(r1)
400; P7-AIX32-NEXT:    addi r4, r1, -32
401; P7-AIX32-NEXT:    lxvw4x v2, 0, r5
402; P7-AIX32-NEXT:    addi r5, r1, -16
403; P7-AIX32-NEXT:    lxvw4x v3, 0, r4
404; P7-AIX32-NEXT:    lxvw4x v4, 0, r5
405; P7-AIX32-NEXT:    vperm v2, v3, v4, v2
406; P7-AIX32-NEXT:    stxvw4x v2, 0, r3
407; P7-AIX32-NEXT:    blr
408entry:
409  %0 = load i32, i32* %in, align 4
410  %conv = zext i32 %0 to i64
411  %splat.splatinsert.i = insertelement <2 x i64> poison, i64 %conv, i32 0
412  %splat.splat.i = shufflevector <2 x i64> %splat.splatinsert.i, <2 x i64> poison, <2 x i32> zeroinitializer
413  store <2 x i64> %splat.splat.i, <2 x i64>* %a, align 16
414  ret void
415}
416
417; v8i16
418define void @test7(<8 x i16>* %a, i16* %in) {
419; P9-LABEL: test7:
420; P9:       # %bb.0: # %entry
421; P9-NEXT:    lxsihzx v2, 0, r4
422; P9-NEXT:    vsplth v2, v2, 3
423; P9-NEXT:    stxv v2, 0(r3)
424; P9-NEXT:    blr
425;
426; P8-LABEL: test7:
427; P8:       # %bb.0: # %entry
428; P8-NEXT:    lhzx r4, 0, r4
429; P8-NEXT:    mtvsrwz v2, r4
430; P8-NEXT:    vsplth v2, v2, 3
431; P8-NEXT:    stvx v2, 0, r3
432; P8-NEXT:    blr
433;
434; P7-LABEL: test7:
435; P7:       # %bb.0: # %entry
436; P7-NEXT:    li r5, 1
437; P7-NEXT:    lvx v2, 0, r4
438; P7-NEXT:    lvsl v4, 0, r4
439; P7-NEXT:    lvx v3, r5, r4
440; P7-NEXT:    vperm v2, v2, v3, v4
441; P7-NEXT:    vsplth v2, v2, 0
442; P7-NEXT:    stxvw4x v2, 0, r3
443; P7-NEXT:    blr
444;
445; P9-AIX32-LABEL: test7:
446; P9-AIX32:       # %bb.0: # %entry
447; P9-AIX32-NEXT:    lxsihzx v2, 0, r4
448; P9-AIX32-NEXT:    vsplth v2, v2, 3
449; P9-AIX32-NEXT:    stxv v2, 0(r3)
450; P9-AIX32-NEXT:    blr
451;
452; P8-AIX32-LABEL: test7:
453; P8-AIX32:       # %bb.0: # %entry
454; P8-AIX32-NEXT:    lhzx r4, 0, r4
455; P8-AIX32-NEXT:    mtvsrwz v2, r4
456; P8-AIX32-NEXT:    vsplth v2, v2, 3
457; P8-AIX32-NEXT:    stxvw4x v2, 0, r3
458; P8-AIX32-NEXT:    blr
459;
460; P7-AIX32-LABEL: test7:
461; P7-AIX32:       # %bb.0: # %entry
462; P7-AIX32-NEXT:    li r5, 1
463; P7-AIX32-NEXT:    lvx v2, 0, r4
464; P7-AIX32-NEXT:    lvsl v4, 0, r4
465; P7-AIX32-NEXT:    lvx v3, r5, r4
466; P7-AIX32-NEXT:    vperm v2, v2, v3, v4
467; P7-AIX32-NEXT:    vsplth v2, v2, 0
468; P7-AIX32-NEXT:    stxvw4x v2, 0, r3
469; P7-AIX32-NEXT:    blr
470entry:
471  %0 = load i16, i16* %in, align 2
472  %splat.splatinsert.i = insertelement <8 x i16> poison, i16 %0, i32 0
473  %splat.splat.i = shufflevector <8 x i16> %splat.splatinsert.i, <8 x i16> poison, <8 x i32> zeroinitializer
474  store <8 x i16> %splat.splat.i, <8 x i16>* %a, align 16
475  ret void
476}
477
478; v16i8
479define void @test8(<16 x i8>* %a, i8* %in) {
480; P9-LABEL: test8:
481; P9:       # %bb.0: # %entry
482; P9-NEXT:    lxsibzx v2, 0, r4
483; P9-NEXT:    vspltb v2, v2, 7
484; P9-NEXT:    stxv v2, 0(r3)
485; P9-NEXT:    blr
486;
487; P8-LABEL: test8:
488; P8:       # %bb.0: # %entry
489; P8-NEXT:    lbzx r4, 0, r4
490; P8-NEXT:    mtvsrwz v2, r4
491; P8-NEXT:    vspltb v2, v2, 7
492; P8-NEXT:    stvx v2, 0, r3
493; P8-NEXT:    blr
494;
495; P7-LABEL: test8:
496; P7:       # %bb.0: # %entry
497; P7-NEXT:    lvsl v2, 0, r4
498; P7-NEXT:    lvx v3, 0, r4
499; P7-NEXT:    vperm v2, v3, v3, v2
500; P7-NEXT:    vspltb v2, v2, 0
501; P7-NEXT:    stxvw4x v2, 0, r3
502; P7-NEXT:    blr
503;
504; P9-AIX32-LABEL: test8:
505; P9-AIX32:       # %bb.0: # %entry
506; P9-AIX32-NEXT:    lxsibzx v2, 0, r4
507; P9-AIX32-NEXT:    vspltb v2, v2, 7
508; P9-AIX32-NEXT:    stxv v2, 0(r3)
509; P9-AIX32-NEXT:    blr
510;
511; P8-AIX32-LABEL: test8:
512; P8-AIX32:       # %bb.0: # %entry
513; P8-AIX32-NEXT:    lbzx r4, 0, r4
514; P8-AIX32-NEXT:    mtvsrwz v2, r4
515; P8-AIX32-NEXT:    vspltb v2, v2, 7
516; P8-AIX32-NEXT:    stxvw4x v2, 0, r3
517; P8-AIX32-NEXT:    blr
518;
519; P7-AIX32-LABEL: test8:
520; P7-AIX32:       # %bb.0: # %entry
521; P7-AIX32-NEXT:    lvsl v2, 0, r4
522; P7-AIX32-NEXT:    lvx v3, 0, r4
523; P7-AIX32-NEXT:    vperm v2, v3, v3, v2
524; P7-AIX32-NEXT:    vspltb v2, v2, 0
525; P7-AIX32-NEXT:    stxvw4x v2, 0, r3
526; P7-AIX32-NEXT:    blr
527entry:
528  %0 = load i8, i8* %in, align 1
529  %splat.splatinsert.i = insertelement <16 x i8> poison, i8 %0, i32 0
530  %splat.splat.i = shufflevector <16 x i8> %splat.splatinsert.i, <16 x i8> poison, <16 x i32> zeroinitializer
531  store <16 x i8> %splat.splat.i, <16 x i8>* %a, align 16
532  ret void
533}
534
535define <16 x i8> @unadjusted_lxvwsx(i32* %s, i32* %t) {
536; P9-LABEL: unadjusted_lxvwsx:
537; P9:       # %bb.0: # %entry
538; P9-NEXT:    lxvwsx v2, 0, r3
539; P9-NEXT:    blr
540;
541; P8-LABEL: unadjusted_lxvwsx:
542; P8:       # %bb.0: # %entry
543; P8-NEXT:    lfiwzx f0, 0, r3
544; P8-NEXT:    xxspltw v2, vs0, 1
545; P8-NEXT:    blr
546;
547; P7-LABEL: unadjusted_lxvwsx:
548; P7:       # %bb.0: # %entry
549; P7-NEXT:    lwz r3, 0(r3)
550; P7-NEXT:    addi r4, r1, -16
551; P7-NEXT:    stw r3, -16(r1)
552; P7-NEXT:    lxvw4x vs0, 0, r4
553; P7-NEXT:    xxspltw v2, vs0, 0
554; P7-NEXT:    blr
555;
556; P9-AIX32-LABEL: unadjusted_lxvwsx:
557; P9-AIX32:       # %bb.0: # %entry
558; P9-AIX32-NEXT:    lxvwsx v2, 0, r3
559; P9-AIX32-NEXT:    blr
560;
561; P8-AIX32-LABEL: unadjusted_lxvwsx:
562; P8-AIX32:       # %bb.0: # %entry
563; P8-AIX32-NEXT:    lwz r3, 0(r3)
564; P8-AIX32-NEXT:    mtfprwz f0, r3
565; P8-AIX32-NEXT:    xxspltw v2, vs0, 1
566; P8-AIX32-NEXT:    blr
567;
568; P7-AIX32-LABEL: unadjusted_lxvwsx:
569; P7-AIX32:       # %bb.0: # %entry
570; P7-AIX32-NEXT:    lwz r3, 0(r3)
571; P7-AIX32-NEXT:    addi r4, r1, -16
572; P7-AIX32-NEXT:    stw r3, -16(r1)
573; P7-AIX32-NEXT:    lxvw4x vs0, 0, r4
574; P7-AIX32-NEXT:    xxspltw v2, vs0, 0
575; P7-AIX32-NEXT:    blr
576  entry:
577    %0 = bitcast i32* %s to <4 x i8>*
578    %1 = load <4 x i8>, <4 x i8>* %0, align 4
579    %2 = shufflevector <4 x i8> %1, <4 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
580    ret <16 x i8> %2
581}
582
583define <16 x i8> @adjusted_lxvwsx(i64* %s, i64* %t) {
584; P9-LABEL: adjusted_lxvwsx:
585; P9:       # %bb.0: # %entry
586; P9-NEXT:    addi r3, r3, 4
587; P9-NEXT:    lxvwsx v2, 0, r3
588; P9-NEXT:    blr
589;
590; P8-LABEL: adjusted_lxvwsx:
591; P8:       # %bb.0: # %entry
592; P8-NEXT:    lfdx f0, 0, r3
593; P8-NEXT:    xxspltw v2, vs0, 0
594; P8-NEXT:    blr
595;
596; P7-LABEL: adjusted_lxvwsx:
597; P7:       # %bb.0: # %entry
598; P7-NEXT:    ld r3, 0(r3)
599; P7-NEXT:    addi r4, r1, -16
600; P7-NEXT:    std r3, -16(r1)
601; P7-NEXT:    lxvw4x vs0, 0, r4
602; P7-NEXT:    xxspltw v2, vs0, 1
603; P7-NEXT:    blr
604;
605; P9-AIX32-LABEL: adjusted_lxvwsx:
606; P9-AIX32:       # %bb.0: # %entry
607; P9-AIX32-NEXT:    lwz r3, 4(r3)
608; P9-AIX32-NEXT:    stw r3, -16(r1)
609; P9-AIX32-NEXT:    lxv vs0, -16(r1)
610; P9-AIX32-NEXT:    xxmrghw v2, vs0, vs0
611; P9-AIX32-NEXT:    xxspltw v2, v2, 1
612; P9-AIX32-NEXT:    blr
613;
614; P8-AIX32-LABEL: adjusted_lxvwsx:
615; P8-AIX32:       # %bb.0: # %entry
616; P8-AIX32-NEXT:    lwz r3, 4(r3)
617; P8-AIX32-NEXT:    addi r4, r1, -16
618; P8-AIX32-NEXT:    stw r3, -16(r1)
619; P8-AIX32-NEXT:    lxvw4x vs0, 0, r4
620; P8-AIX32-NEXT:    xxmrghw v2, vs0, vs0
621; P8-AIX32-NEXT:    xxspltw v2, v2, 1
622; P8-AIX32-NEXT:    blr
623;
624; P7-AIX32-LABEL: adjusted_lxvwsx:
625; P7-AIX32:       # %bb.0: # %entry
626; P7-AIX32-NEXT:    lwz r3, 4(r3)
627; P7-AIX32-NEXT:    addi r4, r1, -16
628; P7-AIX32-NEXT:    stw r3, -16(r1)
629; P7-AIX32-NEXT:    lxvw4x vs0, 0, r4
630; P7-AIX32-NEXT:    xxmrghw v2, vs0, vs0
631; P7-AIX32-NEXT:    xxspltw v2, v2, 1
632; P7-AIX32-NEXT:    blr
633  entry:
634    %0 = bitcast i64* %s to <8 x i8>*
635    %1 = load <8 x i8>, <8 x i8>* %0, align 8
636    %2 = shufflevector <8 x i8> %1, <8 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
637    ret <16 x i8> %2
638}
639
640define <16 x i8> @unadjusted_lxvwsx_v16i8(<16 x i8> *%s, <16 x i8> %t) {
641; P9-LABEL: unadjusted_lxvwsx_v16i8:
642; P9:       # %bb.0: # %entry
643; P9-NEXT:    lxvwsx v2, 0, r3
644; P9-NEXT:    blr
645;
646; P8-LABEL: unadjusted_lxvwsx_v16i8:
647; P8:       # %bb.0: # %entry
648; P8-NEXT:    lvx v2, 0, r3
649; P8-NEXT:    xxspltw v2, v2, 3
650; P8-NEXT:    blr
651;
652; P7-LABEL: unadjusted_lxvwsx_v16i8:
653; P7:       # %bb.0: # %entry
654; P7-NEXT:    lxvw4x vs0, 0, r3
655; P7-NEXT:    xxspltw v2, vs0, 0
656; P7-NEXT:    blr
657;
658; P9-AIX32-LABEL: unadjusted_lxvwsx_v16i8:
659; P9-AIX32:       # %bb.0: # %entry
660; P9-AIX32-NEXT:    lxvwsx v2, 0, r3
661; P9-AIX32-NEXT:    blr
662;
663; P8-AIX32-LABEL: unadjusted_lxvwsx_v16i8:
664; P8-AIX32:       # %bb.0: # %entry
665; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3
666; P8-AIX32-NEXT:    xxspltw v2, vs0, 0
667; P8-AIX32-NEXT:    blr
668;
669; P7-AIX32-LABEL: unadjusted_lxvwsx_v16i8:
670; P7-AIX32:       # %bb.0: # %entry
671; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3
672; P7-AIX32-NEXT:    xxspltw v2, vs0, 0
673; P7-AIX32-NEXT:    blr
674  entry:
675    %0 = load <16 x i8>, <16 x i8>* %s, align 16
676    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
677    ret <16 x i8> %1
678}
679
680define <16 x i8> @adjusted_lxvwsx_v16i8(<16 x i8> *%s, <16 x i8> %t) {
681; P9-LABEL: adjusted_lxvwsx_v16i8:
682; P9:       # %bb.0: # %entry
683; P9-NEXT:    addi r3, r3, 4
684; P9-NEXT:    lxvwsx v2, 0, r3
685; P9-NEXT:    blr
686;
687; P8-LABEL: adjusted_lxvwsx_v16i8:
688; P8:       # %bb.0: # %entry
689; P8-NEXT:    lvx v2, 0, r3
690; P8-NEXT:    xxspltw v2, v2, 2
691; P8-NEXT:    blr
692;
693; P7-LABEL: adjusted_lxvwsx_v16i8:
694; P7:       # %bb.0: # %entry
695; P7-NEXT:    lxvw4x vs0, 0, r3
696; P7-NEXT:    xxspltw v2, vs0, 1
697; P7-NEXT:    blr
698;
699; P9-AIX32-LABEL: adjusted_lxvwsx_v16i8:
700; P9-AIX32:       # %bb.0: # %entry
701; P9-AIX32-NEXT:    addi r3, r3, 4
702; P9-AIX32-NEXT:    lxvwsx v2, 0, r3
703; P9-AIX32-NEXT:    blr
704;
705; P8-AIX32-LABEL: adjusted_lxvwsx_v16i8:
706; P8-AIX32:       # %bb.0: # %entry
707; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3
708; P8-AIX32-NEXT:    xxspltw v2, vs0, 1
709; P8-AIX32-NEXT:    blr
710;
711; P7-AIX32-LABEL: adjusted_lxvwsx_v16i8:
712; P7-AIX32:       # %bb.0: # %entry
713; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3
714; P7-AIX32-NEXT:    xxspltw v2, vs0, 1
715; P7-AIX32-NEXT:    blr
716  entry:
717    %0 = load <16 x i8>, <16 x i8>* %s, align 16
718    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7>
719    ret <16 x i8> %1
720}
721
722define <16 x i8> @adjusted_lxvwsx_v16i8_2(<16 x i8> *%s, <16 x i8> %t) {
723; P9-LABEL: adjusted_lxvwsx_v16i8_2:
724; P9:       # %bb.0: # %entry
725; P9-NEXT:    addi r3, r3, 8
726; P9-NEXT:    lxvwsx v2, 0, r3
727; P9-NEXT:    blr
728;
729; P8-LABEL: adjusted_lxvwsx_v16i8_2:
730; P8:       # %bb.0: # %entry
731; P8-NEXT:    lvx v2, 0, r3
732; P8-NEXT:    xxspltw v2, v2, 1
733; P8-NEXT:    blr
734;
735; P7-LABEL: adjusted_lxvwsx_v16i8_2:
736; P7:       # %bb.0: # %entry
737; P7-NEXT:    lxvw4x vs0, 0, r3
738; P7-NEXT:    xxspltw v2, vs0, 2
739; P7-NEXT:    blr
740;
741; P9-AIX32-LABEL: adjusted_lxvwsx_v16i8_2:
742; P9-AIX32:       # %bb.0: # %entry
743; P9-AIX32-NEXT:    addi r3, r3, 8
744; P9-AIX32-NEXT:    lxvwsx v2, 0, r3
745; P9-AIX32-NEXT:    blr
746;
747; P8-AIX32-LABEL: adjusted_lxvwsx_v16i8_2:
748; P8-AIX32:       # %bb.0: # %entry
749; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3
750; P8-AIX32-NEXT:    xxspltw v2, vs0, 2
751; P8-AIX32-NEXT:    blr
752;
753; P7-AIX32-LABEL: adjusted_lxvwsx_v16i8_2:
754; P7-AIX32:       # %bb.0: # %entry
755; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3
756; P7-AIX32-NEXT:    xxspltw v2, vs0, 2
757; P7-AIX32-NEXT:    blr
758  entry:
759    %0 = load <16 x i8>, <16 x i8>* %s, align 16
760    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11, i32 8, i32 9, i32 10, i32 11>
761    ret <16 x i8> %1
762}
763
764define <16 x i8> @adjusted_lxvwsx_v16i8_3(<16 x i8> *%s, <16 x i8> %t) {
765; P9-LABEL: adjusted_lxvwsx_v16i8_3:
766; P9:       # %bb.0: # %entry
767; P9-NEXT:    addi r3, r3, 12
768; P9-NEXT:    lxvwsx v2, 0, r3
769; P9-NEXT:    blr
770;
771; P8-LABEL: adjusted_lxvwsx_v16i8_3:
772; P8:       # %bb.0: # %entry
773; P8-NEXT:    lvx v2, 0, r3
774; P8-NEXT:    xxspltw v2, v2, 0
775; P8-NEXT:    blr
776;
777; P7-LABEL: adjusted_lxvwsx_v16i8_3:
778; P7:       # %bb.0: # %entry
779; P7-NEXT:    lxvw4x vs0, 0, r3
780; P7-NEXT:    xxspltw v2, vs0, 3
781; P7-NEXT:    blr
782;
783; P9-AIX32-LABEL: adjusted_lxvwsx_v16i8_3:
784; P9-AIX32:       # %bb.0: # %entry
785; P9-AIX32-NEXT:    addi r3, r3, 12
786; P9-AIX32-NEXT:    lxvwsx v2, 0, r3
787; P9-AIX32-NEXT:    blr
788;
789; P8-AIX32-LABEL: adjusted_lxvwsx_v16i8_3:
790; P8-AIX32:       # %bb.0: # %entry
791; P8-AIX32-NEXT:    lxvw4x vs0, 0, r3
792; P8-AIX32-NEXT:    xxspltw v2, vs0, 3
793; P8-AIX32-NEXT:    blr
794;
795; P7-AIX32-LABEL: adjusted_lxvwsx_v16i8_3:
796; P7-AIX32:       # %bb.0: # %entry
797; P7-AIX32-NEXT:    lxvw4x vs0, 0, r3
798; P7-AIX32-NEXT:    xxspltw v2, vs0, 3
799; P7-AIX32-NEXT:    blr
800  entry:
801    %0 = load <16 x i8>, <16 x i8>* %s, align 16
802    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15, i32 12, i32 13, i32 14, i32 15>
803    ret <16 x i8> %1
804}
805
806define <16 x i8> @unadjusted_lxvdsx(i64* %s, i64* %t) {
807; P9-LABEL: unadjusted_lxvdsx:
808; P9:       # %bb.0: # %entry
809; P9-NEXT:    lxvdsx v2, 0, r3
810; P9-NEXT:    blr
811;
812; P8-LABEL: unadjusted_lxvdsx:
813; P8:       # %bb.0: # %entry
814; P8-NEXT:    lxvdsx v2, 0, r3
815; P8-NEXT:    blr
816;
817; P7-LABEL: unadjusted_lxvdsx:
818; P7:       # %bb.0: # %entry
819; P7-NEXT:    lxvdsx v2, 0, r3
820; P7-NEXT:    blr
821;
822; P9-AIX32-LABEL: unadjusted_lxvdsx:
823; P9-AIX32:       # %bb.0: # %entry
824; P9-AIX32-NEXT:    lwz r4, 0(r3)
825; P9-AIX32-NEXT:    stw r4, -16(r1)
826; P9-AIX32-NEXT:    lwz r3, 4(r3)
827; P9-AIX32-NEXT:    lxv vs1, -16(r1)
828; P9-AIX32-NEXT:    mtfprwz f0, r3
829; P9-AIX32-NEXT:    xxinsertw vs1, vs0, 4
830; P9-AIX32-NEXT:    xxmrghd v2, vs1, vs1
831; P9-AIX32-NEXT:    blr
832;
833; P8-AIX32-LABEL: unadjusted_lxvdsx:
834; P8-AIX32:       # %bb.0: # %entry
835; P8-AIX32-NEXT:    lwz r5, 4(r3)
836; P8-AIX32-NEXT:    lwz r4, L..C3(r2) # %const.0
837; P8-AIX32-NEXT:    stw r5, -32(r1)
838; P8-AIX32-NEXT:    lwz r3, 0(r3)
839; P8-AIX32-NEXT:    lxvw4x v2, 0, r4
840; P8-AIX32-NEXT:    addi r4, r1, -16
841; P8-AIX32-NEXT:    stw r3, -16(r1)
842; P8-AIX32-NEXT:    addi r3, r1, -32
843; P8-AIX32-NEXT:    lxvw4x v3, 0, r3
844; P8-AIX32-NEXT:    lxvw4x v4, 0, r4
845; P8-AIX32-NEXT:    vperm v2, v4, v3, v2
846; P8-AIX32-NEXT:    xxmrghd v2, v2, v2
847; P8-AIX32-NEXT:    blr
848;
849; P7-AIX32-LABEL: unadjusted_lxvdsx:
850; P7-AIX32:       # %bb.0: # %entry
851; P7-AIX32-NEXT:    lwz r5, 4(r3)
852; P7-AIX32-NEXT:    lwz r4, L..C3(r2) # %const.0
853; P7-AIX32-NEXT:    stw r5, -32(r1)
854; P7-AIX32-NEXT:    lwz r3, 0(r3)
855; P7-AIX32-NEXT:    lxvw4x v2, 0, r4
856; P7-AIX32-NEXT:    addi r4, r1, -16
857; P7-AIX32-NEXT:    stw r3, -16(r1)
858; P7-AIX32-NEXT:    addi r3, r1, -32
859; P7-AIX32-NEXT:    lxvw4x v3, 0, r3
860; P7-AIX32-NEXT:    lxvw4x v4, 0, r4
861; P7-AIX32-NEXT:    vperm v2, v4, v3, v2
862; P7-AIX32-NEXT:    xxmrghd v2, v2, v2
863; P7-AIX32-NEXT:    blr
864  entry:
865    %0 = bitcast i64* %s to <8 x i8>*
866    %1 = load <8 x i8>, <8 x i8>* %0, align 8
867    %2 = shufflevector <8 x i8> %1, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
868    ret <16 x i8> %2
869}
870
871define <16 x i8> @unadjusted_lxvdsx_v16i8(<16 x i8> *%s, <16 x i8> %t) {
872; P9-LABEL: unadjusted_lxvdsx_v16i8:
873; P9:       # %bb.0: # %entry
874; P9-NEXT:    lxvdsx v2, 0, r3
875; P9-NEXT:    blr
876;
877; P8-LABEL: unadjusted_lxvdsx_v16i8:
878; P8:       # %bb.0: # %entry
879; P8-NEXT:    lxvdsx v2, 0, r3
880; P8-NEXT:    blr
881;
882; P7-LABEL: unadjusted_lxvdsx_v16i8:
883; P7:       # %bb.0: # %entry
884; P7-NEXT:    lxvdsx v2, 0, r3
885; P7-NEXT:    blr
886;
887; P9-AIX32-LABEL: unadjusted_lxvdsx_v16i8:
888; P9-AIX32:       # %bb.0: # %entry
889; P9-AIX32-NEXT:    lxvdsx v2, 0, r3
890; P9-AIX32-NEXT:    blr
891;
892; P8-AIX32-LABEL: unadjusted_lxvdsx_v16i8:
893; P8-AIX32:       # %bb.0: # %entry
894; P8-AIX32-NEXT:    lxvdsx v2, 0, r3
895; P8-AIX32-NEXT:    blr
896;
897; P7-AIX32-LABEL: unadjusted_lxvdsx_v16i8:
898; P7-AIX32:       # %bb.0: # %entry
899; P7-AIX32-NEXT:    lxvdsx v2, 0, r3
900; P7-AIX32-NEXT:    blr
901  entry:
902    %0 = load <16 x i8>, <16 x i8>* %s, align 16
903    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
904    ret <16 x i8> %1
905}
906
907define <16 x i8> @adjusted_lxvdsx_v16i8(<16 x i8> *%s, <16 x i8> %t) {
908; P9-LABEL: adjusted_lxvdsx_v16i8:
909; P9:       # %bb.0: # %entry
910; P9-NEXT:    addi r3, r3, 8
911; P9-NEXT:    lxvdsx v2, 0, r3
912; P9-NEXT:    blr
913;
914; P8-LABEL: adjusted_lxvdsx_v16i8:
915; P8:       # %bb.0: # %entry
916; P8-NEXT:    addi r3, r3, 8
917; P8-NEXT:    lxvdsx v2, 0, r3
918; P8-NEXT:    blr
919;
920; P7-LABEL: adjusted_lxvdsx_v16i8:
921; P7:       # %bb.0: # %entry
922; P7-NEXT:    addi r3, r3, 8
923; P7-NEXT:    lxvdsx v2, 0, r3
924; P7-NEXT:    blr
925;
926; P9-AIX32-LABEL: adjusted_lxvdsx_v16i8:
927; P9-AIX32:       # %bb.0: # %entry
928; P9-AIX32-NEXT:    addi r3, r3, 8
929; P9-AIX32-NEXT:    lxvdsx v2, 0, r3
930; P9-AIX32-NEXT:    blr
931;
932; P8-AIX32-LABEL: adjusted_lxvdsx_v16i8:
933; P8-AIX32:       # %bb.0: # %entry
934; P8-AIX32-NEXT:    addi r3, r3, 8
935; P8-AIX32-NEXT:    lxvdsx v2, 0, r3
936; P8-AIX32-NEXT:    blr
937;
938; P7-AIX32-LABEL: adjusted_lxvdsx_v16i8:
939; P7-AIX32:       # %bb.0: # %entry
940; P7-AIX32-NEXT:    addi r3, r3, 8
941; P7-AIX32-NEXT:    lxvdsx v2, 0, r3
942; P7-AIX32-NEXT:    blr
943  entry:
944    %0 = load <16 x i8>, <16 x i8>* %s, align 16
945    %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
946    ret <16 x i8> %1
947}
948
949define <8 x i16> @test_unaligned_v8i16(i16* %Ptr) {
950; P9-LABEL: test_unaligned_v8i16:
951; P9:       # %bb.0: # %entry
952; P9-NEXT:    addi r3, r3, 6
953; P9-NEXT:    lxsihzx v2, 0, r3
954; P9-NEXT:    vsplth v2, v2, 3
955; P9-NEXT:    blr
956;
957; P8-LABEL: test_unaligned_v8i16:
958; P8:       # %bb.0: # %entry
959; P8-NEXT:    lhz r3, 6(r3)
960; P8-NEXT:    mtvsrwz v2, r3
961; P8-NEXT:    vsplth v2, v2, 3
962; P8-NEXT:    blr
963;
964; P7-LABEL: test_unaligned_v8i16:
965; P7:       # %bb.0: # %entry
966; P7-NEXT:    li r4, 1
967; P7-NEXT:    addi r3, r3, 6
968; P7-NEXT:    lvx v2, 0, r3
969; P7-NEXT:    lvx v3, r4, r3
970; P7-NEXT:    lvsl v4, 0, r3
971; P7-NEXT:    vperm v2, v2, v3, v4
972; P7-NEXT:    vsplth v2, v2, 0
973; P7-NEXT:    blr
974;
975; P9-AIX32-LABEL: test_unaligned_v8i16:
976; P9-AIX32:       # %bb.0: # %entry
977; P9-AIX32-NEXT:    addi r3, r3, 6
978; P9-AIX32-NEXT:    lxsihzx v2, 0, r3
979; P9-AIX32-NEXT:    vsplth v2, v2, 3
980; P9-AIX32-NEXT:    blr
981;
982; P8-AIX32-LABEL: test_unaligned_v8i16:
983; P8-AIX32:       # %bb.0: # %entry
984; P8-AIX32-NEXT:    lhz r3, 6(r3)
985; P8-AIX32-NEXT:    mtvsrwz v2, r3
986; P8-AIX32-NEXT:    vsplth v2, v2, 3
987; P8-AIX32-NEXT:    blr
988;
989; P7-AIX32-LABEL: test_unaligned_v8i16:
990; P7-AIX32:       # %bb.0: # %entry
991; P7-AIX32-NEXT:    li r4, 1
992; P7-AIX32-NEXT:    addi r3, r3, 6
993; P7-AIX32-NEXT:    lvx v2, 0, r3
994; P7-AIX32-NEXT:    lvx v3, r4, r3
995; P7-AIX32-NEXT:    lvsl v4, 0, r3
996; P7-AIX32-NEXT:    vperm v2, v2, v3, v4
997; P7-AIX32-NEXT:    vsplth v2, v2, 0
998; P7-AIX32-NEXT:    blr
999entry:
1000  %add.ptr = getelementptr inbounds i16, i16* %Ptr, i64 3
1001  %0 = load i16, i16* %add.ptr, align 16
1002  %splat.splatinsert = insertelement <8 x i16> poison, i16 %0, i32 0
1003  %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> poison, <8 x i32> zeroinitializer
1004  ret <8 x i16> %splat.splat
1005}
1006
1007define <16 x i8> @test_unaligned_v16i8(i8* %Ptr) {
1008; P9-LABEL: test_unaligned_v16i8:
1009; P9:       # %bb.0: # %entry
1010; P9-NEXT:    addi r3, r3, 3
1011; P9-NEXT:    lxsibzx v2, 0, r3
1012; P9-NEXT:    vspltb v2, v2, 7
1013; P9-NEXT:    blr
1014;
1015; P8-LABEL: test_unaligned_v16i8:
1016; P8:       # %bb.0: # %entry
1017; P8-NEXT:    lbz r3, 3(r3)
1018; P8-NEXT:    mtvsrwz v2, r3
1019; P8-NEXT:    vspltb v2, v2, 7
1020; P8-NEXT:    blr
1021;
1022; P7-LABEL: test_unaligned_v16i8:
1023; P7:       # %bb.0: # %entry
1024; P7-NEXT:    addi r3, r3, 3
1025; P7-NEXT:    lvsl v2, 0, r3
1026; P7-NEXT:    lvx v3, 0, r3
1027; P7-NEXT:    vperm v2, v3, v3, v2
1028; P7-NEXT:    vspltb v2, v2, 0
1029; P7-NEXT:    blr
1030;
1031; P9-AIX32-LABEL: test_unaligned_v16i8:
1032; P9-AIX32:       # %bb.0: # %entry
1033; P9-AIX32-NEXT:    addi r3, r3, 3
1034; P9-AIX32-NEXT:    lxsibzx v2, 0, r3
1035; P9-AIX32-NEXT:    vspltb v2, v2, 7
1036; P9-AIX32-NEXT:    blr
1037;
1038; P8-AIX32-LABEL: test_unaligned_v16i8:
1039; P8-AIX32:       # %bb.0: # %entry
1040; P8-AIX32-NEXT:    lbz r3, 3(r3)
1041; P8-AIX32-NEXT:    mtvsrwz v2, r3
1042; P8-AIX32-NEXT:    vspltb v2, v2, 7
1043; P8-AIX32-NEXT:    blr
1044;
1045; P7-AIX32-LABEL: test_unaligned_v16i8:
1046; P7-AIX32:       # %bb.0: # %entry
1047; P7-AIX32-NEXT:    addi r3, r3, 3
1048; P7-AIX32-NEXT:    lvsl v2, 0, r3
1049; P7-AIX32-NEXT:    lvx v3, 0, r3
1050; P7-AIX32-NEXT:    vperm v2, v3, v3, v2
1051; P7-AIX32-NEXT:    vspltb v2, v2, 0
1052; P7-AIX32-NEXT:    blr
1053entry:
1054  %add.ptr = getelementptr inbounds i8, i8* %Ptr, i64 3
1055  %0 = load i8, i8* %add.ptr, align 16
1056  %splat.splatinsert = insertelement <16 x i8> poison, i8 %0, i32 0
1057  %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> poison, <16 x i32> zeroinitializer
1058  ret <16 x i8> %splat.splat
1059}
1060
1061define <8 x i16> @test_aligned_v8i16_1(i16* %Ptr) {
1062; P9-LABEL: test_aligned_v8i16_1:
1063; P9:       # %bb.0: # %entry
1064; P9-NEXT:    lxsihzx v2, 0, r3
1065; P9-NEXT:    vsplth v2, v2, 3
1066; P9-NEXT:    blr
1067;
1068; P8-LABEL: test_aligned_v8i16_1:
1069; P8:       # %bb.0: # %entry
1070; P8-NEXT:    lvx v2, 0, r3
1071; P8-NEXT:    vsplth v2, v2, 7
1072; P8-NEXT:    blr
1073;
1074; P7-LABEL: test_aligned_v8i16_1:
1075; P7:       # %bb.0: # %entry
1076; P7-NEXT:    lvx v2, 0, r3
1077; P7-NEXT:    vsplth v2, v2, 0
1078; P7-NEXT:    blr
1079;
1080; P9-AIX32-LABEL: test_aligned_v8i16_1:
1081; P9-AIX32:       # %bb.0: # %entry
1082; P9-AIX32-NEXT:    lxsihzx v2, 0, r3
1083; P9-AIX32-NEXT:    vsplth v2, v2, 3
1084; P9-AIX32-NEXT:    blr
1085;
1086; P8-AIX32-LABEL: test_aligned_v8i16_1:
1087; P8-AIX32:       # %bb.0: # %entry
1088; P8-AIX32-NEXT:    lvx v2, 0, r3
1089; P8-AIX32-NEXT:    vsplth v2, v2, 0
1090; P8-AIX32-NEXT:    blr
1091;
1092; P7-AIX32-LABEL: test_aligned_v8i16_1:
1093; P7-AIX32:       # %bb.0: # %entry
1094; P7-AIX32-NEXT:    lvx v2, 0, r3
1095; P7-AIX32-NEXT:    vsplth v2, v2, 0
1096; P7-AIX32-NEXT:    blr
1097entry:
1098  %0 = load i16, i16* %Ptr, align 16
1099  %splat.splatinsert = insertelement <8 x i16> poison, i16 %0, i32 0
1100  %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> poison, <8 x i32> zeroinitializer
1101  ret <8 x i16> %splat.splat
1102}
1103
1104define <8 x i16> @test_aligned_v8i16_2(i16* %Ptr) {
1105; P9-LABEL: test_aligned_v8i16_2:
1106; P9:       # %bb.0: # %entry
1107; P9-NEXT:    addi r3, r3, 32
1108; P9-NEXT:    lxsihzx v2, 0, r3
1109; P9-NEXT:    vsplth v2, v2, 3
1110; P9-NEXT:    blr
1111;
1112; P8-LABEL: test_aligned_v8i16_2:
1113; P8:       # %bb.0: # %entry
1114; P8-NEXT:    addi r3, r3, 32
1115; P8-NEXT:    lvx v2, 0, r3
1116; P8-NEXT:    vsplth v2, v2, 7
1117; P8-NEXT:    blr
1118;
1119; P7-LABEL: test_aligned_v8i16_2:
1120; P7:       # %bb.0: # %entry
1121; P7-NEXT:    addi r3, r3, 32
1122; P7-NEXT:    lvx v2, 0, r3
1123; P7-NEXT:    vsplth v2, v2, 0
1124; P7-NEXT:    blr
1125;
1126; P9-AIX32-LABEL: test_aligned_v8i16_2:
1127; P9-AIX32:       # %bb.0: # %entry
1128; P9-AIX32-NEXT:    addi r3, r3, 32
1129; P9-AIX32-NEXT:    lxsihzx v2, 0, r3
1130; P9-AIX32-NEXT:    vsplth v2, v2, 3
1131; P9-AIX32-NEXT:    blr
1132;
1133; P8-AIX32-LABEL: test_aligned_v8i16_2:
1134; P8-AIX32:       # %bb.0: # %entry
1135; P8-AIX32-NEXT:    addi r3, r3, 32
1136; P8-AIX32-NEXT:    lvx v2, 0, r3
1137; P8-AIX32-NEXT:    vsplth v2, v2, 0
1138; P8-AIX32-NEXT:    blr
1139;
1140; P7-AIX32-LABEL: test_aligned_v8i16_2:
1141; P7-AIX32:       # %bb.0: # %entry
1142; P7-AIX32-NEXT:    addi r3, r3, 32
1143; P7-AIX32-NEXT:    lvx v2, 0, r3
1144; P7-AIX32-NEXT:    vsplth v2, v2, 0
1145; P7-AIX32-NEXT:    blr
1146entry:
1147  %add.ptr = getelementptr inbounds i16, i16* %Ptr, i64 16
1148  %0 = load i16, i16* %add.ptr, align 16
1149  %splat.splatinsert = insertelement <8 x i16> poison, i16 %0, i32 0
1150  %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> poison, <8 x i32> zeroinitializer
1151  ret <8 x i16> %splat.splat
1152}
1153
1154define <16 x i8> @test_aligned_v16i8_1(i8* %Ptr) {
1155; P9-LABEL: test_aligned_v16i8_1:
1156; P9:       # %bb.0: # %entry
1157; P9-NEXT:    lxsibzx v2, 0, r3
1158; P9-NEXT:    vspltb v2, v2, 7
1159; P9-NEXT:    blr
1160;
1161; P8-LABEL: test_aligned_v16i8_1:
1162; P8:       # %bb.0: # %entry
1163; P8-NEXT:    lvx v2, 0, r3
1164; P8-NEXT:    vspltb v2, v2, 15
1165; P8-NEXT:    blr
1166;
1167; P7-LABEL: test_aligned_v16i8_1:
1168; P7:       # %bb.0: # %entry
1169; P7-NEXT:    lvx v2, 0, r3
1170; P7-NEXT:    vspltb v2, v2, 0
1171; P7-NEXT:    blr
1172;
1173; P9-AIX32-LABEL: test_aligned_v16i8_1:
1174; P9-AIX32:       # %bb.0: # %entry
1175; P9-AIX32-NEXT:    lxsibzx v2, 0, r3
1176; P9-AIX32-NEXT:    vspltb v2, v2, 7
1177; P9-AIX32-NEXT:    blr
1178;
1179; P8-AIX32-LABEL: test_aligned_v16i8_1:
1180; P8-AIX32:       # %bb.0: # %entry
1181; P8-AIX32-NEXT:    lvx v2, 0, r3
1182; P8-AIX32-NEXT:    vspltb v2, v2, 0
1183; P8-AIX32-NEXT:    blr
1184;
1185; P7-AIX32-LABEL: test_aligned_v16i8_1:
1186; P7-AIX32:       # %bb.0: # %entry
1187; P7-AIX32-NEXT:    lvx v2, 0, r3
1188; P7-AIX32-NEXT:    vspltb v2, v2, 0
1189; P7-AIX32-NEXT:    blr
1190entry:
1191  %0 = load i8, i8* %Ptr, align 16
1192  %splat.splatinsert = insertelement <16 x i8> poison, i8 %0, i32 0
1193  %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> poison, <16 x i32> zeroinitializer
1194  ret <16 x i8> %splat.splat
1195}
1196
1197define <16 x i8> @test_aligned_v16i8_2(i8* %Ptr) {
1198; P9-LABEL: test_aligned_v16i8_2:
1199; P9:       # %bb.0: # %entry
1200; P9-NEXT:    addi r3, r3, 16
1201; P9-NEXT:    lxsibzx v2, 0, r3
1202; P9-NEXT:    vspltb v2, v2, 7
1203; P9-NEXT:    blr
1204;
1205; P8-LABEL: test_aligned_v16i8_2:
1206; P8:       # %bb.0: # %entry
1207; P8-NEXT:    addi r3, r3, 16
1208; P8-NEXT:    lvx v2, 0, r3
1209; P8-NEXT:    vspltb v2, v2, 15
1210; P8-NEXT:    blr
1211;
1212; P7-LABEL: test_aligned_v16i8_2:
1213; P7:       # %bb.0: # %entry
1214; P7-NEXT:    addi r3, r3, 16
1215; P7-NEXT:    lvx v2, 0, r3
1216; P7-NEXT:    vspltb v2, v2, 0
1217; P7-NEXT:    blr
1218;
1219; P9-AIX32-LABEL: test_aligned_v16i8_2:
1220; P9-AIX32:       # %bb.0: # %entry
1221; P9-AIX32-NEXT:    addi r3, r3, 16
1222; P9-AIX32-NEXT:    lxsibzx v2, 0, r3
1223; P9-AIX32-NEXT:    vspltb v2, v2, 7
1224; P9-AIX32-NEXT:    blr
1225;
1226; P8-AIX32-LABEL: test_aligned_v16i8_2:
1227; P8-AIX32:       # %bb.0: # %entry
1228; P8-AIX32-NEXT:    addi r3, r3, 16
1229; P8-AIX32-NEXT:    lvx v2, 0, r3
1230; P8-AIX32-NEXT:    vspltb v2, v2, 0
1231; P8-AIX32-NEXT:    blr
1232;
1233; P7-AIX32-LABEL: test_aligned_v16i8_2:
1234; P7-AIX32:       # %bb.0: # %entry
1235; P7-AIX32-NEXT:    addi r3, r3, 16
1236; P7-AIX32-NEXT:    lvx v2, 0, r3
1237; P7-AIX32-NEXT:    vspltb v2, v2, 0
1238; P7-AIX32-NEXT:    blr
1239entry:
1240  %add.ptr = getelementptr inbounds i8, i8* %Ptr, i64 16
1241  %0 = load i8, i8* %add.ptr, align 16
1242  %splat.splatinsert = insertelement <16 x i8> poison, i8 %0, i32 0
1243  %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> poison, <16 x i32> zeroinitializer
1244  ret <16 x i8> %splat.splat
1245}
1246
1247; The following test case should not produce a load and splat node,
1248; as we cannot handle extending loads (from f32 to f64), and this test
1249; shows that there are multiple uses of the extending load (other than
1250; a build vector node). `lxvdsx` should not be produced in this case.
1251define <2 x double> @test_v2f64_multiple_use(float* nocapture readonly %a, double* nocapture %b, double* nocapture %c) {
1252; P9-LABEL: test_v2f64_multiple_use:
1253; P9:       # %bb.0: # %entry
1254; P9-NEXT:    lfs f0, 0(r3)
1255; P9-NEXT:    xxspltd v2, vs0, 0
1256; P9-NEXT:    lfd f1, 0(r4)
1257; P9-NEXT:    xsadddp f1, f1, f0
1258; P9-NEXT:    stfd f1, 0(r4)
1259; P9-NEXT:    lfd f1, 0(r5)
1260; P9-NEXT:    xsadddp f1, f1, f0
1261; P9-NEXT:    stfd f1, 0(r5)
1262; P9-NEXT:    blr
1263;
1264; P8-LABEL: test_v2f64_multiple_use:
1265; P8:       # %bb.0: # %entry
1266; P8-NEXT:    lfs f0, 0(r3)
1267; P8-NEXT:    lfd f1, 0(r4)
1268; P8-NEXT:    xsadddp f1, f1, f0
1269; P8-NEXT:    xxspltd v2, vs0, 0
1270; P8-NEXT:    stfd f1, 0(r4)
1271; P8-NEXT:    lfd f1, 0(r5)
1272; P8-NEXT:    xsadddp f1, f1, f0
1273; P8-NEXT:    stfd f1, 0(r5)
1274; P8-NEXT:    blr
1275;
1276; P7-LABEL: test_v2f64_multiple_use:
1277; P7:       # %bb.0: # %entry
1278; P7-NEXT:    lfs f0, 0(r3)
1279; P7-NEXT:    lfd f1, 0(r4)
1280; P7-NEXT:    xsadddp f1, f1, f0
1281; P7-NEXT:    xxspltd v2, vs0, 0
1282; P7-NEXT:    stfd f1, 0(r4)
1283; P7-NEXT:    lfd f1, 0(r5)
1284; P7-NEXT:    xsadddp f1, f1, f0
1285; P7-NEXT:    stfd f1, 0(r5)
1286; P7-NEXT:    blr
1287;
1288; P9-AIX32-LABEL: test_v2f64_multiple_use:
1289; P9-AIX32:       # %bb.0: # %entry
1290; P9-AIX32-NEXT:    lfs f0, 0(r3)
1291; P9-AIX32-NEXT:    xxmrghd v2, vs0, vs0
1292; P9-AIX32-NEXT:    lfd f1, 0(r4)
1293; P9-AIX32-NEXT:    xsadddp f1, f1, f0
1294; P9-AIX32-NEXT:    stfd f1, 0(r4)
1295; P9-AIX32-NEXT:    lfd f1, 0(r5)
1296; P9-AIX32-NEXT:    xsadddp f1, f1, f0
1297; P9-AIX32-NEXT:    stfd f1, 0(r5)
1298; P9-AIX32-NEXT:    blr
1299;
1300; P8-AIX32-LABEL: test_v2f64_multiple_use:
1301; P8-AIX32:       # %bb.0: # %entry
1302; P8-AIX32-NEXT:    lfs f0, 0(r3)
1303; P8-AIX32-NEXT:    lfd f1, 0(r4)
1304; P8-AIX32-NEXT:    xsadddp f1, f1, f0
1305; P8-AIX32-NEXT:    xxmrghd v2, vs0, vs0
1306; P8-AIX32-NEXT:    stfd f1, 0(r4)
1307; P8-AIX32-NEXT:    lfd f1, 0(r5)
1308; P8-AIX32-NEXT:    xsadddp f1, f1, f0
1309; P8-AIX32-NEXT:    stfd f1, 0(r5)
1310; P8-AIX32-NEXT:    blr
1311;
1312; P7-AIX32-LABEL: test_v2f64_multiple_use:
1313; P7-AIX32:       # %bb.0: # %entry
1314; P7-AIX32-NEXT:    lfs f0, 0(r3)
1315; P7-AIX32-NEXT:    lfd f1, 0(r4)
1316; P7-AIX32-NEXT:    xsadddp f1, f1, f0
1317; P7-AIX32-NEXT:    xxmrghd v2, vs0, vs0
1318; P7-AIX32-NEXT:    stfd f1, 0(r4)
1319; P7-AIX32-NEXT:    lfd f1, 0(r5)
1320; P7-AIX32-NEXT:    xsadddp f1, f1, f0
1321; P7-AIX32-NEXT:    stfd f1, 0(r5)
1322; P7-AIX32-NEXT:    blr
1323entry:
1324  %0 = load float, float* %a, align 4
1325  %conv = fpext float %0 to double
1326  %1 = load double, double* %b, align 8
1327  %add = fadd double %1, %conv
1328  store double %add, double* %b, align 8
1329  %2 = load double, double* %c, align 8
1330  %add2 = fadd double %2, %conv
1331  store double %add2, double* %c, align 8
1332  %vecinit = insertelement <2 x double> undef, double %conv, i64 0
1333  %vecinit5 = shufflevector <2 x double> %vecinit, <2 x double> poison, <2 x i32> zeroinitializer
1334  ret <2 x double> %vecinit5
1335}
1336