1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=ppc32-- | FileCheck %s --check-prefixes=CHECK,CHECK32,CHECK32_32 3; RUN: llc < %s -mtriple=ppc32-- -mcpu=ppc64 | FileCheck %s --check-prefixes=CHECK,CHECK32,CHECK32_64 4; RUN: llc < %s -mtriple=powerpc64le-- | FileCheck %s --check-prefixes=CHECK,CHECK64 5 6declare i8 @llvm.fshl.i8(i8, i8, i8) 7declare i16 @llvm.fshl.i16(i16, i16, i16) 8declare i32 @llvm.fshl.i32(i32, i32, i32) 9declare i64 @llvm.fshl.i64(i64, i64, i64) 10declare i128 @llvm.fshl.i128(i128, i128, i128) 11declare <4 x i32> @llvm.fshl.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) 12 13declare i8 @llvm.fshr.i8(i8, i8, i8) 14declare i16 @llvm.fshr.i16(i16, i16, i16) 15declare i32 @llvm.fshr.i32(i32, i32, i32) 16declare i64 @llvm.fshr.i64(i64, i64, i64) 17declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>) 18 19; General case - all operands can be variables. 20 21define i32 @fshl_i32(i32 %x, i32 %y, i32 %z) { 22; CHECK32-LABEL: fshl_i32: 23; CHECK32: # %bb.0: 24; CHECK32-NEXT: clrlwi 5, 5, 27 25; CHECK32-NEXT: slw 3, 3, 5 26; CHECK32-NEXT: subfic 5, 5, 32 27; CHECK32-NEXT: srw 4, 4, 5 28; CHECK32-NEXT: or 3, 3, 4 29; CHECK32-NEXT: blr 30; 31; CHECK64-LABEL: fshl_i32: 32; CHECK64: # %bb.0: 33; CHECK64-NEXT: clrlwi 5, 5, 27 34; CHECK64-NEXT: subfic 6, 5, 32 35; CHECK64-NEXT: slw 3, 3, 5 36; CHECK64-NEXT: srw 4, 4, 6 37; CHECK64-NEXT: or 3, 3, 4 38; CHECK64-NEXT: blr 39 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %z) 40 ret i32 %f 41} 42 43define i64 @fshl_i64(i64 %x, i64 %y, i64 %z) { 44; CHECK32_32-LABEL: fshl_i64: 45; CHECK32_32: # %bb.0: 46; CHECK32_32-NEXT: clrlwi 7, 8, 26 47; CHECK32_32-NEXT: not 8, 8 48; CHECK32_32-NEXT: rotlwi 6, 6, 31 49; CHECK32_32-NEXT: subfic 10, 7, 32 50; CHECK32_32-NEXT: srwi 9, 5, 1 51; CHECK32_32-NEXT: slw 3, 3, 7 52; CHECK32_32-NEXT: clrlwi 8, 8, 26 53; CHECK32_32-NEXT: rlwimi 6, 5, 31, 0, 0 54; CHECK32_32-NEXT: srw 5, 4, 10 55; CHECK32_32-NEXT: srw 10, 9, 8 56; CHECK32_32-NEXT: srw 6, 6, 8 57; CHECK32_32-NEXT: or 3, 3, 5 58; CHECK32_32-NEXT: subfic 5, 8, 32 59; CHECK32_32-NEXT: addi 8, 8, -32 60; CHECK32_32-NEXT: slw 5, 9, 5 61; CHECK32_32-NEXT: srw 8, 9, 8 62; CHECK32_32-NEXT: addi 9, 7, -32 63; CHECK32_32-NEXT: slw 9, 4, 9 64; CHECK32_32-NEXT: or 5, 6, 5 65; CHECK32_32-NEXT: or 3, 3, 9 66; CHECK32_32-NEXT: or 5, 5, 8 67; CHECK32_32-NEXT: slw 4, 4, 7 68; CHECK32_32-NEXT: or 3, 3, 10 69; CHECK32_32-NEXT: or 4, 4, 5 70; CHECK32_32-NEXT: blr 71; 72; CHECK32_64-LABEL: fshl_i64: 73; CHECK32_64: # %bb.0: 74; CHECK32_64-NEXT: clrlwi 7, 8, 26 75; CHECK32_64-NEXT: not 8, 8 76; CHECK32_64-NEXT: subfic 9, 7, 32 77; CHECK32_64-NEXT: rotlwi 6, 6, 31 78; CHECK32_64-NEXT: slw 3, 3, 7 79; CHECK32_64-NEXT: clrlwi 8, 8, 26 80; CHECK32_64-NEXT: srw 9, 4, 9 81; CHECK32_64-NEXT: rlwimi 6, 5, 31, 0, 0 82; CHECK32_64-NEXT: srwi 5, 5, 1 83; CHECK32_64-NEXT: addi 10, 7, -32 84; CHECK32_64-NEXT: or 3, 3, 9 85; CHECK32_64-NEXT: subfic 9, 8, 32 86; CHECK32_64-NEXT: slw 7, 4, 7 87; CHECK32_64-NEXT: slw 4, 4, 10 88; CHECK32_64-NEXT: srw 10, 5, 8 89; CHECK32_64-NEXT: srw 6, 6, 8 90; CHECK32_64-NEXT: addi 8, 8, -32 91; CHECK32_64-NEXT: slw 9, 5, 9 92; CHECK32_64-NEXT: srw 5, 5, 8 93; CHECK32_64-NEXT: or 6, 6, 9 94; CHECK32_64-NEXT: or 3, 3, 4 95; CHECK32_64-NEXT: or 4, 6, 5 96; CHECK32_64-NEXT: or 3, 3, 10 97; CHECK32_64-NEXT: or 4, 7, 4 98; CHECK32_64-NEXT: blr 99; 100; CHECK64-LABEL: fshl_i64: 101; CHECK64: # %bb.0: 102; CHECK64-NEXT: clrlwi 5, 5, 26 103; CHECK64-NEXT: subfic 6, 5, 64 104; CHECK64-NEXT: sld 3, 3, 5 105; CHECK64-NEXT: srd 4, 4, 6 106; CHECK64-NEXT: or 3, 3, 4 107; CHECK64-NEXT: blr 108 %f = call i64 @llvm.fshl.i64(i64 %x, i64 %y, i64 %z) 109 ret i64 %f 110} 111 112define i128 @fshl_i128(i128 %x, i128 %y, i128 %z) nounwind { 113; CHECK32_32-LABEL: fshl_i128: 114; CHECK32_32: # %bb.0: 115; CHECK32_32-NEXT: stwu 1, -64(1) 116; CHECK32_32-NEXT: lwz 0, 84(1) 117; CHECK32_32-NEXT: rotlwi 12, 8, 31 118; CHECK32_32-NEXT: srwi 11, 7, 1 119; CHECK32_32-NEXT: rlwimi 12, 7, 31, 0, 0 120; CHECK32_32-NEXT: andi. 7, 0, 127 121; CHECK32_32-NEXT: stw 27, 44(1) # 4-byte Folded Spill 122; CHECK32_32-NEXT: rotlwi 10, 10, 31 123; CHECK32_32-NEXT: stw 30, 56(1) # 4-byte Folded Spill 124; CHECK32_32-NEXT: rotlwi 30, 9, 31 125; CHECK32_32-NEXT: subfic 27, 7, 32 126; CHECK32_32-NEXT: stw 22, 24(1) # 4-byte Folded Spill 127; CHECK32_32-NEXT: rlwimi 10, 9, 31, 0, 0 128; CHECK32_32-NEXT: stw 25, 36(1) # 4-byte Folded Spill 129; CHECK32_32-NEXT: rlwimi 30, 8, 31, 0, 0 130; CHECK32_32-NEXT: stw 28, 48(1) # 4-byte Folded Spill 131; CHECK32_32-NEXT: not 8, 0 132; CHECK32_32-NEXT: subfic 9, 7, 96 133; CHECK32_32-NEXT: addi 0, 7, -64 134; CHECK32_32-NEXT: slw 28, 3, 7 135; CHECK32_32-NEXT: subfic 25, 7, 64 136; CHECK32_32-NEXT: srw 22, 4, 27 137; CHECK32_32-NEXT: stw 20, 16(1) # 4-byte Folded Spill 138; CHECK32_32-NEXT: srw 9, 6, 9 139; CHECK32_32-NEXT: stw 23, 28(1) # 4-byte Folded Spill 140; CHECK32_32-NEXT: slw 23, 5, 0 141; CHECK32_32-NEXT: stw 29, 52(1) # 4-byte Folded Spill 142; CHECK32_32-NEXT: addi 29, 7, -96 143; CHECK32_32-NEXT: srw 20, 5, 25 144; CHECK32_32-NEXT: or 28, 28, 22 145; CHECK32_32-NEXT: srw 22, 6, 25 146; CHECK32_32-NEXT: subfic 25, 25, 32 147; CHECK32_32-NEXT: stw 24, 32(1) # 4-byte Folded Spill 148; CHECK32_32-NEXT: mcrf 1, 0 149; CHECK32_32-NEXT: stw 26, 40(1) # 4-byte Folded Spill 150; CHECK32_32-NEXT: addi 26, 7, -32 151; CHECK32_32-NEXT: andi. 8, 8, 127 152; CHECK32_32-NEXT: slw 24, 5, 7 153; CHECK32_32-NEXT: slw 29, 6, 29 154; CHECK32_32-NEXT: or 9, 23, 9 155; CHECK32_32-NEXT: slw 25, 5, 25 156; CHECK32_32-NEXT: srw 5, 5, 27 157; CHECK32_32-NEXT: srw 27, 6, 27 158; CHECK32_32-NEXT: stw 21, 20(1) # 4-byte Folded Spill 159; CHECK32_32-NEXT: slw 21, 4, 26 160; CHECK32_32-NEXT: subfic 23, 8, 32 161; CHECK32_32-NEXT: or 27, 24, 27 162; CHECK32_32-NEXT: subfic 24, 8, 96 163; CHECK32_32-NEXT: or 9, 9, 29 164; CHECK32_32-NEXT: addi 29, 8, -64 165; CHECK32_32-NEXT: or 25, 22, 25 166; CHECK32_32-NEXT: stw 19, 12(1) # 4-byte Folded Spill 167; CHECK32_32-NEXT: srw 19, 12, 8 168; CHECK32_32-NEXT: or 28, 28, 21 169; CHECK32_32-NEXT: slw 21, 11, 23 170; CHECK32_32-NEXT: slw 24, 11, 24 171; CHECK32_32-NEXT: srw 22, 12, 29 172; CHECK32_32-NEXT: slw 26, 6, 26 173; CHECK32_32-NEXT: or 5, 25, 5 174; CHECK32_32-NEXT: addi 25, 8, -96 175; CHECK32_32-NEXT: or 21, 19, 21 176; CHECK32_32-NEXT: srw 19, 10, 8 177; CHECK32_32-NEXT: or 24, 22, 24 178; CHECK32_32-NEXT: slw 22, 30, 23 179; CHECK32_32-NEXT: or 27, 27, 26 180; CHECK32_32-NEXT: addi 26, 8, -32 181; CHECK32_32-NEXT: srw 25, 11, 25 182; CHECK32_32-NEXT: or 22, 19, 22 183; CHECK32_32-NEXT: or 28, 28, 20 184; CHECK32_32-NEXT: srw 20, 11, 26 185; CHECK32_32-NEXT: or 25, 24, 25 186; CHECK32_32-NEXT: subfic 24, 8, 64 187; CHECK32_32-NEXT: srw 26, 30, 26 188; CHECK32_32-NEXT: or 26, 22, 26 189; CHECK32_32-NEXT: subfic 22, 24, 32 190; CHECK32_32-NEXT: slw 23, 12, 23 191; CHECK32_32-NEXT: srw 22, 12, 22 192; CHECK32_32-NEXT: slw 12, 12, 24 193; CHECK32_32-NEXT: slw 24, 11, 24 194; CHECK32_32-NEXT: cmplwi 5, 7, 64 195; CHECK32_32-NEXT: or 24, 24, 22 196; CHECK32_32-NEXT: slw 22, 6, 0 197; CHECK32_32-NEXT: slw 6, 6, 7 198; CHECK32_32-NEXT: slw 7, 4, 7 199; CHECK32_32-NEXT: srw 29, 11, 29 200; CHECK32_32-NEXT: srw 11, 11, 8 201; CHECK32_32-NEXT: cmplwi 6, 8, 64 202; CHECK32_32-NEXT: srw 8, 30, 8 203; CHECK32_32-NEXT: or 5, 7, 5 204; CHECK32_32-NEXT: or 7, 26, 12 205; CHECK32_32-NEXT: or 12, 24, 23 206; CHECK32_32-NEXT: bc 12, 20, .LBB2_1 207; CHECK32_32-NEXT: b .LBB2_2 208; CHECK32_32-NEXT: .LBB2_1: 209; CHECK32_32-NEXT: addi 9, 28, 0 210; CHECK32_32-NEXT: .LBB2_2: 211; CHECK32_32-NEXT: li 28, 0 212; CHECK32_32-NEXT: bc 12, 20, .LBB2_4 213; CHECK32_32-NEXT: # %bb.3: 214; CHECK32_32-NEXT: ori 5, 22, 0 215; CHECK32_32-NEXT: b .LBB2_4 216; CHECK32_32-NEXT: .LBB2_4: 217; CHECK32_32-NEXT: bc 12, 24, .LBB2_6 218; CHECK32_32-NEXT: # %bb.5: 219; CHECK32_32-NEXT: ori 7, 25, 0 220; CHECK32_32-NEXT: b .LBB2_6 221; CHECK32_32-NEXT: .LBB2_6: 222; CHECK32_32-NEXT: or 8, 8, 12 223; CHECK32_32-NEXT: or 21, 21, 20 224; CHECK32_32-NEXT: bc 12, 20, .LBB2_8 225; CHECK32_32-NEXT: # %bb.7: 226; CHECK32_32-NEXT: ori 6, 28, 0 227; CHECK32_32-NEXT: b .LBB2_8 228; CHECK32_32-NEXT: .LBB2_8: 229; CHECK32_32-NEXT: bc 12, 6, .LBB2_10 230; CHECK32_32-NEXT: # %bb.9: 231; CHECK32_32-NEXT: ori 4, 5, 0 232; CHECK32_32-NEXT: b .LBB2_10 233; CHECK32_32-NEXT: .LBB2_10: 234; CHECK32_32-NEXT: bc 12, 2, .LBB2_12 235; CHECK32_32-NEXT: # %bb.11: 236; CHECK32_32-NEXT: ori 5, 7, 0 237; CHECK32_32-NEXT: b .LBB2_13 238; CHECK32_32-NEXT: .LBB2_12: 239; CHECK32_32-NEXT: addi 5, 10, 0 240; CHECK32_32-NEXT: .LBB2_13: 241; CHECK32_32-NEXT: bc 12, 24, .LBB2_15 242; CHECK32_32-NEXT: # %bb.14: 243; CHECK32_32-NEXT: ori 7, 29, 0 244; CHECK32_32-NEXT: ori 11, 28, 0 245; CHECK32_32-NEXT: ori 0, 28, 0 246; CHECK32_32-NEXT: b .LBB2_16 247; CHECK32_32-NEXT: .LBB2_15: 248; CHECK32_32-NEXT: addi 7, 8, 0 249; CHECK32_32-NEXT: addi 0, 21, 0 250; CHECK32_32-NEXT: .LBB2_16: 251; CHECK32_32-NEXT: bc 12, 6, .LBB2_18 252; CHECK32_32-NEXT: # %bb.17: 253; CHECK32_32-NEXT: ori 3, 9, 0 254; CHECK32_32-NEXT: b .LBB2_18 255; CHECK32_32-NEXT: .LBB2_18: 256; CHECK32_32-NEXT: lwz 29, 52(1) # 4-byte Folded Reload 257; CHECK32_32-NEXT: or 6, 6, 5 258; CHECK32_32-NEXT: bc 12, 20, .LBB2_20 259; CHECK32_32-NEXT: # %bb.19: 260; CHECK32_32-NEXT: ori 5, 28, 0 261; CHECK32_32-NEXT: b .LBB2_21 262; CHECK32_32-NEXT: .LBB2_20: 263; CHECK32_32-NEXT: addi 5, 27, 0 264; CHECK32_32-NEXT: .LBB2_21: 265; CHECK32_32-NEXT: bc 12, 2, .LBB2_22 266; CHECK32_32-NEXT: b .LBB2_23 267; CHECK32_32-NEXT: .LBB2_22: 268; CHECK32_32-NEXT: addi 7, 30, 0 269; CHECK32_32-NEXT: .LBB2_23: 270; CHECK32_32-NEXT: or 3, 3, 11 271; CHECK32_32-NEXT: or 4, 4, 0 272; CHECK32_32-NEXT: or 5, 5, 7 273; CHECK32_32-NEXT: lwz 30, 56(1) # 4-byte Folded Reload 274; CHECK32_32-NEXT: lwz 28, 48(1) # 4-byte Folded Reload 275; CHECK32_32-NEXT: lwz 27, 44(1) # 4-byte Folded Reload 276; CHECK32_32-NEXT: lwz 26, 40(1) # 4-byte Folded Reload 277; CHECK32_32-NEXT: lwz 25, 36(1) # 4-byte Folded Reload 278; CHECK32_32-NEXT: lwz 24, 32(1) # 4-byte Folded Reload 279; CHECK32_32-NEXT: lwz 23, 28(1) # 4-byte Folded Reload 280; CHECK32_32-NEXT: lwz 22, 24(1) # 4-byte Folded Reload 281; CHECK32_32-NEXT: lwz 21, 20(1) # 4-byte Folded Reload 282; CHECK32_32-NEXT: lwz 20, 16(1) # 4-byte Folded Reload 283; CHECK32_32-NEXT: lwz 19, 12(1) # 4-byte Folded Reload 284; CHECK32_32-NEXT: addi 1, 1, 64 285; CHECK32_32-NEXT: blr 286; 287; CHECK32_64-LABEL: fshl_i128: 288; CHECK32_64: # %bb.0: 289; CHECK32_64-NEXT: stwu 1, -64(1) 290; CHECK32_64-NEXT: lwz 12, 84(1) 291; CHECK32_64-NEXT: rotlwi 11, 8, 31 292; CHECK32_64-NEXT: rotlwi 10, 10, 31 293; CHECK32_64-NEXT: rlwimi 10, 9, 31, 0, 0 294; CHECK32_64-NEXT: rlwimi 11, 7, 31, 0, 0 295; CHECK32_64-NEXT: stw 30, 56(1) # 4-byte Folded Spill 296; CHECK32_64-NEXT: rotlwi 30, 9, 31 297; CHECK32_64-NEXT: stw 27, 44(1) # 4-byte Folded Spill 298; CHECK32_64-NEXT: not 9, 12 299; CHECK32_64-NEXT: rlwimi 30, 8, 31, 0, 0 300; CHECK32_64-NEXT: andi. 8, 12, 127 301; CHECK32_64-NEXT: stw 22, 24(1) # 4-byte Folded Spill 302; CHECK32_64-NEXT: mcrf 1, 0 303; CHECK32_64-NEXT: subfic 12, 8, 96 304; CHECK32_64-NEXT: addi 0, 8, -64 305; CHECK32_64-NEXT: subfic 27, 8, 32 306; CHECK32_64-NEXT: stw 23, 28(1) # 4-byte Folded Spill 307; CHECK32_64-NEXT: andi. 9, 9, 127 308; CHECK32_64-NEXT: srw 12, 6, 12 309; CHECK32_64-NEXT: stw 25, 36(1) # 4-byte Folded Spill 310; CHECK32_64-NEXT: subfic 25, 8, 64 311; CHECK32_64-NEXT: slw 23, 5, 0 312; CHECK32_64-NEXT: stw 26, 40(1) # 4-byte Folded Spill 313; CHECK32_64-NEXT: addi 26, 8, -32 314; CHECK32_64-NEXT: srw 22, 4, 27 315; CHECK32_64-NEXT: srwi 7, 7, 1 316; CHECK32_64-NEXT: or 12, 23, 12 317; CHECK32_64-NEXT: stw 28, 48(1) # 4-byte Folded Spill 318; CHECK32_64-NEXT: slw 28, 3, 8 319; CHECK32_64-NEXT: srw 23, 6, 25 320; CHECK32_64-NEXT: stw 18, 8(1) # 4-byte Folded Spill 321; CHECK32_64-NEXT: subfic 18, 9, 32 322; CHECK32_64-NEXT: or 28, 28, 22 323; CHECK32_64-NEXT: srw 22, 5, 27 324; CHECK32_64-NEXT: srw 27, 6, 27 325; CHECK32_64-NEXT: stw 20, 16(1) # 4-byte Folded Spill 326; CHECK32_64-NEXT: srw 20, 5, 25 327; CHECK32_64-NEXT: subfic 25, 25, 32 328; CHECK32_64-NEXT: stw 21, 20(1) # 4-byte Folded Spill 329; CHECK32_64-NEXT: slw 21, 4, 26 330; CHECK32_64-NEXT: slw 26, 6, 26 331; CHECK32_64-NEXT: or 28, 28, 21 332; CHECK32_64-NEXT: slw 21, 7, 18 333; CHECK32_64-NEXT: stw 24, 32(1) # 4-byte Folded Spill 334; CHECK32_64-NEXT: slw 24, 5, 8 335; CHECK32_64-NEXT: slw 5, 5, 25 336; CHECK32_64-NEXT: stw 29, 52(1) # 4-byte Folded Spill 337; CHECK32_64-NEXT: addi 29, 8, -96 338; CHECK32_64-NEXT: subfic 25, 9, 96 339; CHECK32_64-NEXT: slw 29, 6, 29 340; CHECK32_64-NEXT: or 27, 24, 27 341; CHECK32_64-NEXT: stw 19, 12(1) # 4-byte Folded Spill 342; CHECK32_64-NEXT: srw 19, 11, 9 343; CHECK32_64-NEXT: addi 24, 9, -64 344; CHECK32_64-NEXT: or 12, 12, 29 345; CHECK32_64-NEXT: srw 29, 10, 9 346; CHECK32_64-NEXT: slw 25, 7, 25 347; CHECK32_64-NEXT: or 21, 19, 21 348; CHECK32_64-NEXT: srw 19, 11, 24 349; CHECK32_64-NEXT: or 5, 23, 5 350; CHECK32_64-NEXT: slw 23, 30, 18 351; CHECK32_64-NEXT: or 27, 27, 26 352; CHECK32_64-NEXT: addi 26, 9, -96 353; CHECK32_64-NEXT: or 25, 19, 25 354; CHECK32_64-NEXT: lwz 19, 12(1) # 4-byte Folded Reload 355; CHECK32_64-NEXT: or 29, 29, 23 356; CHECK32_64-NEXT: addi 23, 9, -32 357; CHECK32_64-NEXT: srw 26, 7, 26 358; CHECK32_64-NEXT: or 28, 28, 20 359; CHECK32_64-NEXT: srw 20, 7, 23 360; CHECK32_64-NEXT: or 26, 25, 26 361; CHECK32_64-NEXT: subfic 25, 9, 64 362; CHECK32_64-NEXT: srw 23, 30, 23 363; CHECK32_64-NEXT: or 29, 29, 23 364; CHECK32_64-NEXT: subfic 23, 25, 32 365; CHECK32_64-NEXT: or 5, 5, 22 366; CHECK32_64-NEXT: slw 22, 11, 18 367; CHECK32_64-NEXT: lwz 18, 8(1) # 4-byte Folded Reload 368; CHECK32_64-NEXT: srw 23, 11, 23 369; CHECK32_64-NEXT: slw 11, 11, 25 370; CHECK32_64-NEXT: slw 25, 7, 25 371; CHECK32_64-NEXT: cmplwi 5, 8, 64 372; CHECK32_64-NEXT: bc 12, 20, .LBB2_1 373; CHECK32_64-NEXT: b .LBB2_2 374; CHECK32_64-NEXT: .LBB2_1: 375; CHECK32_64-NEXT: addi 12, 28, 0 376; CHECK32_64-NEXT: .LBB2_2: 377; CHECK32_64-NEXT: lwz 28, 48(1) # 4-byte Folded Reload 378; CHECK32_64-NEXT: or 25, 25, 23 379; CHECK32_64-NEXT: bc 12, 6, .LBB2_4 380; CHECK32_64-NEXT: # %bb.3: 381; CHECK32_64-NEXT: ori 3, 12, 0 382; CHECK32_64-NEXT: b .LBB2_4 383; CHECK32_64-NEXT: .LBB2_4: 384; CHECK32_64-NEXT: slw 23, 6, 0 385; CHECK32_64-NEXT: slw 6, 6, 8 386; CHECK32_64-NEXT: slw 8, 4, 8 387; CHECK32_64-NEXT: cmplwi 6, 9, 64 388; CHECK32_64-NEXT: or 5, 8, 5 389; CHECK32_64-NEXT: bc 12, 20, .LBB2_6 390; CHECK32_64-NEXT: # %bb.5: 391; CHECK32_64-NEXT: ori 5, 23, 0 392; CHECK32_64-NEXT: b .LBB2_6 393; CHECK32_64-NEXT: .LBB2_6: 394; CHECK32_64-NEXT: lwz 23, 28(1) # 4-byte Folded Reload 395; CHECK32_64-NEXT: li 8, 0 396; CHECK32_64-NEXT: srw 24, 7, 24 397; CHECK32_64-NEXT: bc 12, 6, .LBB2_8 398; CHECK32_64-NEXT: # %bb.7: 399; CHECK32_64-NEXT: ori 4, 5, 0 400; CHECK32_64-NEXT: b .LBB2_8 401; CHECK32_64-NEXT: .LBB2_8: 402; CHECK32_64-NEXT: bc 12, 20, .LBB2_10 403; CHECK32_64-NEXT: # %bb.9: 404; CHECK32_64-NEXT: ori 6, 8, 0 405; CHECK32_64-NEXT: b .LBB2_10 406; CHECK32_64-NEXT: .LBB2_10: 407; CHECK32_64-NEXT: srw 7, 7, 9 408; CHECK32_64-NEXT: srw 9, 30, 9 409; CHECK32_64-NEXT: bc 12, 24, .LBB2_12 410; CHECK32_64-NEXT: # %bb.11: 411; CHECK32_64-NEXT: ori 7, 8, 0 412; CHECK32_64-NEXT: b .LBB2_12 413; CHECK32_64-NEXT: .LBB2_12: 414; CHECK32_64-NEXT: or 0, 25, 22 415; CHECK32_64-NEXT: or 11, 29, 11 416; CHECK32_64-NEXT: lwz 29, 52(1) # 4-byte Folded Reload 417; CHECK32_64-NEXT: bc 12, 24, .LBB2_14 418; CHECK32_64-NEXT: # %bb.13: 419; CHECK32_64-NEXT: ori 5, 26, 0 420; CHECK32_64-NEXT: b .LBB2_15 421; CHECK32_64-NEXT: .LBB2_14: 422; CHECK32_64-NEXT: addi 5, 11, 0 423; CHECK32_64-NEXT: .LBB2_15: 424; CHECK32_64-NEXT: or 9, 9, 0 425; CHECK32_64-NEXT: or 21, 21, 20 426; CHECK32_64-NEXT: bc 12, 2, .LBB2_16 427; CHECK32_64-NEXT: b .LBB2_17 428; CHECK32_64-NEXT: .LBB2_16: 429; CHECK32_64-NEXT: addi 5, 10, 0 430; CHECK32_64-NEXT: .LBB2_17: 431; CHECK32_64-NEXT: bc 12, 24, .LBB2_19 432; CHECK32_64-NEXT: # %bb.18: 433; CHECK32_64-NEXT: ori 0, 8, 0 434; CHECK32_64-NEXT: b .LBB2_20 435; CHECK32_64-NEXT: .LBB2_19: 436; CHECK32_64-NEXT: addi 0, 21, 0 437; CHECK32_64-NEXT: .LBB2_20: 438; CHECK32_64-NEXT: bc 12, 20, .LBB2_21 439; CHECK32_64-NEXT: b .LBB2_22 440; CHECK32_64-NEXT: .LBB2_21: 441; CHECK32_64-NEXT: addi 8, 27, 0 442; CHECK32_64-NEXT: .LBB2_22: 443; CHECK32_64-NEXT: lwz 27, 44(1) # 4-byte Folded Reload 444; CHECK32_64-NEXT: or 3, 3, 7 445; CHECK32_64-NEXT: bc 12, 24, .LBB2_24 446; CHECK32_64-NEXT: # %bb.23: 447; CHECK32_64-NEXT: ori 7, 24, 0 448; CHECK32_64-NEXT: b .LBB2_25 449; CHECK32_64-NEXT: .LBB2_24: 450; CHECK32_64-NEXT: addi 7, 9, 0 451; CHECK32_64-NEXT: .LBB2_25: 452; CHECK32_64-NEXT: or 4, 4, 0 453; CHECK32_64-NEXT: bc 12, 2, .LBB2_26 454; CHECK32_64-NEXT: b .LBB2_27 455; CHECK32_64-NEXT: .LBB2_26: 456; CHECK32_64-NEXT: addi 7, 30, 0 457; CHECK32_64-NEXT: .LBB2_27: 458; CHECK32_64-NEXT: or 6, 6, 5 459; CHECK32_64-NEXT: or 5, 8, 7 460; CHECK32_64-NEXT: lwz 30, 56(1) # 4-byte Folded Reload 461; CHECK32_64-NEXT: lwz 26, 40(1) # 4-byte Folded Reload 462; CHECK32_64-NEXT: lwz 25, 36(1) # 4-byte Folded Reload 463; CHECK32_64-NEXT: lwz 24, 32(1) # 4-byte Folded Reload 464; CHECK32_64-NEXT: lwz 22, 24(1) # 4-byte Folded Reload 465; CHECK32_64-NEXT: lwz 21, 20(1) # 4-byte Folded Reload 466; CHECK32_64-NEXT: lwz 20, 16(1) # 4-byte Folded Reload 467; CHECK32_64-NEXT: addi 1, 1, 64 468; CHECK32_64-NEXT: blr 469; 470; CHECK64-LABEL: fshl_i128: 471; CHECK64: # %bb.0: 472; CHECK64-NEXT: clrlwi 8, 7, 25 473; CHECK64-NEXT: rotldi 5, 5, 63 474; CHECK64-NEXT: not 7, 7 475; CHECK64-NEXT: rldicl 9, 6, 63, 1 476; CHECK64-NEXT: subfic 10, 8, 64 477; CHECK64-NEXT: addi 11, 8, -64 478; CHECK64-NEXT: rldimi 5, 6, 63, 0 479; CHECK64-NEXT: clrlwi 6, 7, 25 480; CHECK64-NEXT: srd 7, 3, 10 481; CHECK64-NEXT: sld 10, 3, 11 482; CHECK64-NEXT: subfic 11, 6, 64 483; CHECK64-NEXT: addi 12, 6, -64 484; CHECK64-NEXT: sld 4, 4, 8 485; CHECK64-NEXT: srd 5, 5, 6 486; CHECK64-NEXT: sld 11, 9, 11 487; CHECK64-NEXT: or 4, 4, 7 488; CHECK64-NEXT: or 5, 5, 11 489; CHECK64-NEXT: srd 7, 9, 12 490; CHECK64-NEXT: or 4, 4, 10 491; CHECK64-NEXT: srd 6, 9, 6 492; CHECK64-NEXT: or 5, 5, 7 493; CHECK64-NEXT: sld 3, 3, 8 494; CHECK64-NEXT: or 4, 4, 6 495; CHECK64-NEXT: or 3, 3, 5 496; CHECK64-NEXT: blr 497 %f = call i128 @llvm.fshl.i128(i128 %x, i128 %y, i128 %z) 498 ret i128 %f 499} 500 501; Verify that weird types are minimally supported. 502declare i37 @llvm.fshl.i37(i37, i37, i37) 503define i37 @fshl_i37(i37 %x, i37 %y, i37 %z) { 504; CHECK32_32-LABEL: fshl_i37: 505; CHECK32_32: # %bb.0: 506; CHECK32_32-NEXT: mflr 0 507; CHECK32_32-NEXT: stw 0, 4(1) 508; CHECK32_32-NEXT: stwu 1, -32(1) 509; CHECK32_32-NEXT: .cfi_def_cfa_offset 32 510; CHECK32_32-NEXT: .cfi_offset lr, 4 511; CHECK32_32-NEXT: .cfi_offset r27, -20 512; CHECK32_32-NEXT: .cfi_offset r28, -16 513; CHECK32_32-NEXT: .cfi_offset r29, -12 514; CHECK32_32-NEXT: .cfi_offset r30, -8 515; CHECK32_32-NEXT: stw 27, 12(1) # 4-byte Folded Spill 516; CHECK32_32-NEXT: mr 27, 3 517; CHECK32_32-NEXT: stw 28, 16(1) # 4-byte Folded Spill 518; CHECK32_32-NEXT: mr 28, 4 519; CHECK32_32-NEXT: stw 29, 20(1) # 4-byte Folded Spill 520; CHECK32_32-NEXT: mr 29, 5 521; CHECK32_32-NEXT: stw 30, 24(1) # 4-byte Folded Spill 522; CHECK32_32-NEXT: mr 30, 6 523; CHECK32_32-NEXT: mr 3, 7 524; CHECK32_32-NEXT: mr 4, 8 525; CHECK32_32-NEXT: li 5, 0 526; CHECK32_32-NEXT: li 6, 37 527; CHECK32_32-NEXT: bl __umoddi3 528; CHECK32_32-NEXT: clrlwi 6, 4, 26 529; CHECK32_32-NEXT: srwi 3, 30, 6 530; CHECK32_32-NEXT: not 4, 4 531; CHECK32_32-NEXT: subfic 8, 6, 32 532; CHECK32_32-NEXT: slwi 5, 30, 26 533; CHECK32_32-NEXT: rlwimi 3, 29, 26, 1, 5 534; CHECK32_32-NEXT: slw 7, 27, 6 535; CHECK32_32-NEXT: clrlwi 4, 4, 26 536; CHECK32_32-NEXT: srw 8, 28, 8 537; CHECK32_32-NEXT: srw 9, 3, 4 538; CHECK32_32-NEXT: srw 5, 5, 4 539; CHECK32_32-NEXT: or 7, 7, 8 540; CHECK32_32-NEXT: subfic 8, 4, 32 541; CHECK32_32-NEXT: addi 4, 4, -32 542; CHECK32_32-NEXT: slw 8, 3, 8 543; CHECK32_32-NEXT: srw 4, 3, 4 544; CHECK32_32-NEXT: addi 3, 6, -32 545; CHECK32_32-NEXT: slw 3, 28, 3 546; CHECK32_32-NEXT: or 5, 5, 8 547; CHECK32_32-NEXT: or 3, 7, 3 548; CHECK32_32-NEXT: or 4, 5, 4 549; CHECK32_32-NEXT: slw 5, 28, 6 550; CHECK32_32-NEXT: or 3, 3, 9 551; CHECK32_32-NEXT: or 4, 5, 4 552; CHECK32_32-NEXT: lwz 30, 24(1) # 4-byte Folded Reload 553; CHECK32_32-NEXT: lwz 29, 20(1) # 4-byte Folded Reload 554; CHECK32_32-NEXT: lwz 28, 16(1) # 4-byte Folded Reload 555; CHECK32_32-NEXT: lwz 27, 12(1) # 4-byte Folded Reload 556; CHECK32_32-NEXT: lwz 0, 36(1) 557; CHECK32_32-NEXT: addi 1, 1, 32 558; CHECK32_32-NEXT: mtlr 0 559; CHECK32_32-NEXT: blr 560; 561; CHECK32_64-LABEL: fshl_i37: 562; CHECK32_64: # %bb.0: 563; CHECK32_64-NEXT: mflr 0 564; CHECK32_64-NEXT: stw 0, 4(1) 565; CHECK32_64-NEXT: stwu 1, -32(1) 566; CHECK32_64-NEXT: .cfi_def_cfa_offset 32 567; CHECK32_64-NEXT: .cfi_offset lr, 4 568; CHECK32_64-NEXT: .cfi_offset r27, -20 569; CHECK32_64-NEXT: .cfi_offset r28, -16 570; CHECK32_64-NEXT: .cfi_offset r29, -12 571; CHECK32_64-NEXT: .cfi_offset r30, -8 572; CHECK32_64-NEXT: stw 27, 12(1) # 4-byte Folded Spill 573; CHECK32_64-NEXT: mr 27, 3 574; CHECK32_64-NEXT: mr 3, 7 575; CHECK32_64-NEXT: stw 28, 16(1) # 4-byte Folded Spill 576; CHECK32_64-NEXT: mr 28, 4 577; CHECK32_64-NEXT: mr 4, 8 578; CHECK32_64-NEXT: stw 29, 20(1) # 4-byte Folded Spill 579; CHECK32_64-NEXT: mr 29, 5 580; CHECK32_64-NEXT: li 5, 0 581; CHECK32_64-NEXT: stw 30, 24(1) # 4-byte Folded Spill 582; CHECK32_64-NEXT: mr 30, 6 583; CHECK32_64-NEXT: li 6, 37 584; CHECK32_64-NEXT: bl __umoddi3 585; CHECK32_64-NEXT: clrlwi 6, 4, 26 586; CHECK32_64-NEXT: not 4, 4 587; CHECK32_64-NEXT: subfic 8, 6, 32 588; CHECK32_64-NEXT: srwi 3, 30, 6 589; CHECK32_64-NEXT: slw 7, 27, 6 590; CHECK32_64-NEXT: clrlwi 4, 4, 26 591; CHECK32_64-NEXT: lwz 27, 12(1) # 4-byte Folded Reload 592; CHECK32_64-NEXT: srw 8, 28, 8 593; CHECK32_64-NEXT: rlwimi 3, 29, 26, 1, 5 594; CHECK32_64-NEXT: lwz 29, 20(1) # 4-byte Folded Reload 595; CHECK32_64-NEXT: slwi 5, 30, 26 596; CHECK32_64-NEXT: or 7, 7, 8 597; CHECK32_64-NEXT: subfic 8, 4, 32 598; CHECK32_64-NEXT: lwz 30, 24(1) # 4-byte Folded Reload 599; CHECK32_64-NEXT: addi 9, 6, -32 600; CHECK32_64-NEXT: srw 10, 3, 4 601; CHECK32_64-NEXT: srw 5, 5, 4 602; CHECK32_64-NEXT: addi 4, 4, -32 603; CHECK32_64-NEXT: slw 8, 3, 8 604; CHECK32_64-NEXT: slw 9, 28, 9 605; CHECK32_64-NEXT: srw 3, 3, 4 606; CHECK32_64-NEXT: or 4, 5, 8 607; CHECK32_64-NEXT: slw 6, 28, 6 608; CHECK32_64-NEXT: or 5, 7, 9 609; CHECK32_64-NEXT: lwz 28, 16(1) # 4-byte Folded Reload 610; CHECK32_64-NEXT: or 4, 4, 3 611; CHECK32_64-NEXT: or 3, 5, 10 612; CHECK32_64-NEXT: lwz 0, 36(1) 613; CHECK32_64-NEXT: or 4, 6, 4 614; CHECK32_64-NEXT: addi 1, 1, 32 615; CHECK32_64-NEXT: mtlr 0 616; CHECK32_64-NEXT: blr 617; 618; CHECK64-LABEL: fshl_i37: 619; CHECK64: # %bb.0: 620; CHECK64-NEXT: lis 6, 28339 621; CHECK64-NEXT: sldi 4, 4, 27 622; CHECK64-NEXT: ori 6, 6, 58451 623; CHECK64-NEXT: rldic 6, 6, 33, 0 624; CHECK64-NEXT: oris 6, 6, 3542 625; CHECK64-NEXT: ori 6, 6, 31883 626; CHECK64-NEXT: mulhdu 6, 5, 6 627; CHECK64-NEXT: rldicl 6, 6, 59, 5 628; CHECK64-NEXT: mulli 6, 6, 37 629; CHECK64-NEXT: sub 5, 5, 6 630; CHECK64-NEXT: clrlwi 5, 5, 26 631; CHECK64-NEXT: subfic 6, 5, 64 632; CHECK64-NEXT: sld 3, 3, 5 633; CHECK64-NEXT: srd 4, 4, 6 634; CHECK64-NEXT: or 3, 3, 4 635; CHECK64-NEXT: blr 636 %f = call i37 @llvm.fshl.i37(i37 %x, i37 %y, i37 %z) 637 ret i37 %f 638} 639 640; extract(concat(0b1110000, 0b1111111) << 2) = 0b1000011 641 642declare i7 @llvm.fshl.i7(i7, i7, i7) 643define i7 @fshl_i7_const_fold() { 644; CHECK-LABEL: fshl_i7_const_fold: 645; CHECK: # %bb.0: 646; CHECK-NEXT: li 3, 67 647; CHECK-NEXT: blr 648 %f = call i7 @llvm.fshl.i7(i7 112, i7 127, i7 2) 649 ret i7 %f 650} 651 652; With constant shift amount, this is rotate + insert (missing extended mnemonics). 653 654define i32 @fshl_i32_const_shift(i32 %x, i32 %y) { 655; CHECK-LABEL: fshl_i32_const_shift: 656; CHECK: # %bb.0: 657; CHECK-NEXT: rotlwi 4, 4, 9 658; CHECK-NEXT: rlwimi 4, 3, 9, 0, 22 659; CHECK-NEXT: mr 3, 4 660; CHECK-NEXT: blr 661 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 9) 662 ret i32 %f 663} 664 665; Check modulo math on shift amount. 666 667define i32 @fshl_i32_const_overshift(i32 %x, i32 %y) { 668; CHECK-LABEL: fshl_i32_const_overshift: 669; CHECK: # %bb.0: 670; CHECK-NEXT: rotlwi 4, 4, 9 671; CHECK-NEXT: rlwimi 4, 3, 9, 0, 22 672; CHECK-NEXT: mr 3, 4 673; CHECK-NEXT: blr 674 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 41) 675 ret i32 %f 676} 677 678; 64-bit should also work. 679 680define i64 @fshl_i64_const_overshift(i64 %x, i64 %y) { 681; CHECK32-LABEL: fshl_i64_const_overshift: 682; CHECK32: # %bb.0: 683; CHECK32-NEXT: rotlwi 6, 6, 9 684; CHECK32-NEXT: rotlwi 3, 5, 9 685; CHECK32-NEXT: rlwimi 6, 5, 9, 0, 22 686; CHECK32-NEXT: rlwimi 3, 4, 9, 0, 22 687; CHECK32-NEXT: mr 4, 6 688; CHECK32-NEXT: blr 689; 690; CHECK64-LABEL: fshl_i64_const_overshift: 691; CHECK64: # %bb.0: 692; CHECK64-NEXT: rotldi 4, 4, 41 693; CHECK64-NEXT: rldimi 4, 3, 41, 0 694; CHECK64-NEXT: mr 3, 4 695; CHECK64-NEXT: blr 696 %f = call i64 @llvm.fshl.i64(i64 %x, i64 %y, i64 105) 697 ret i64 %f 698} 699 700; This should work without any node-specific logic. 701 702define i8 @fshl_i8_const_fold() { 703; CHECK-LABEL: fshl_i8_const_fold: 704; CHECK: # %bb.0: 705; CHECK-NEXT: li 3, 128 706; CHECK-NEXT: blr 707 %f = call i8 @llvm.fshl.i8(i8 255, i8 0, i8 7) 708 ret i8 %f 709} 710 711; Repeat everything for funnel shift right. 712 713; General case - all operands can be variables. 714 715define i32 @fshr_i32(i32 %x, i32 %y, i32 %z) { 716; CHECK32-LABEL: fshr_i32: 717; CHECK32: # %bb.0: 718; CHECK32-NEXT: clrlwi 5, 5, 27 719; CHECK32-NEXT: srw 4, 4, 5 720; CHECK32-NEXT: subfic 5, 5, 32 721; CHECK32-NEXT: slw 3, 3, 5 722; CHECK32-NEXT: or 3, 3, 4 723; CHECK32-NEXT: blr 724; 725; CHECK64-LABEL: fshr_i32: 726; CHECK64: # %bb.0: 727; CHECK64-NEXT: clrlwi 5, 5, 27 728; CHECK64-NEXT: subfic 6, 5, 32 729; CHECK64-NEXT: srw 4, 4, 5 730; CHECK64-NEXT: slw 3, 3, 6 731; CHECK64-NEXT: or 3, 3, 4 732; CHECK64-NEXT: blr 733 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %z) 734 ret i32 %f 735} 736 737define i64 @fshr_i64(i64 %x, i64 %y, i64 %z) { 738; CHECK32_32-LABEL: fshr_i64: 739; CHECK32_32: # %bb.0: 740; CHECK32_32-NEXT: clrlwi 7, 8, 26 741; CHECK32_32-NEXT: slwi 9, 4, 1 742; CHECK32_32-NEXT: not 8, 8 743; CHECK32_32-NEXT: rotlwi 4, 4, 1 744; CHECK32_32-NEXT: subfic 10, 7, 32 745; CHECK32_32-NEXT: srw 6, 6, 7 746; CHECK32_32-NEXT: clrlwi 8, 8, 26 747; CHECK32_32-NEXT: rlwimi 4, 3, 1, 0, 30 748; CHECK32_32-NEXT: slw 3, 5, 10 749; CHECK32_32-NEXT: slw 10, 9, 8 750; CHECK32_32-NEXT: slw 4, 4, 8 751; CHECK32_32-NEXT: or 3, 6, 3 752; CHECK32_32-NEXT: subfic 6, 8, 32 753; CHECK32_32-NEXT: addi 8, 8, -32 754; CHECK32_32-NEXT: srw 6, 9, 6 755; CHECK32_32-NEXT: slw 8, 9, 8 756; CHECK32_32-NEXT: addi 9, 7, -32 757; CHECK32_32-NEXT: srw 9, 5, 9 758; CHECK32_32-NEXT: or 3, 3, 9 759; CHECK32_32-NEXT: or 6, 4, 6 760; CHECK32_32-NEXT: or 4, 10, 3 761; CHECK32_32-NEXT: or 3, 6, 8 762; CHECK32_32-NEXT: srw 5, 5, 7 763; CHECK32_32-NEXT: or 3, 3, 5 764; CHECK32_32-NEXT: blr 765; 766; CHECK32_64-LABEL: fshr_i64: 767; CHECK32_64: # %bb.0: 768; CHECK32_64-NEXT: rotlwi 7, 4, 1 769; CHECK32_64-NEXT: slwi 4, 4, 1 770; CHECK32_64-NEXT: rlwimi 7, 3, 1, 0, 30 771; CHECK32_64-NEXT: clrlwi 3, 8, 26 772; CHECK32_64-NEXT: not 8, 8 773; CHECK32_64-NEXT: subfic 9, 3, 32 774; CHECK32_64-NEXT: srw 6, 6, 3 775; CHECK32_64-NEXT: clrlwi 8, 8, 26 776; CHECK32_64-NEXT: slw 9, 5, 9 777; CHECK32_64-NEXT: addi 10, 3, -32 778; CHECK32_64-NEXT: or 6, 6, 9 779; CHECK32_64-NEXT: subfic 9, 8, 32 780; CHECK32_64-NEXT: srw 3, 5, 3 781; CHECK32_64-NEXT: srw 5, 5, 10 782; CHECK32_64-NEXT: slw 10, 4, 8 783; CHECK32_64-NEXT: slw 7, 7, 8 784; CHECK32_64-NEXT: addi 8, 8, -32 785; CHECK32_64-NEXT: srw 9, 4, 9 786; CHECK32_64-NEXT: slw 4, 4, 8 787; CHECK32_64-NEXT: or 7, 7, 9 788; CHECK32_64-NEXT: or 5, 6, 5 789; CHECK32_64-NEXT: or 6, 7, 4 790; CHECK32_64-NEXT: or 4, 10, 5 791; CHECK32_64-NEXT: or 3, 6, 3 792; CHECK32_64-NEXT: blr 793; 794; CHECK64-LABEL: fshr_i64: 795; CHECK64: # %bb.0: 796; CHECK64-NEXT: clrlwi 5, 5, 26 797; CHECK64-NEXT: subfic 6, 5, 64 798; CHECK64-NEXT: srd 4, 4, 5 799; CHECK64-NEXT: sld 3, 3, 6 800; CHECK64-NEXT: or 3, 3, 4 801; CHECK64-NEXT: blr 802 %f = call i64 @llvm.fshr.i64(i64 %x, i64 %y, i64 %z) 803 ret i64 %f 804} 805 806; Verify that weird types are minimally supported. 807declare i37 @llvm.fshr.i37(i37, i37, i37) 808define i37 @fshr_i37(i37 %x, i37 %y, i37 %z) { 809; CHECK32_32-LABEL: fshr_i37: 810; CHECK32_32: # %bb.0: 811; CHECK32_32-NEXT: mflr 0 812; CHECK32_32-NEXT: stw 0, 4(1) 813; CHECK32_32-NEXT: stwu 1, -32(1) 814; CHECK32_32-NEXT: .cfi_def_cfa_offset 32 815; CHECK32_32-NEXT: .cfi_offset lr, 4 816; CHECK32_32-NEXT: .cfi_offset r27, -20 817; CHECK32_32-NEXT: .cfi_offset r28, -16 818; CHECK32_32-NEXT: .cfi_offset r29, -12 819; CHECK32_32-NEXT: .cfi_offset r30, -8 820; CHECK32_32-NEXT: stw 27, 12(1) # 4-byte Folded Spill 821; CHECK32_32-NEXT: mr 27, 3 822; CHECK32_32-NEXT: stw 28, 16(1) # 4-byte Folded Spill 823; CHECK32_32-NEXT: mr 28, 4 824; CHECK32_32-NEXT: stw 29, 20(1) # 4-byte Folded Spill 825; CHECK32_32-NEXT: mr 29, 5 826; CHECK32_32-NEXT: stw 30, 24(1) # 4-byte Folded Spill 827; CHECK32_32-NEXT: mr 30, 6 828; CHECK32_32-NEXT: mr 3, 7 829; CHECK32_32-NEXT: mr 4, 8 830; CHECK32_32-NEXT: li 5, 0 831; CHECK32_32-NEXT: li 6, 37 832; CHECK32_32-NEXT: bl __umoddi3 833; CHECK32_32-NEXT: addi 4, 4, 27 834; CHECK32_32-NEXT: rotlwi 5, 30, 27 835; CHECK32_32-NEXT: clrlwi 8, 4, 26 836; CHECK32_32-NEXT: slwi 3, 30, 27 837; CHECK32_32-NEXT: rotlwi 7, 28, 1 838; CHECK32_32-NEXT: rlwimi 5, 29, 27, 0, 4 839; CHECK32_32-NEXT: not 4, 4 840; CHECK32_32-NEXT: subfic 9, 8, 32 841; CHECK32_32-NEXT: slwi 6, 28, 1 842; CHECK32_32-NEXT: rlwimi 7, 27, 1, 0, 30 843; CHECK32_32-NEXT: srw 3, 3, 8 844; CHECK32_32-NEXT: clrlwi 4, 4, 26 845; CHECK32_32-NEXT: slw 9, 5, 9 846; CHECK32_32-NEXT: slw 10, 6, 4 847; CHECK32_32-NEXT: slw 7, 7, 4 848; CHECK32_32-NEXT: or 3, 3, 9 849; CHECK32_32-NEXT: subfic 9, 4, 32 850; CHECK32_32-NEXT: addi 4, 4, -32 851; CHECK32_32-NEXT: srw 9, 6, 9 852; CHECK32_32-NEXT: slw 6, 6, 4 853; CHECK32_32-NEXT: addi 4, 8, -32 854; CHECK32_32-NEXT: srw 4, 5, 4 855; CHECK32_32-NEXT: or 3, 3, 4 856; CHECK32_32-NEXT: or 7, 7, 9 857; CHECK32_32-NEXT: or 4, 10, 3 858; CHECK32_32-NEXT: or 3, 7, 6 859; CHECK32_32-NEXT: srw 5, 5, 8 860; CHECK32_32-NEXT: or 3, 3, 5 861; CHECK32_32-NEXT: lwz 30, 24(1) # 4-byte Folded Reload 862; CHECK32_32-NEXT: lwz 29, 20(1) # 4-byte Folded Reload 863; CHECK32_32-NEXT: lwz 28, 16(1) # 4-byte Folded Reload 864; CHECK32_32-NEXT: lwz 27, 12(1) # 4-byte Folded Reload 865; CHECK32_32-NEXT: lwz 0, 36(1) 866; CHECK32_32-NEXT: addi 1, 1, 32 867; CHECK32_32-NEXT: mtlr 0 868; CHECK32_32-NEXT: blr 869; 870; CHECK32_64-LABEL: fshr_i37: 871; CHECK32_64: # %bb.0: 872; CHECK32_64-NEXT: mflr 0 873; CHECK32_64-NEXT: stw 0, 4(1) 874; CHECK32_64-NEXT: stwu 1, -32(1) 875; CHECK32_64-NEXT: .cfi_def_cfa_offset 32 876; CHECK32_64-NEXT: .cfi_offset lr, 4 877; CHECK32_64-NEXT: .cfi_offset r27, -20 878; CHECK32_64-NEXT: .cfi_offset r28, -16 879; CHECK32_64-NEXT: .cfi_offset r29, -12 880; CHECK32_64-NEXT: .cfi_offset r30, -8 881; CHECK32_64-NEXT: stw 27, 12(1) # 4-byte Folded Spill 882; CHECK32_64-NEXT: mr 27, 3 883; CHECK32_64-NEXT: mr 3, 7 884; CHECK32_64-NEXT: stw 28, 16(1) # 4-byte Folded Spill 885; CHECK32_64-NEXT: mr 28, 4 886; CHECK32_64-NEXT: mr 4, 8 887; CHECK32_64-NEXT: stw 29, 20(1) # 4-byte Folded Spill 888; CHECK32_64-NEXT: mr 29, 5 889; CHECK32_64-NEXT: li 5, 0 890; CHECK32_64-NEXT: stw 30, 24(1) # 4-byte Folded Spill 891; CHECK32_64-NEXT: mr 30, 6 892; CHECK32_64-NEXT: li 6, 37 893; CHECK32_64-NEXT: bl __umoddi3 894; CHECK32_64-NEXT: addi 4, 4, 27 895; CHECK32_64-NEXT: rotlwi 3, 30, 27 896; CHECK32_64-NEXT: clrlwi 8, 4, 26 897; CHECK32_64-NEXT: rlwimi 3, 29, 27, 0, 4 898; CHECK32_64-NEXT: lwz 29, 20(1) # 4-byte Folded Reload 899; CHECK32_64-NEXT: slwi 6, 30, 27 900; CHECK32_64-NEXT: lwz 30, 24(1) # 4-byte Folded Reload 901; CHECK32_64-NEXT: not 4, 4 902; CHECK32_64-NEXT: subfic 9, 8, 32 903; CHECK32_64-NEXT: rotlwi 5, 28, 1 904; CHECK32_64-NEXT: srw 6, 6, 8 905; CHECK32_64-NEXT: clrlwi 4, 4, 26 906; CHECK32_64-NEXT: slw 9, 3, 9 907; CHECK32_64-NEXT: rlwimi 5, 27, 1, 0, 30 908; CHECK32_64-NEXT: slwi 7, 28, 1 909; CHECK32_64-NEXT: lwz 28, 16(1) # 4-byte Folded Reload 910; CHECK32_64-NEXT: addi 10, 8, -32 911; CHECK32_64-NEXT: lwz 27, 12(1) # 4-byte Folded Reload 912; CHECK32_64-NEXT: or 6, 6, 9 913; CHECK32_64-NEXT: subfic 9, 4, 32 914; CHECK32_64-NEXT: srw 8, 3, 8 915; CHECK32_64-NEXT: srw 3, 3, 10 916; CHECK32_64-NEXT: lwz 0, 36(1) 917; CHECK32_64-NEXT: slw 10, 7, 4 918; CHECK32_64-NEXT: slw 5, 5, 4 919; CHECK32_64-NEXT: addi 4, 4, -32 920; CHECK32_64-NEXT: srw 9, 7, 9 921; CHECK32_64-NEXT: slw 4, 7, 4 922; CHECK32_64-NEXT: or 5, 5, 9 923; CHECK32_64-NEXT: or 3, 6, 3 924; CHECK32_64-NEXT: or 5, 5, 4 925; CHECK32_64-NEXT: or 4, 10, 3 926; CHECK32_64-NEXT: or 3, 5, 8 927; CHECK32_64-NEXT: addi 1, 1, 32 928; CHECK32_64-NEXT: mtlr 0 929; CHECK32_64-NEXT: blr 930; 931; CHECK64-LABEL: fshr_i37: 932; CHECK64: # %bb.0: 933; CHECK64-NEXT: lis 6, 28339 934; CHECK64-NEXT: sldi 4, 4, 27 935; CHECK64-NEXT: ori 6, 6, 58451 936; CHECK64-NEXT: rldic 6, 6, 33, 0 937; CHECK64-NEXT: oris 6, 6, 3542 938; CHECK64-NEXT: ori 6, 6, 31883 939; CHECK64-NEXT: mulhdu 6, 5, 6 940; CHECK64-NEXT: rldicl 6, 6, 59, 5 941; CHECK64-NEXT: mulli 6, 6, 37 942; CHECK64-NEXT: sub 5, 5, 6 943; CHECK64-NEXT: addi 5, 5, 27 944; CHECK64-NEXT: clrlwi 5, 5, 26 945; CHECK64-NEXT: subfic 6, 5, 64 946; CHECK64-NEXT: srd 4, 4, 5 947; CHECK64-NEXT: sld 3, 3, 6 948; CHECK64-NEXT: or 3, 3, 4 949; CHECK64-NEXT: blr 950 %f = call i37 @llvm.fshr.i37(i37 %x, i37 %y, i37 %z) 951 ret i37 %f 952} 953 954; extract(concat(0b1110000, 0b1111111) >> 2) = 0b0011111 955 956declare i7 @llvm.fshr.i7(i7, i7, i7) 957define i7 @fshr_i7_const_fold() { 958; CHECK-LABEL: fshr_i7_const_fold: 959; CHECK: # %bb.0: 960; CHECK-NEXT: li 3, 31 961; CHECK-NEXT: blr 962 %f = call i7 @llvm.fshr.i7(i7 112, i7 127, i7 2) 963 ret i7 %f 964} 965 966; With constant shift amount, this is rotate + insert (missing extended mnemonics). 967 968define i32 @fshr_i32_const_shift(i32 %x, i32 %y) { 969; CHECK-LABEL: fshr_i32_const_shift: 970; CHECK: # %bb.0: 971; CHECK-NEXT: rotlwi 4, 4, 23 972; CHECK-NEXT: rlwimi 4, 3, 23, 0, 8 973; CHECK-NEXT: mr 3, 4 974; CHECK-NEXT: blr 975 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 9) 976 ret i32 %f 977} 978 979; Check modulo math on shift amount. 41-32=9. 980 981define i32 @fshr_i32_const_overshift(i32 %x, i32 %y) { 982; CHECK-LABEL: fshr_i32_const_overshift: 983; CHECK: # %bb.0: 984; CHECK-NEXT: rotlwi 4, 4, 23 985; CHECK-NEXT: rlwimi 4, 3, 23, 0, 8 986; CHECK-NEXT: mr 3, 4 987; CHECK-NEXT: blr 988 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 41) 989 ret i32 %f 990} 991 992; 64-bit should also work. 105-64 = 41. 993 994define i64 @fshr_i64_const_overshift(i64 %x, i64 %y) { 995; CHECK32-LABEL: fshr_i64_const_overshift: 996; CHECK32: # %bb.0: 997; CHECK32-NEXT: rotlwi 6, 4, 23 998; CHECK32-NEXT: rotlwi 5, 5, 23 999; CHECK32-NEXT: rlwimi 6, 3, 23, 0, 8 1000; CHECK32-NEXT: rlwimi 5, 4, 23, 0, 8 1001; CHECK32-NEXT: mr 3, 6 1002; CHECK32-NEXT: mr 4, 5 1003; CHECK32-NEXT: blr 1004; 1005; CHECK64-LABEL: fshr_i64_const_overshift: 1006; CHECK64: # %bb.0: 1007; CHECK64-NEXT: rotldi 4, 4, 23 1008; CHECK64-NEXT: rldimi 4, 3, 23, 0 1009; CHECK64-NEXT: mr 3, 4 1010; CHECK64-NEXT: blr 1011 %f = call i64 @llvm.fshr.i64(i64 %x, i64 %y, i64 105) 1012 ret i64 %f 1013} 1014 1015; This should work without any node-specific logic. 1016 1017define i8 @fshr_i8_const_fold() { 1018; CHECK-LABEL: fshr_i8_const_fold: 1019; CHECK: # %bb.0: 1020; CHECK-NEXT: li 3, 254 1021; CHECK-NEXT: blr 1022 %f = call i8 @llvm.fshr.i8(i8 255, i8 0, i8 7) 1023 ret i8 %f 1024} 1025 1026define i32 @fshl_i32_shift_by_bitwidth(i32 %x, i32 %y) { 1027; CHECK-LABEL: fshl_i32_shift_by_bitwidth: 1028; CHECK: # %bb.0: 1029; CHECK-NEXT: blr 1030 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 32) 1031 ret i32 %f 1032} 1033 1034define i32 @fshr_i32_shift_by_bitwidth(i32 %x, i32 %y) { 1035; CHECK-LABEL: fshr_i32_shift_by_bitwidth: 1036; CHECK: # %bb.0: 1037; CHECK-NEXT: mr 3, 4 1038; CHECK-NEXT: blr 1039 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 32) 1040 ret i32 %f 1041} 1042 1043define <4 x i32> @fshl_v4i32_shift_by_bitwidth(<4 x i32> %x, <4 x i32> %y) { 1044; CHECK-LABEL: fshl_v4i32_shift_by_bitwidth: 1045; CHECK: # %bb.0: 1046; CHECK-NEXT: blr 1047 %f = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 32, i32 32, i32 32, i32 32>) 1048 ret <4 x i32> %f 1049} 1050 1051define <4 x i32> @fshr_v4i32_shift_by_bitwidth(<4 x i32> %x, <4 x i32> %y) { 1052; CHECK32_32-LABEL: fshr_v4i32_shift_by_bitwidth: 1053; CHECK32_32: # %bb.0: 1054; CHECK32_32-NEXT: mr 6, 10 1055; CHECK32_32-NEXT: mr 5, 9 1056; CHECK32_32-NEXT: mr 4, 8 1057; CHECK32_32-NEXT: mr 3, 7 1058; CHECK32_32-NEXT: blr 1059; 1060; CHECK32_64-LABEL: fshr_v4i32_shift_by_bitwidth: 1061; CHECK32_64: # %bb.0: 1062; CHECK32_64-NEXT: vmr 2, 3 1063; CHECK32_64-NEXT: blr 1064; 1065; CHECK64-LABEL: fshr_v4i32_shift_by_bitwidth: 1066; CHECK64: # %bb.0: 1067; CHECK64-NEXT: vmr 2, 3 1068; CHECK64-NEXT: blr 1069 %f = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 32, i32 32, i32 32, i32 32>) 1070 ret <4 x i32> %f 1071} 1072 1073