1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s -mtriple=powerpc64-unknown-linux -mcpu=pwr8 | FileCheck %s
3; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s -mtriple=powerpc64le-unknown-linux -mcpu=pwr9 | FileCheck %s
4; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s -mtriple=powerpc64le-unknown-linux -mcpu=pwr8 -mattr=-vsx | FileCheck %s -check-prefix=NOVSX
5; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s -mtriple=powerpc-unknown-linux -mattr=spe | FileCheck %s -check-prefix=SPE
6
7declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)
8declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)
9declare <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float>, <4 x float>, metadata, metadata)
10declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata)
11
12declare float @llvm.experimental.constrained.fsub.f32(float, float, metadata, metadata)
13declare double @llvm.experimental.constrained.fsub.f64(double, double, metadata, metadata)
14declare <4 x float> @llvm.experimental.constrained.fsub.v4f32(<4 x float>, <4 x float>, metadata, metadata)
15declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata)
16
17declare float @llvm.experimental.constrained.fmul.f32(float, float, metadata, metadata)
18declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata)
19declare <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float>, <4 x float>, metadata, metadata)
20declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata)
21
22declare float @llvm.experimental.constrained.fdiv.f32(float, float, metadata, metadata)
23declare double @llvm.experimental.constrained.fdiv.f64(double, double, metadata, metadata)
24declare <4 x float> @llvm.experimental.constrained.fdiv.v4f32(<4 x float>, <4 x float>, metadata, metadata)
25declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata)
26
27declare float @llvm.experimental.constrained.fma.f32(float, float, float, metadata, metadata)
28declare double @llvm.experimental.constrained.fma.f64(double, double, double, metadata, metadata)
29declare <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float>, <4 x float>, <4 x float>, metadata, metadata)
30declare <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double>, <2 x double>, <2 x double>, metadata, metadata)
31
32declare float @llvm.experimental.constrained.sqrt.f32(float, metadata, metadata)
33declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata)
34declare <4 x float> @llvm.experimental.constrained.sqrt.v4f32(<4 x float>, metadata, metadata)
35declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata)
36
37define float @fadd_f32(float %f1, float %f2) #0 {
38; CHECK-LABEL: fadd_f32:
39; CHECK:       # %bb.0:
40; CHECK-NEXT:    xsaddsp f1, f1, f2
41; CHECK-NEXT:    blr
42;
43; NOVSX-LABEL: fadd_f32:
44; NOVSX:       # %bb.0:
45; NOVSX-NEXT:    fadds f1, f1, f2
46; NOVSX-NEXT:    blr
47;
48; SPE-LABEL: fadd_f32:
49; SPE:       # %bb.0:
50; SPE-NEXT:    efsadd r3, r3, r4
51; SPE-NEXT:    blr
52  %res = call float @llvm.experimental.constrained.fadd.f32(
53                        float %f1, float %f2,
54                        metadata !"round.dynamic",
55                        metadata !"fpexcept.strict") #0
56  ret float %res
57}
58
59define double @fadd_f64(double %f1, double %f2) #0 {
60; CHECK-LABEL: fadd_f64:
61; CHECK:       # %bb.0:
62; CHECK-NEXT:    xsadddp f1, f1, f2
63; CHECK-NEXT:    blr
64;
65; NOVSX-LABEL: fadd_f64:
66; NOVSX:       # %bb.0:
67; NOVSX-NEXT:    fadd f1, f1, f2
68; NOVSX-NEXT:    blr
69;
70; SPE-LABEL: fadd_f64:
71; SPE:       # %bb.0:
72; SPE-NEXT:    evmergelo r5, r5, r6
73; SPE-NEXT:    evmergelo r3, r3, r4
74; SPE-NEXT:    efdadd r4, r3, r5
75; SPE-NEXT:    evmergehi r3, r4, r4
76; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
77; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
78; SPE-NEXT:    blr
79  %res = call double @llvm.experimental.constrained.fadd.f64(
80                        double %f1, double %f2,
81                        metadata !"round.dynamic",
82                        metadata !"fpexcept.strict") #0
83  ret double %res
84}
85
86define <4 x float> @fadd_v4f32(<4 x float> %vf1, <4 x float> %vf2) #0 {
87; CHECK-LABEL: fadd_v4f32:
88; CHECK:       # %bb.0:
89; CHECK-NEXT:    xvaddsp v2, v2, v3
90; CHECK-NEXT:    blr
91;
92; NOVSX-LABEL: fadd_v4f32:
93; NOVSX:       # %bb.0:
94; NOVSX-NEXT:    addi r3, r1, -32
95; NOVSX-NEXT:    addi r4, r1, -48
96; NOVSX-NEXT:    stvx v3, 0, r3
97; NOVSX-NEXT:    stvx v2, 0, r4
98; NOVSX-NEXT:    addi r3, r1, -16
99; NOVSX-NEXT:    lfs f0, -20(r1)
100; NOVSX-NEXT:    lfs f1, -36(r1)
101; NOVSX-NEXT:    fadds f0, f1, f0
102; NOVSX-NEXT:    lfs f1, -40(r1)
103; NOVSX-NEXT:    stfs f0, -4(r1)
104; NOVSX-NEXT:    lfs f0, -24(r1)
105; NOVSX-NEXT:    fadds f0, f1, f0
106; NOVSX-NEXT:    lfs f1, -44(r1)
107; NOVSX-NEXT:    stfs f0, -8(r1)
108; NOVSX-NEXT:    lfs f0, -28(r1)
109; NOVSX-NEXT:    fadds f0, f1, f0
110; NOVSX-NEXT:    lfs f1, -48(r1)
111; NOVSX-NEXT:    stfs f0, -12(r1)
112; NOVSX-NEXT:    lfs f0, -32(r1)
113; NOVSX-NEXT:    fadds f0, f1, f0
114; NOVSX-NEXT:    stfs f0, -16(r1)
115; NOVSX-NEXT:    lvx v2, 0, r3
116; NOVSX-NEXT:    blr
117;
118; SPE-LABEL: fadd_v4f32:
119; SPE:       # %bb.0:
120; SPE-NEXT:    efsadd r6, r6, r10
121; SPE-NEXT:    efsadd r5, r5, r9
122; SPE-NEXT:    efsadd r4, r4, r8
123; SPE-NEXT:    efsadd r3, r3, r7
124; SPE-NEXT:    blr
125  %res = call <4 x float> @llvm.experimental.constrained.fadd.v4f32(
126                        <4 x float> %vf1, <4 x float> %vf2,
127                        metadata !"round.dynamic",
128                        metadata !"fpexcept.strict") #0
129  ret <4 x float> %res
130}
131
132define <2 x double> @fadd_v2f64(<2 x double> %vf1, <2 x double> %vf2) #0 {
133; CHECK-LABEL: fadd_v2f64:
134; CHECK:       # %bb.0:
135; CHECK-NEXT:    xvadddp v2, v2, v3
136; CHECK-NEXT:    blr
137;
138; NOVSX-LABEL: fadd_v2f64:
139; NOVSX:       # %bb.0:
140; NOVSX-NEXT:    fadd f2, f2, f4
141; NOVSX-NEXT:    fadd f1, f1, f3
142; NOVSX-NEXT:    blr
143;
144; SPE-LABEL: fadd_v2f64:
145; SPE:       # %bb.0:
146; SPE-NEXT:    evldd r4, 8(r1)
147; SPE-NEXT:    evmergelo r7, r7, r8
148; SPE-NEXT:    evmergelo r8, r9, r10
149; SPE-NEXT:    li r9, 8
150; SPE-NEXT:    evmergelo r5, r5, r6
151; SPE-NEXT:    efdadd r4, r7, r4
152; SPE-NEXT:    evstddx r4, r3, r9
153; SPE-NEXT:    efdadd r4, r5, r8
154; SPE-NEXT:    evstdd r4, 0(r3)
155; SPE-NEXT:    blr
156  %res = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(
157                        <2 x double> %vf1, <2 x double> %vf2,
158                        metadata !"round.dynamic",
159                        metadata !"fpexcept.strict") #0
160  ret <2 x double> %res
161}
162
163define float @fsub_f32(float %f1, float %f2) #0 {
164; CHECK-LABEL: fsub_f32:
165; CHECK:       # %bb.0:
166; CHECK-NEXT:    xssubsp f1, f1, f2
167; CHECK-NEXT:    blr
168;
169; NOVSX-LABEL: fsub_f32:
170; NOVSX:       # %bb.0:
171; NOVSX-NEXT:    fsubs f1, f1, f2
172; NOVSX-NEXT:    blr
173;
174; SPE-LABEL: fsub_f32:
175; SPE:       # %bb.0:
176; SPE-NEXT:    efssub r3, r3, r4
177; SPE-NEXT:    blr
178
179  %res = call float @llvm.experimental.constrained.fsub.f32(
180                        float %f1, float %f2,
181                        metadata !"round.dynamic",
182                        metadata !"fpexcept.strict") #0
183  ret float %res;
184}
185
186define double @fsub_f64(double %f1, double %f2) #0 {
187; CHECK-LABEL: fsub_f64:
188; CHECK:       # %bb.0:
189; CHECK-NEXT:    xssubdp f1, f1, f2
190; CHECK-NEXT:    blr
191;
192; NOVSX-LABEL: fsub_f64:
193; NOVSX:       # %bb.0:
194; NOVSX-NEXT:    fsub f1, f1, f2
195; NOVSX-NEXT:    blr
196;
197; SPE-LABEL: fsub_f64:
198; SPE:       # %bb.0:
199; SPE-NEXT:    evmergelo r5, r5, r6
200; SPE-NEXT:    evmergelo r3, r3, r4
201; SPE-NEXT:    efdsub r4, r3, r5
202; SPE-NEXT:    evmergehi r3, r4, r4
203; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
204; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
205; SPE-NEXT:    blr
206
207  %res = call double @llvm.experimental.constrained.fsub.f64(
208                        double %f1, double %f2,
209                        metadata !"round.dynamic",
210                        metadata !"fpexcept.strict") #0
211  ret double %res;
212}
213
214define <4 x float> @fsub_v4f32(<4 x float> %vf1, <4 x float> %vf2) #0 {
215; CHECK-LABEL: fsub_v4f32:
216; CHECK:       # %bb.0:
217; CHECK-NEXT:    xvsubsp v2, v2, v3
218; CHECK-NEXT:    blr
219;
220; NOVSX-LABEL: fsub_v4f32:
221; NOVSX:       # %bb.0:
222; NOVSX-NEXT:    addi r3, r1, -32
223; NOVSX-NEXT:    addi r4, r1, -48
224; NOVSX-NEXT:    stvx v3, 0, r3
225; NOVSX-NEXT:    stvx v2, 0, r4
226; NOVSX-NEXT:    addi r3, r1, -16
227; NOVSX-NEXT:    lfs f0, -20(r1)
228; NOVSX-NEXT:    lfs f1, -36(r1)
229; NOVSX-NEXT:    fsubs f0, f1, f0
230; NOVSX-NEXT:    lfs f1, -40(r1)
231; NOVSX-NEXT:    stfs f0, -4(r1)
232; NOVSX-NEXT:    lfs f0, -24(r1)
233; NOVSX-NEXT:    fsubs f0, f1, f0
234; NOVSX-NEXT:    lfs f1, -44(r1)
235; NOVSX-NEXT:    stfs f0, -8(r1)
236; NOVSX-NEXT:    lfs f0, -28(r1)
237; NOVSX-NEXT:    fsubs f0, f1, f0
238; NOVSX-NEXT:    lfs f1, -48(r1)
239; NOVSX-NEXT:    stfs f0, -12(r1)
240; NOVSX-NEXT:    lfs f0, -32(r1)
241; NOVSX-NEXT:    fsubs f0, f1, f0
242; NOVSX-NEXT:    stfs f0, -16(r1)
243; NOVSX-NEXT:    lvx v2, 0, r3
244; NOVSX-NEXT:    blr
245;
246; SPE-LABEL: fsub_v4f32:
247; SPE:       # %bb.0:
248; SPE-NEXT:    efssub r6, r6, r10
249; SPE-NEXT:    efssub r5, r5, r9
250; SPE-NEXT:    efssub r4, r4, r8
251; SPE-NEXT:    efssub r3, r3, r7
252; SPE-NEXT:    blr
253  %res = call <4 x float> @llvm.experimental.constrained.fsub.v4f32(
254                        <4 x float> %vf1, <4 x float> %vf2,
255                        metadata !"round.dynamic",
256                        metadata !"fpexcept.strict") #0
257  ret <4 x float> %res;
258}
259
260define <2 x double> @fsub_v2f64(<2 x double> %vf1, <2 x double> %vf2) #0 {
261; CHECK-LABEL: fsub_v2f64:
262; CHECK:       # %bb.0:
263; CHECK-NEXT:    xvsubdp v2, v2, v3
264; CHECK-NEXT:    blr
265;
266; NOVSX-LABEL: fsub_v2f64:
267; NOVSX:       # %bb.0:
268; NOVSX-NEXT:    fsub f2, f2, f4
269; NOVSX-NEXT:    fsub f1, f1, f3
270; NOVSX-NEXT:    blr
271;
272; SPE-LABEL: fsub_v2f64:
273; SPE:       # %bb.0:
274; SPE-NEXT:    evldd r4, 8(r1)
275; SPE-NEXT:    evmergelo r7, r7, r8
276; SPE-NEXT:    evmergelo r8, r9, r10
277; SPE-NEXT:    li r9, 8
278; SPE-NEXT:    evmergelo r5, r5, r6
279; SPE-NEXT:    efdsub r4, r7, r4
280; SPE-NEXT:    evstddx r4, r3, r9
281; SPE-NEXT:    efdsub r4, r5, r8
282; SPE-NEXT:    evstdd r4, 0(r3)
283; SPE-NEXT:    blr
284  %res = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(
285                        <2 x double> %vf1, <2 x double> %vf2,
286                        metadata !"round.dynamic",
287                        metadata !"fpexcept.strict") #0
288  ret <2 x double> %res;
289}
290
291define float @fmul_f32(float %f1, float %f2) #0 {
292; CHECK-LABEL: fmul_f32:
293; CHECK:       # %bb.0:
294; CHECK-NEXT:    xsmulsp f1, f1, f2
295; CHECK-NEXT:    blr
296;
297; NOVSX-LABEL: fmul_f32:
298; NOVSX:       # %bb.0:
299; NOVSX-NEXT:    fmuls f1, f1, f2
300; NOVSX-NEXT:    blr
301;
302; SPE-LABEL: fmul_f32:
303; SPE:       # %bb.0:
304; SPE-NEXT:    efsmul r3, r3, r4
305; SPE-NEXT:    blr
306
307  %res = call float @llvm.experimental.constrained.fmul.f32(
308                        float %f1, float %f2,
309                        metadata !"round.dynamic",
310                        metadata !"fpexcept.strict") #0
311  ret float %res;
312}
313
314define double @fmul_f64(double %f1, double %f2) #0 {
315; CHECK-LABEL: fmul_f64:
316; CHECK:       # %bb.0:
317; CHECK-NEXT:    xsmuldp f1, f1, f2
318; CHECK-NEXT:    blr
319;
320; NOVSX-LABEL: fmul_f64:
321; NOVSX:       # %bb.0:
322; NOVSX-NEXT:    fmul f1, f1, f2
323; NOVSX-NEXT:    blr
324;
325; SPE-LABEL: fmul_f64:
326; SPE:       # %bb.0:
327; SPE-NEXT:    evmergelo r5, r5, r6
328; SPE-NEXT:    evmergelo r3, r3, r4
329; SPE-NEXT:    efdmul r4, r3, r5
330; SPE-NEXT:    evmergehi r3, r4, r4
331; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
332; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
333; SPE-NEXT:    blr
334
335  %res = call double @llvm.experimental.constrained.fmul.f64(
336                        double %f1, double %f2,
337                        metadata !"round.dynamic",
338                        metadata !"fpexcept.strict") #0
339  ret double %res;
340}
341
342define <4 x float> @fmul_v4f32(<4 x float> %vf1, <4 x float> %vf2) #0 {
343; CHECK-LABEL: fmul_v4f32:
344; CHECK:       # %bb.0:
345; CHECK-NEXT:    xvmulsp v2, v2, v3
346; CHECK-NEXT:    blr
347;
348; NOVSX-LABEL: fmul_v4f32:
349; NOVSX:       # %bb.0:
350; NOVSX-NEXT:    addi r3, r1, -32
351; NOVSX-NEXT:    addi r4, r1, -48
352; NOVSX-NEXT:    stvx v3, 0, r3
353; NOVSX-NEXT:    stvx v2, 0, r4
354; NOVSX-NEXT:    addi r3, r1, -16
355; NOVSX-NEXT:    lfs f0, -20(r1)
356; NOVSX-NEXT:    lfs f1, -36(r1)
357; NOVSX-NEXT:    fmuls f0, f1, f0
358; NOVSX-NEXT:    lfs f1, -40(r1)
359; NOVSX-NEXT:    stfs f0, -4(r1)
360; NOVSX-NEXT:    lfs f0, -24(r1)
361; NOVSX-NEXT:    fmuls f0, f1, f0
362; NOVSX-NEXT:    lfs f1, -44(r1)
363; NOVSX-NEXT:    stfs f0, -8(r1)
364; NOVSX-NEXT:    lfs f0, -28(r1)
365; NOVSX-NEXT:    fmuls f0, f1, f0
366; NOVSX-NEXT:    lfs f1, -48(r1)
367; NOVSX-NEXT:    stfs f0, -12(r1)
368; NOVSX-NEXT:    lfs f0, -32(r1)
369; NOVSX-NEXT:    fmuls f0, f1, f0
370; NOVSX-NEXT:    stfs f0, -16(r1)
371; NOVSX-NEXT:    lvx v2, 0, r3
372; NOVSX-NEXT:    blr
373;
374; SPE-LABEL: fmul_v4f32:
375; SPE:       # %bb.0:
376; SPE-NEXT:    efsmul r6, r6, r10
377; SPE-NEXT:    efsmul r5, r5, r9
378; SPE-NEXT:    efsmul r4, r4, r8
379; SPE-NEXT:    efsmul r3, r3, r7
380; SPE-NEXT:    blr
381  %res = call <4 x float> @llvm.experimental.constrained.fmul.v4f32(
382                        <4 x float> %vf1, <4 x float> %vf2,
383                        metadata !"round.dynamic",
384                        metadata !"fpexcept.strict") #0
385  ret <4 x float> %res;
386}
387
388define <2 x double> @fmul_v2f64(<2 x double> %vf1, <2 x double> %vf2) #0 {
389; CHECK-LABEL: fmul_v2f64:
390; CHECK:       # %bb.0:
391; CHECK-NEXT:    xvmuldp v2, v2, v3
392; CHECK-NEXT:    blr
393;
394; NOVSX-LABEL: fmul_v2f64:
395; NOVSX:       # %bb.0:
396; NOVSX-NEXT:    fmul f2, f2, f4
397; NOVSX-NEXT:    fmul f1, f1, f3
398; NOVSX-NEXT:    blr
399;
400; SPE-LABEL: fmul_v2f64:
401; SPE:       # %bb.0:
402; SPE-NEXT:    evldd r4, 8(r1)
403; SPE-NEXT:    evmergelo r7, r7, r8
404; SPE-NEXT:    evmergelo r8, r9, r10
405; SPE-NEXT:    li r9, 8
406; SPE-NEXT:    evmergelo r5, r5, r6
407; SPE-NEXT:    efdmul r4, r7, r4
408; SPE-NEXT:    evstddx r4, r3, r9
409; SPE-NEXT:    efdmul r4, r5, r8
410; SPE-NEXT:    evstdd r4, 0(r3)
411; SPE-NEXT:    blr
412  %res = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(
413                        <2 x double> %vf1, <2 x double> %vf2,
414                        metadata !"round.dynamic",
415                        metadata !"fpexcept.strict") #0
416  ret <2 x double> %res;
417}
418
419define float @fdiv_f32(float %f1, float %f2) #0 {
420; CHECK-LABEL: fdiv_f32:
421; CHECK:       # %bb.0:
422; CHECK-NEXT:    xsdivsp f1, f1, f2
423; CHECK-NEXT:    blr
424;
425; NOVSX-LABEL: fdiv_f32:
426; NOVSX:       # %bb.0:
427; NOVSX-NEXT:    fdivs f1, f1, f2
428; NOVSX-NEXT:    blr
429;
430; SPE-LABEL: fdiv_f32:
431; SPE:       # %bb.0:
432; SPE-NEXT:    efsdiv r3, r3, r4
433; SPE-NEXT:    blr
434
435  %res = call float @llvm.experimental.constrained.fdiv.f32(
436                        float %f1, float %f2,
437                        metadata !"round.dynamic",
438                        metadata !"fpexcept.strict") #0
439  ret float %res;
440}
441
442define double @fdiv_f64(double %f1, double %f2) #0 {
443; CHECK-LABEL: fdiv_f64:
444; CHECK:       # %bb.0:
445; CHECK-NEXT:    xsdivdp f1, f1, f2
446; CHECK-NEXT:    blr
447;
448; NOVSX-LABEL: fdiv_f64:
449; NOVSX:       # %bb.0:
450; NOVSX-NEXT:    fdiv f1, f1, f2
451; NOVSX-NEXT:    blr
452;
453; SPE-LABEL: fdiv_f64:
454; SPE:       # %bb.0:
455; SPE-NEXT:    evmergelo r5, r5, r6
456; SPE-NEXT:    evmergelo r3, r3, r4
457; SPE-NEXT:    efddiv r4, r3, r5
458; SPE-NEXT:    evmergehi r3, r4, r4
459; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
460; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
461; SPE-NEXT:    blr
462
463  %res = call double @llvm.experimental.constrained.fdiv.f64(
464                        double %f1, double %f2,
465                        metadata !"round.dynamic",
466                        metadata !"fpexcept.strict") #0
467  ret double %res;
468}
469
470define <4 x float> @fdiv_v4f32(<4 x float> %vf1, <4 x float> %vf2) #0 {
471; CHECK-LABEL: fdiv_v4f32:
472; CHECK:       # %bb.0:
473; CHECK-NEXT:    xvdivsp v2, v2, v3
474; CHECK-NEXT:    blr
475;
476; NOVSX-LABEL: fdiv_v4f32:
477; NOVSX:       # %bb.0:
478; NOVSX-NEXT:    addi r3, r1, -32
479; NOVSX-NEXT:    addi r4, r1, -48
480; NOVSX-NEXT:    stvx v3, 0, r3
481; NOVSX-NEXT:    stvx v2, 0, r4
482; NOVSX-NEXT:    addi r3, r1, -16
483; NOVSX-NEXT:    lfs f0, -20(r1)
484; NOVSX-NEXT:    lfs f1, -36(r1)
485; NOVSX-NEXT:    fdivs f0, f1, f0
486; NOVSX-NEXT:    lfs f1, -40(r1)
487; NOVSX-NEXT:    stfs f0, -4(r1)
488; NOVSX-NEXT:    lfs f0, -24(r1)
489; NOVSX-NEXT:    fdivs f0, f1, f0
490; NOVSX-NEXT:    lfs f1, -44(r1)
491; NOVSX-NEXT:    stfs f0, -8(r1)
492; NOVSX-NEXT:    lfs f0, -28(r1)
493; NOVSX-NEXT:    fdivs f0, f1, f0
494; NOVSX-NEXT:    lfs f1, -48(r1)
495; NOVSX-NEXT:    stfs f0, -12(r1)
496; NOVSX-NEXT:    lfs f0, -32(r1)
497; NOVSX-NEXT:    fdivs f0, f1, f0
498; NOVSX-NEXT:    stfs f0, -16(r1)
499; NOVSX-NEXT:    lvx v2, 0, r3
500; NOVSX-NEXT:    blr
501;
502; SPE-LABEL: fdiv_v4f32:
503; SPE:       # %bb.0:
504; SPE-NEXT:    efsdiv r6, r6, r10
505; SPE-NEXT:    efsdiv r5, r5, r9
506; SPE-NEXT:    efsdiv r4, r4, r8
507; SPE-NEXT:    efsdiv r3, r3, r7
508; SPE-NEXT:    blr
509  %res = call <4 x float> @llvm.experimental.constrained.fdiv.v4f32(
510                        <4 x float> %vf1, <4 x float> %vf2,
511                        metadata !"round.dynamic",
512                        metadata !"fpexcept.strict") #0
513  ret <4 x float> %res
514}
515
516define <2 x double> @fdiv_v2f64(<2 x double> %vf1, <2 x double> %vf2) #0 {
517; CHECK-LABEL: fdiv_v2f64:
518; CHECK:       # %bb.0:
519; CHECK-NEXT:    xvdivdp v2, v2, v3
520; CHECK-NEXT:    blr
521;
522; NOVSX-LABEL: fdiv_v2f64:
523; NOVSX:       # %bb.0:
524; NOVSX-NEXT:    fdiv f2, f2, f4
525; NOVSX-NEXT:    fdiv f1, f1, f3
526; NOVSX-NEXT:    blr
527;
528; SPE-LABEL: fdiv_v2f64:
529; SPE:       # %bb.0:
530; SPE-NEXT:    evldd r4, 8(r1)
531; SPE-NEXT:    evmergelo r7, r7, r8
532; SPE-NEXT:    evmergelo r8, r9, r10
533; SPE-NEXT:    evmergelo r5, r5, r6
534; SPE-NEXT:    efddiv r4, r7, r4
535; SPE-NEXT:    li r7, 8
536; SPE-NEXT:    evstddx r4, r3, r7
537; SPE-NEXT:    efddiv r4, r5, r8
538; SPE-NEXT:    evstdd r4, 0(r3)
539; SPE-NEXT:    blr
540  %res = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64(
541                        <2 x double> %vf1, <2 x double> %vf2,
542                        metadata !"round.dynamic",
543                        metadata !"fpexcept.strict") #0
544  ret <2 x double> %res
545}
546
547define double @no_fma_fold(double %f1, double %f2, double %f3) #0 {
548; CHECK-LABEL: no_fma_fold:
549; CHECK:       # %bb.0:
550; CHECK-NEXT:    xsmuldp f0, f1, f2
551; CHECK-NEXT:    xsadddp f1, f0, f3
552; CHECK-NEXT:    blr
553;
554; NOVSX-LABEL: no_fma_fold:
555; NOVSX:       # %bb.0:
556; NOVSX-NEXT:    fmul f0, f1, f2
557; NOVSX-NEXT:    fadd f1, f0, f3
558; NOVSX-NEXT:    blr
559;
560; SPE-LABEL: no_fma_fold:
561; SPE:       # %bb.0:
562; SPE-NEXT:    evmergelo r7, r7, r8
563; SPE-NEXT:    evmergelo r5, r5, r6
564; SPE-NEXT:    evmergelo r3, r3, r4
565; SPE-NEXT:    efdmul r3, r3, r5
566; SPE-NEXT:    efdadd r4, r3, r7
567; SPE-NEXT:    evmergehi r3, r4, r4
568; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
569; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
570; SPE-NEXT:    blr
571  %mul = call double @llvm.experimental.constrained.fmul.f64(
572                        double %f1, double %f2,
573                        metadata !"round.dynamic",
574                        metadata !"fpexcept.strict") #0
575  %add = call double @llvm.experimental.constrained.fadd.f64(
576                        double %mul, double %f3,
577                        metadata !"round.dynamic",
578                        metadata !"fpexcept.strict") #0
579  ret double %add
580}
581
582define float @fmadd_f32(float %f0, float %f1, float %f2) #0 {
583; CHECK-LABEL: fmadd_f32:
584; CHECK:       # %bb.0:
585; CHECK-NEXT:    xsmaddasp f3, f1, f2
586; CHECK-NEXT:    fmr f1, f3
587; CHECK-NEXT:    blr
588;
589; NOVSX-LABEL: fmadd_f32:
590; NOVSX:       # %bb.0:
591; NOVSX-NEXT:    fmadds f1, f1, f2, f3
592; NOVSX-NEXT:    blr
593;
594; SPE-LABEL: fmadd_f32:
595; SPE:       # %bb.0:
596; SPE-NEXT:    mflr r0
597; SPE-NEXT:    stw r0, 4(r1)
598; SPE-NEXT:    stwu r1, -16(r1)
599; SPE-NEXT:    .cfi_def_cfa_offset 16
600; SPE-NEXT:    .cfi_offset lr, 4
601; SPE-NEXT:    bl fmaf
602; SPE-NEXT:    lwz r0, 20(r1)
603; SPE-NEXT:    addi r1, r1, 16
604; SPE-NEXT:    mtlr r0
605; SPE-NEXT:    blr
606  %res = call float @llvm.experimental.constrained.fma.f32(
607                        float %f0, float %f1, float %f2,
608                        metadata !"round.dynamic",
609                        metadata !"fpexcept.strict") #0
610  ret float %res
611}
612
613define double @fmadd_f64(double %f0, double %f1, double %f2) #0 {
614; CHECK-LABEL: fmadd_f64:
615; CHECK:       # %bb.0:
616; CHECK-NEXT:    xsmaddadp f3, f1, f2
617; CHECK-NEXT:    fmr f1, f3
618; CHECK-NEXT:    blr
619;
620; NOVSX-LABEL: fmadd_f64:
621; NOVSX:       # %bb.0:
622; NOVSX-NEXT:    fmadd f1, f1, f2, f3
623; NOVSX-NEXT:    blr
624;
625; SPE-LABEL: fmadd_f64:
626; SPE:       # %bb.0:
627; SPE-NEXT:    mflr r0
628; SPE-NEXT:    stw r0, 4(r1)
629; SPE-NEXT:    stwu r1, -16(r1)
630; SPE-NEXT:    .cfi_def_cfa_offset 16
631; SPE-NEXT:    .cfi_offset lr, 4
632; SPE-NEXT:    evmergelo r8, r7, r8
633; SPE-NEXT:    evmergelo r6, r5, r6
634; SPE-NEXT:    evmergelo r4, r3, r4
635; SPE-NEXT:    evmergehi r3, r4, r4
636; SPE-NEXT:    evmergehi r5, r6, r6
637; SPE-NEXT:    evmergehi r7, r8, r8
638; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
639; SPE-NEXT:    # kill: def $r6 killed $r6 killed $s6
640; SPE-NEXT:    # kill: def $r8 killed $r8 killed $s8
641; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
642; SPE-NEXT:    # kill: def $r5 killed $r5 killed $s5
643; SPE-NEXT:    # kill: def $r7 killed $r7 killed $s7
644; SPE-NEXT:    bl fma
645; SPE-NEXT:    evmergelo r4, r3, r4
646; SPE-NEXT:    evmergehi r3, r4, r4
647; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
648; SPE-NEXT:    lwz r0, 20(r1)
649; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
650; SPE-NEXT:    addi r1, r1, 16
651; SPE-NEXT:    mtlr r0
652; SPE-NEXT:    blr
653  %res = call double @llvm.experimental.constrained.fma.f64(
654                        double %f0, double %f1, double %f2,
655                        metadata !"round.dynamic",
656                        metadata !"fpexcept.strict") #0
657  ret double %res
658}
659
660define <4 x float> @fmadd_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float> %vf2) #0 {
661; CHECK-LABEL: fmadd_v4f32:
662; CHECK:       # %bb.0:
663; CHECK-NEXT:    xvmaddasp v4, v2, v3
664; CHECK-NEXT:    vmr v2, v4
665; CHECK-NEXT:    blr
666;
667; NOVSX-LABEL: fmadd_v4f32:
668; NOVSX:       # %bb.0:
669; NOVSX-NEXT:    addi r3, r1, -32
670; NOVSX-NEXT:    addi r4, r1, -48
671; NOVSX-NEXT:    stvx v4, 0, r3
672; NOVSX-NEXT:    addi r3, r1, -64
673; NOVSX-NEXT:    stvx v3, 0, r4
674; NOVSX-NEXT:    stvx v2, 0, r3
675; NOVSX-NEXT:    addi r3, r1, -16
676; NOVSX-NEXT:    lfs f0, -20(r1)
677; NOVSX-NEXT:    lfs f1, -36(r1)
678; NOVSX-NEXT:    lfs f2, -52(r1)
679; NOVSX-NEXT:    fmadds f0, f2, f1, f0
680; NOVSX-NEXT:    lfs f1, -40(r1)
681; NOVSX-NEXT:    lfs f2, -56(r1)
682; NOVSX-NEXT:    stfs f0, -4(r1)
683; NOVSX-NEXT:    lfs f0, -24(r1)
684; NOVSX-NEXT:    fmadds f0, f2, f1, f0
685; NOVSX-NEXT:    lfs f1, -44(r1)
686; NOVSX-NEXT:    lfs f2, -60(r1)
687; NOVSX-NEXT:    stfs f0, -8(r1)
688; NOVSX-NEXT:    lfs f0, -28(r1)
689; NOVSX-NEXT:    fmadds f0, f2, f1, f0
690; NOVSX-NEXT:    lfs f1, -48(r1)
691; NOVSX-NEXT:    lfs f2, -64(r1)
692; NOVSX-NEXT:    stfs f0, -12(r1)
693; NOVSX-NEXT:    lfs f0, -32(r1)
694; NOVSX-NEXT:    fmadds f0, f2, f1, f0
695; NOVSX-NEXT:    stfs f0, -16(r1)
696; NOVSX-NEXT:    lvx v2, 0, r3
697; NOVSX-NEXT:    blr
698;
699; SPE-LABEL: fmadd_v4f32:
700; SPE:       # %bb.0:
701; SPE-NEXT:    mflr r0
702; SPE-NEXT:    stw r0, 4(r1)
703; SPE-NEXT:    stwu r1, -144(r1)
704; SPE-NEXT:    .cfi_def_cfa_offset 144
705; SPE-NEXT:    .cfi_offset lr, 4
706; SPE-NEXT:    .cfi_offset r21, -44
707; SPE-NEXT:    .cfi_offset r22, -40
708; SPE-NEXT:    .cfi_offset r23, -36
709; SPE-NEXT:    .cfi_offset r24, -32
710; SPE-NEXT:    .cfi_offset r25, -28
711; SPE-NEXT:    .cfi_offset r26, -24
712; SPE-NEXT:    .cfi_offset r27, -20
713; SPE-NEXT:    .cfi_offset r28, -16
714; SPE-NEXT:    .cfi_offset r29, -12
715; SPE-NEXT:    .cfi_offset r30, -8
716; SPE-NEXT:    .cfi_offset r21, -136
717; SPE-NEXT:    .cfi_offset r22, -128
718; SPE-NEXT:    .cfi_offset r23, -120
719; SPE-NEXT:    .cfi_offset r24, -112
720; SPE-NEXT:    .cfi_offset r25, -104
721; SPE-NEXT:    .cfi_offset r26, -96
722; SPE-NEXT:    .cfi_offset r27, -88
723; SPE-NEXT:    .cfi_offset r28, -80
724; SPE-NEXT:    .cfi_offset r29, -72
725; SPE-NEXT:    .cfi_offset r30, -64
726; SPE-NEXT:    stw r27, 124(r1) # 4-byte Folded Spill
727; SPE-NEXT:    evstdd r27, 56(r1) # 8-byte Folded Spill
728; SPE-NEXT:    mr r27, r5
729; SPE-NEXT:    lwz r5, 164(r1)
730; SPE-NEXT:    stw r25, 116(r1) # 4-byte Folded Spill
731; SPE-NEXT:    stw r26, 120(r1) # 4-byte Folded Spill
732; SPE-NEXT:    evstdd r25, 40(r1) # 8-byte Folded Spill
733; SPE-NEXT:    mr r25, r3
734; SPE-NEXT:    evstdd r26, 48(r1) # 8-byte Folded Spill
735; SPE-NEXT:    mr r26, r4
736; SPE-NEXT:    mr r3, r6
737; SPE-NEXT:    mr r4, r10
738; SPE-NEXT:    stw r21, 100(r1) # 4-byte Folded Spill
739; SPE-NEXT:    stw r22, 104(r1) # 4-byte Folded Spill
740; SPE-NEXT:    stw r23, 108(r1) # 4-byte Folded Spill
741; SPE-NEXT:    stw r24, 112(r1) # 4-byte Folded Spill
742; SPE-NEXT:    stw r28, 128(r1) # 4-byte Folded Spill
743; SPE-NEXT:    stw r29, 132(r1) # 4-byte Folded Spill
744; SPE-NEXT:    stw r30, 136(r1) # 4-byte Folded Spill
745; SPE-NEXT:    evstdd r21, 8(r1) # 8-byte Folded Spill
746; SPE-NEXT:    evstdd r22, 16(r1) # 8-byte Folded Spill
747; SPE-NEXT:    evstdd r23, 24(r1) # 8-byte Folded Spill
748; SPE-NEXT:    evstdd r24, 32(r1) # 8-byte Folded Spill
749; SPE-NEXT:    evstdd r28, 64(r1) # 8-byte Folded Spill
750; SPE-NEXT:    mr r28, r7
751; SPE-NEXT:    evstdd r29, 72(r1) # 8-byte Folded Spill
752; SPE-NEXT:    mr r29, r8
753; SPE-NEXT:    evstdd r30, 80(r1) # 8-byte Folded Spill
754; SPE-NEXT:    mr r30, r9
755; SPE-NEXT:    lwz r24, 152(r1)
756; SPE-NEXT:    lwz r23, 156(r1)
757; SPE-NEXT:    lwz r22, 160(r1)
758; SPE-NEXT:    bl fmaf
759; SPE-NEXT:    mr r21, r3
760; SPE-NEXT:    mr r3, r27
761; SPE-NEXT:    mr r4, r30
762; SPE-NEXT:    mr r5, r22
763; SPE-NEXT:    bl fmaf
764; SPE-NEXT:    mr r30, r3
765; SPE-NEXT:    mr r3, r26
766; SPE-NEXT:    mr r4, r29
767; SPE-NEXT:    mr r5, r23
768; SPE-NEXT:    bl fmaf
769; SPE-NEXT:    mr r29, r3
770; SPE-NEXT:    mr r3, r25
771; SPE-NEXT:    mr r4, r28
772; SPE-NEXT:    mr r5, r24
773; SPE-NEXT:    bl fmaf
774; SPE-NEXT:    mr r4, r29
775; SPE-NEXT:    mr r5, r30
776; SPE-NEXT:    mr r6, r21
777; SPE-NEXT:    evldd r30, 80(r1) # 8-byte Folded Reload
778; SPE-NEXT:    evldd r29, 72(r1) # 8-byte Folded Reload
779; SPE-NEXT:    evldd r28, 64(r1) # 8-byte Folded Reload
780; SPE-NEXT:    evldd r27, 56(r1) # 8-byte Folded Reload
781; SPE-NEXT:    evldd r26, 48(r1) # 8-byte Folded Reload
782; SPE-NEXT:    evldd r25, 40(r1) # 8-byte Folded Reload
783; SPE-NEXT:    evldd r24, 32(r1) # 8-byte Folded Reload
784; SPE-NEXT:    evldd r23, 24(r1) # 8-byte Folded Reload
785; SPE-NEXT:    evldd r22, 16(r1) # 8-byte Folded Reload
786; SPE-NEXT:    evldd r21, 8(r1) # 8-byte Folded Reload
787; SPE-NEXT:    lwz r30, 136(r1) # 4-byte Folded Reload
788; SPE-NEXT:    lwz r29, 132(r1) # 4-byte Folded Reload
789; SPE-NEXT:    lwz r28, 128(r1) # 4-byte Folded Reload
790; SPE-NEXT:    lwz r27, 124(r1) # 4-byte Folded Reload
791; SPE-NEXT:    lwz r26, 120(r1) # 4-byte Folded Reload
792; SPE-NEXT:    lwz r25, 116(r1) # 4-byte Folded Reload
793; SPE-NEXT:    lwz r24, 112(r1) # 4-byte Folded Reload
794; SPE-NEXT:    lwz r23, 108(r1) # 4-byte Folded Reload
795; SPE-NEXT:    lwz r22, 104(r1) # 4-byte Folded Reload
796; SPE-NEXT:    lwz r21, 100(r1) # 4-byte Folded Reload
797; SPE-NEXT:    lwz r0, 148(r1)
798; SPE-NEXT:    addi r1, r1, 144
799; SPE-NEXT:    mtlr r0
800; SPE-NEXT:    blr
801  %res = call <4 x float> @llvm.experimental.constrained.fma.v4f32(
802                        <4 x float> %vf0, <4 x float> %vf1, <4 x float> %vf2,
803                        metadata !"round.dynamic",
804                        metadata !"fpexcept.strict") #0
805  ret <4 x float> %res
806}
807
808define <2 x double> @fmadd_v2f64(<2 x double> %vf0, <2 x double> %vf1, <2 x double> %vf2) #0 {
809; CHECK-LABEL: fmadd_v2f64:
810; CHECK:       # %bb.0:
811; CHECK-NEXT:    xvmaddadp v4, v2, v3
812; CHECK-NEXT:    vmr v2, v4
813; CHECK-NEXT:    blr
814;
815; NOVSX-LABEL: fmadd_v2f64:
816; NOVSX:       # %bb.0:
817; NOVSX-NEXT:    fmadd f2, f2, f4, f6
818; NOVSX-NEXT:    fmadd f1, f1, f3, f5
819; NOVSX-NEXT:    blr
820;
821; SPE-LABEL: fmadd_v2f64:
822; SPE:       # %bb.0:
823; SPE-NEXT:    mflr r0
824; SPE-NEXT:    stw r0, 4(r1)
825; SPE-NEXT:    stwu r1, -96(r1)
826; SPE-NEXT:    .cfi_def_cfa_offset 96
827; SPE-NEXT:    .cfi_offset lr, 4
828; SPE-NEXT:    .cfi_offset r26, -24
829; SPE-NEXT:    .cfi_offset r27, -20
830; SPE-NEXT:    .cfi_offset r28, -16
831; SPE-NEXT:    .cfi_offset r29, -12
832; SPE-NEXT:    .cfi_offset r30, -8
833; SPE-NEXT:    .cfi_offset r26, -80
834; SPE-NEXT:    .cfi_offset r27, -72
835; SPE-NEXT:    .cfi_offset r28, -64
836; SPE-NEXT:    .cfi_offset r29, -56
837; SPE-NEXT:    .cfi_offset r30, -48
838; SPE-NEXT:    stw r26, 72(r1) # 4-byte Folded Spill
839; SPE-NEXT:    stw r27, 76(r1) # 4-byte Folded Spill
840; SPE-NEXT:    stw r28, 80(r1) # 4-byte Folded Spill
841; SPE-NEXT:    stw r29, 84(r1) # 4-byte Folded Spill
842; SPE-NEXT:    stw r30, 88(r1) # 4-byte Folded Spill
843; SPE-NEXT:    evstdd r26, 16(r1) # 8-byte Folded Spill
844; SPE-NEXT:    evstdd r27, 24(r1) # 8-byte Folded Spill
845; SPE-NEXT:    evstdd r28, 32(r1) # 8-byte Folded Spill
846; SPE-NEXT:    evstdd r29, 40(r1) # 8-byte Folded Spill
847; SPE-NEXT:    evstdd r30, 48(r1) # 8-byte Folded Spill
848; SPE-NEXT:    evmergelo r27, r7, r8
849; SPE-NEXT:    evmergelo r9, r9, r10
850; SPE-NEXT:    evmergelo r4, r5, r6
851; SPE-NEXT:    mr r30, r3
852; SPE-NEXT:    evldd r8, 112(r1)
853; SPE-NEXT:    evmergehi r3, r4, r4
854; SPE-NEXT:    evmergehi r5, r9, r9
855; SPE-NEXT:    mr r6, r9
856; SPE-NEXT:    evldd r29, 120(r1)
857; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
858; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
859; SPE-NEXT:    # kill: def $r5 killed $r5 killed $s5
860; SPE-NEXT:    evmergehi r7, r8, r8
861; SPE-NEXT:    evldd r28, 104(r1)
862; SPE-NEXT:    # kill: def $r7 killed $r7 killed $s7
863; SPE-NEXT:    # kill: def $r8 killed $r8 killed $s8
864; SPE-NEXT:    bl fma
865; SPE-NEXT:    evmergelo r26, r3, r4
866; SPE-NEXT:    evmergehi r3, r27, r27
867; SPE-NEXT:    evmergehi r5, r28, r28
868; SPE-NEXT:    evmergehi r7, r29, r29
869; SPE-NEXT:    mr r4, r27
870; SPE-NEXT:    mr r6, r28
871; SPE-NEXT:    mr r8, r29
872; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
873; SPE-NEXT:    # kill: def $r5 killed $r5 killed $s5
874; SPE-NEXT:    # kill: def $r7 killed $r7 killed $s7
875; SPE-NEXT:    bl fma
876; SPE-NEXT:    li r5, 8
877; SPE-NEXT:    evmergelo r3, r3, r4
878; SPE-NEXT:    evstddx r3, r30, r5
879; SPE-NEXT:    evstdd r26, 0(r30)
880; SPE-NEXT:    evldd r30, 48(r1) # 8-byte Folded Reload
881; SPE-NEXT:    evldd r29, 40(r1) # 8-byte Folded Reload
882; SPE-NEXT:    evldd r28, 32(r1) # 8-byte Folded Reload
883; SPE-NEXT:    evldd r27, 24(r1) # 8-byte Folded Reload
884; SPE-NEXT:    evldd r26, 16(r1) # 8-byte Folded Reload
885; SPE-NEXT:    lwz r30, 88(r1) # 4-byte Folded Reload
886; SPE-NEXT:    lwz r29, 84(r1) # 4-byte Folded Reload
887; SPE-NEXT:    lwz r28, 80(r1) # 4-byte Folded Reload
888; SPE-NEXT:    lwz r27, 76(r1) # 4-byte Folded Reload
889; SPE-NEXT:    lwz r26, 72(r1) # 4-byte Folded Reload
890; SPE-NEXT:    lwz r0, 100(r1)
891; SPE-NEXT:    addi r1, r1, 96
892; SPE-NEXT:    mtlr r0
893; SPE-NEXT:    blr
894  %res = call <2 x double> @llvm.experimental.constrained.fma.v2f64(
895                        <2 x double> %vf0, <2 x double> %vf1, <2 x double> %vf2,
896                        metadata !"round.dynamic",
897                        metadata !"fpexcept.strict") #0
898  ret <2 x double> %res
899}
900
901define float @fmsub_f32(float %f0, float %f1, float %f2) #0 {
902; CHECK-LABEL: fmsub_f32:
903; CHECK:       # %bb.0:
904; CHECK-NEXT:    xsmsubasp f3, f1, f2
905; CHECK-NEXT:    fmr f1, f3
906; CHECK-NEXT:    blr
907;
908; NOVSX-LABEL: fmsub_f32:
909; NOVSX:       # %bb.0:
910; NOVSX-NEXT:    fmsubs f1, f1, f2, f3
911; NOVSX-NEXT:    blr
912;
913; SPE-LABEL: fmsub_f32:
914; SPE:       # %bb.0:
915; SPE-NEXT:    mflr r0
916; SPE-NEXT:    stw r0, 4(r1)
917; SPE-NEXT:    stwu r1, -16(r1)
918; SPE-NEXT:    .cfi_def_cfa_offset 16
919; SPE-NEXT:    .cfi_offset lr, 4
920; SPE-NEXT:    efsneg r5, r5
921; SPE-NEXT:    bl fmaf
922; SPE-NEXT:    lwz r0, 20(r1)
923; SPE-NEXT:    addi r1, r1, 16
924; SPE-NEXT:    mtlr r0
925; SPE-NEXT:    blr
926  %neg = fneg float %f2
927  %res = call float @llvm.experimental.constrained.fma.f32(
928                        float %f0, float %f1, float %neg,
929                        metadata !"round.dynamic",
930                        metadata !"fpexcept.strict") #0
931  ret float %res
932}
933
934define double @fmsub_f64(double %f0, double %f1, double %f2) #0 {
935; CHECK-LABEL: fmsub_f64:
936; CHECK:       # %bb.0:
937; CHECK-NEXT:    xsmsubadp f3, f1, f2
938; CHECK-NEXT:    fmr f1, f3
939; CHECK-NEXT:    blr
940;
941; NOVSX-LABEL: fmsub_f64:
942; NOVSX:       # %bb.0:
943; NOVSX-NEXT:    fmsub f1, f1, f2, f3
944; NOVSX-NEXT:    blr
945;
946; SPE-LABEL: fmsub_f64:
947; SPE:       # %bb.0:
948; SPE-NEXT:    mflr r0
949; SPE-NEXT:    stw r0, 4(r1)
950; SPE-NEXT:    stwu r1, -16(r1)
951; SPE-NEXT:    .cfi_def_cfa_offset 16
952; SPE-NEXT:    .cfi_offset lr, 4
953; SPE-NEXT:    evmergelo r6, r5, r6
954; SPE-NEXT:    evmergelo r4, r3, r4
955; SPE-NEXT:    evmergelo r3, r7, r8
956; SPE-NEXT:    efdneg r8, r3
957; SPE-NEXT:    evmergehi r3, r4, r4
958; SPE-NEXT:    evmergehi r5, r6, r6
959; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
960; SPE-NEXT:    # kill: def $r6 killed $r6 killed $s6
961; SPE-NEXT:    evmergehi r7, r8, r8
962; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
963; SPE-NEXT:    # kill: def $r5 killed $r5 killed $s5
964; SPE-NEXT:    # kill: def $r8 killed $r8 killed $s8
965; SPE-NEXT:    # kill: def $r7 killed $r7 killed $s7
966; SPE-NEXT:    bl fma
967; SPE-NEXT:    evmergelo r4, r3, r4
968; SPE-NEXT:    evmergehi r3, r4, r4
969; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
970; SPE-NEXT:    lwz r0, 20(r1)
971; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
972; SPE-NEXT:    addi r1, r1, 16
973; SPE-NEXT:    mtlr r0
974; SPE-NEXT:    blr
975  %neg = fneg double %f2
976  %res = call double @llvm.experimental.constrained.fma.f64(
977                        double %f0, double %f1, double %neg,
978                        metadata !"round.dynamic",
979                        metadata !"fpexcept.strict") #0
980  ret double %res
981}
982
983define <4 x float> @fmsub_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float> %vf2) #0 {
984; CHECK-LABEL: fmsub_v4f32:
985; CHECK:       # %bb.0:
986; CHECK-NEXT:    xvmsubasp v4, v2, v3
987; CHECK-NEXT:    vmr v2, v4
988; CHECK-NEXT:    blr
989;
990; NOVSX-LABEL: fmsub_v4f32:
991; NOVSX:       # %bb.0:
992; NOVSX-NEXT:    vspltisb v5, -1
993; NOVSX-NEXT:    addi r3, r1, -48
994; NOVSX-NEXT:    addi r4, r1, -64
995; NOVSX-NEXT:    stvx v3, 0, r3
996; NOVSX-NEXT:    addi r3, r1, -32
997; NOVSX-NEXT:    stvx v2, 0, r4
998; NOVSX-NEXT:    vslw v5, v5, v5
999; NOVSX-NEXT:    vsubfp v4, v5, v4
1000; NOVSX-NEXT:    stvx v4, 0, r3
1001; NOVSX-NEXT:    addi r3, r1, -16
1002; NOVSX-NEXT:    lfs f0, -36(r1)
1003; NOVSX-NEXT:    lfs f1, -52(r1)
1004; NOVSX-NEXT:    lfs f2, -20(r1)
1005; NOVSX-NEXT:    fmadds f0, f1, f0, f2
1006; NOVSX-NEXT:    lfs f1, -56(r1)
1007; NOVSX-NEXT:    lfs f2, -24(r1)
1008; NOVSX-NEXT:    stfs f0, -4(r1)
1009; NOVSX-NEXT:    lfs f0, -40(r1)
1010; NOVSX-NEXT:    fmadds f0, f1, f0, f2
1011; NOVSX-NEXT:    lfs f1, -60(r1)
1012; NOVSX-NEXT:    lfs f2, -28(r1)
1013; NOVSX-NEXT:    stfs f0, -8(r1)
1014; NOVSX-NEXT:    lfs f0, -44(r1)
1015; NOVSX-NEXT:    fmadds f0, f1, f0, f2
1016; NOVSX-NEXT:    lfs f1, -64(r1)
1017; NOVSX-NEXT:    lfs f2, -32(r1)
1018; NOVSX-NEXT:    stfs f0, -12(r1)
1019; NOVSX-NEXT:    lfs f0, -48(r1)
1020; NOVSX-NEXT:    fmadds f0, f1, f0, f2
1021; NOVSX-NEXT:    stfs f0, -16(r1)
1022; NOVSX-NEXT:    lvx v2, 0, r3
1023; NOVSX-NEXT:    blr
1024;
1025; SPE-LABEL: fmsub_v4f32:
1026; SPE:       # %bb.0:
1027; SPE-NEXT:    mflr r0
1028; SPE-NEXT:    stw r0, 4(r1)
1029; SPE-NEXT:    stwu r1, -144(r1)
1030; SPE-NEXT:    .cfi_def_cfa_offset 144
1031; SPE-NEXT:    .cfi_offset lr, 4
1032; SPE-NEXT:    .cfi_offset r21, -44
1033; SPE-NEXT:    .cfi_offset r22, -40
1034; SPE-NEXT:    .cfi_offset r23, -36
1035; SPE-NEXT:    .cfi_offset r24, -32
1036; SPE-NEXT:    .cfi_offset r25, -28
1037; SPE-NEXT:    .cfi_offset r26, -24
1038; SPE-NEXT:    .cfi_offset r27, -20
1039; SPE-NEXT:    .cfi_offset r28, -16
1040; SPE-NEXT:    .cfi_offset r29, -12
1041; SPE-NEXT:    .cfi_offset r30, -8
1042; SPE-NEXT:    .cfi_offset r21, -136
1043; SPE-NEXT:    .cfi_offset r22, -128
1044; SPE-NEXT:    .cfi_offset r23, -120
1045; SPE-NEXT:    .cfi_offset r24, -112
1046; SPE-NEXT:    .cfi_offset r25, -104
1047; SPE-NEXT:    .cfi_offset r26, -96
1048; SPE-NEXT:    .cfi_offset r27, -88
1049; SPE-NEXT:    .cfi_offset r28, -80
1050; SPE-NEXT:    .cfi_offset r29, -72
1051; SPE-NEXT:    .cfi_offset r30, -64
1052; SPE-NEXT:    stw r25, 116(r1) # 4-byte Folded Spill
1053; SPE-NEXT:    stw r26, 120(r1) # 4-byte Folded Spill
1054; SPE-NEXT:    stw r27, 124(r1) # 4-byte Folded Spill
1055; SPE-NEXT:    stw r28, 128(r1) # 4-byte Folded Spill
1056; SPE-NEXT:    evstdd r25, 40(r1) # 8-byte Folded Spill
1057; SPE-NEXT:    mr r25, r3
1058; SPE-NEXT:    evstdd r26, 48(r1) # 8-byte Folded Spill
1059; SPE-NEXT:    mr r26, r4
1060; SPE-NEXT:    evstdd r27, 56(r1) # 8-byte Folded Spill
1061; SPE-NEXT:    mr r27, r5
1062; SPE-NEXT:    evstdd r28, 64(r1) # 8-byte Folded Spill
1063; SPE-NEXT:    mr r28, r7
1064; SPE-NEXT:    lwz r3, 160(r1)
1065; SPE-NEXT:    lwz r4, 152(r1)
1066; SPE-NEXT:    lwz r5, 156(r1)
1067; SPE-NEXT:    lwz r7, 164(r1)
1068; SPE-NEXT:    stw r22, 104(r1) # 4-byte Folded Spill
1069; SPE-NEXT:    stw r23, 108(r1) # 4-byte Folded Spill
1070; SPE-NEXT:    stw r24, 112(r1) # 4-byte Folded Spill
1071; SPE-NEXT:    evstdd r22, 16(r1) # 8-byte Folded Spill
1072; SPE-NEXT:    efsneg r22, r3
1073; SPE-NEXT:    evstdd r23, 24(r1) # 8-byte Folded Spill
1074; SPE-NEXT:    efsneg r23, r5
1075; SPE-NEXT:    evstdd r24, 32(r1) # 8-byte Folded Spill
1076; SPE-NEXT:    efsneg r24, r4
1077; SPE-NEXT:    efsneg r5, r7
1078; SPE-NEXT:    mr r3, r6
1079; SPE-NEXT:    mr r4, r10
1080; SPE-NEXT:    stw r21, 100(r1) # 4-byte Folded Spill
1081; SPE-NEXT:    stw r29, 132(r1) # 4-byte Folded Spill
1082; SPE-NEXT:    stw r30, 136(r1) # 4-byte Folded Spill
1083; SPE-NEXT:    evstdd r21, 8(r1) # 8-byte Folded Spill
1084; SPE-NEXT:    evstdd r29, 72(r1) # 8-byte Folded Spill
1085; SPE-NEXT:    mr r29, r8
1086; SPE-NEXT:    evstdd r30, 80(r1) # 8-byte Folded Spill
1087; SPE-NEXT:    mr r30, r9
1088; SPE-NEXT:    bl fmaf
1089; SPE-NEXT:    mr r21, r3
1090; SPE-NEXT:    mr r3, r27
1091; SPE-NEXT:    mr r4, r30
1092; SPE-NEXT:    mr r5, r22
1093; SPE-NEXT:    bl fmaf
1094; SPE-NEXT:    mr r30, r3
1095; SPE-NEXT:    mr r3, r26
1096; SPE-NEXT:    mr r4, r29
1097; SPE-NEXT:    mr r5, r23
1098; SPE-NEXT:    bl fmaf
1099; SPE-NEXT:    mr r29, r3
1100; SPE-NEXT:    mr r3, r25
1101; SPE-NEXT:    mr r4, r28
1102; SPE-NEXT:    mr r5, r24
1103; SPE-NEXT:    bl fmaf
1104; SPE-NEXT:    mr r4, r29
1105; SPE-NEXT:    mr r5, r30
1106; SPE-NEXT:    mr r6, r21
1107; SPE-NEXT:    evldd r30, 80(r1) # 8-byte Folded Reload
1108; SPE-NEXT:    evldd r29, 72(r1) # 8-byte Folded Reload
1109; SPE-NEXT:    evldd r28, 64(r1) # 8-byte Folded Reload
1110; SPE-NEXT:    evldd r27, 56(r1) # 8-byte Folded Reload
1111; SPE-NEXT:    evldd r26, 48(r1) # 8-byte Folded Reload
1112; SPE-NEXT:    evldd r25, 40(r1) # 8-byte Folded Reload
1113; SPE-NEXT:    evldd r24, 32(r1) # 8-byte Folded Reload
1114; SPE-NEXT:    evldd r23, 24(r1) # 8-byte Folded Reload
1115; SPE-NEXT:    evldd r22, 16(r1) # 8-byte Folded Reload
1116; SPE-NEXT:    evldd r21, 8(r1) # 8-byte Folded Reload
1117; SPE-NEXT:    lwz r30, 136(r1) # 4-byte Folded Reload
1118; SPE-NEXT:    lwz r29, 132(r1) # 4-byte Folded Reload
1119; SPE-NEXT:    lwz r28, 128(r1) # 4-byte Folded Reload
1120; SPE-NEXT:    lwz r27, 124(r1) # 4-byte Folded Reload
1121; SPE-NEXT:    lwz r26, 120(r1) # 4-byte Folded Reload
1122; SPE-NEXT:    lwz r25, 116(r1) # 4-byte Folded Reload
1123; SPE-NEXT:    lwz r24, 112(r1) # 4-byte Folded Reload
1124; SPE-NEXT:    lwz r23, 108(r1) # 4-byte Folded Reload
1125; SPE-NEXT:    lwz r22, 104(r1) # 4-byte Folded Reload
1126; SPE-NEXT:    lwz r21, 100(r1) # 4-byte Folded Reload
1127; SPE-NEXT:    lwz r0, 148(r1)
1128; SPE-NEXT:    addi r1, r1, 144
1129; SPE-NEXT:    mtlr r0
1130; SPE-NEXT:    blr
1131  %neg = fneg <4 x float> %vf2
1132  %res = call <4 x float> @llvm.experimental.constrained.fma.v4f32(
1133                        <4 x float> %vf0, <4 x float> %vf1, <4 x float> %neg,
1134                        metadata !"round.dynamic",
1135                        metadata !"fpexcept.strict") #0
1136  ret <4 x float> %res
1137}
1138
1139define <2 x double> @fmsub_v2f64(<2 x double> %vf0, <2 x double> %vf1, <2 x double> %vf2) #0 {
1140; CHECK-LABEL: fmsub_v2f64:
1141; CHECK:       # %bb.0:
1142; CHECK-NEXT:    xvmsubadp v4, v2, v3
1143; CHECK-NEXT:    vmr v2, v4
1144; CHECK-NEXT:    blr
1145;
1146; NOVSX-LABEL: fmsub_v2f64:
1147; NOVSX:       # %bb.0:
1148; NOVSX-NEXT:    fmsub f2, f2, f4, f6
1149; NOVSX-NEXT:    fmsub f1, f1, f3, f5
1150; NOVSX-NEXT:    blr
1151;
1152; SPE-LABEL: fmsub_v2f64:
1153; SPE:       # %bb.0:
1154; SPE-NEXT:    mflr r0
1155; SPE-NEXT:    stw r0, 4(r1)
1156; SPE-NEXT:    stwu r1, -96(r1)
1157; SPE-NEXT:    .cfi_def_cfa_offset 96
1158; SPE-NEXT:    .cfi_offset lr, 4
1159; SPE-NEXT:    .cfi_offset r26, -24
1160; SPE-NEXT:    .cfi_offset r27, -20
1161; SPE-NEXT:    .cfi_offset r28, -16
1162; SPE-NEXT:    .cfi_offset r29, -12
1163; SPE-NEXT:    .cfi_offset r30, -8
1164; SPE-NEXT:    .cfi_offset r26, -80
1165; SPE-NEXT:    .cfi_offset r27, -72
1166; SPE-NEXT:    .cfi_offset r28, -64
1167; SPE-NEXT:    .cfi_offset r29, -56
1168; SPE-NEXT:    .cfi_offset r30, -48
1169; SPE-NEXT:    stw r30, 88(r1) # 4-byte Folded Spill
1170; SPE-NEXT:    evstdd r30, 48(r1) # 8-byte Folded Spill
1171; SPE-NEXT:    mr r30, r3
1172; SPE-NEXT:    evldd r3, 112(r1)
1173; SPE-NEXT:    evldd r11, 120(r1)
1174; SPE-NEXT:    stw r26, 72(r1) # 4-byte Folded Spill
1175; SPE-NEXT:    stw r27, 76(r1) # 4-byte Folded Spill
1176; SPE-NEXT:    stw r28, 80(r1) # 4-byte Folded Spill
1177; SPE-NEXT:    stw r29, 84(r1) # 4-byte Folded Spill
1178; SPE-NEXT:    evstdd r26, 16(r1) # 8-byte Folded Spill
1179; SPE-NEXT:    evstdd r27, 24(r1) # 8-byte Folded Spill
1180; SPE-NEXT:    efdneg r27, r11
1181; SPE-NEXT:    evstdd r28, 32(r1) # 8-byte Folded Spill
1182; SPE-NEXT:    evstdd r29, 40(r1) # 8-byte Folded Spill
1183; SPE-NEXT:    evmergelo r29, r7, r8
1184; SPE-NEXT:    evmergelo r9, r9, r10
1185; SPE-NEXT:    evmergelo r4, r5, r6
1186; SPE-NEXT:    efdneg r8, r3
1187; SPE-NEXT:    evmergehi r3, r4, r4
1188; SPE-NEXT:    evmergehi r5, r9, r9
1189; SPE-NEXT:    evmergehi r7, r8, r8
1190; SPE-NEXT:    mr r6, r9
1191; SPE-NEXT:    evldd r28, 104(r1)
1192; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
1193; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
1194; SPE-NEXT:    # kill: def $r5 killed $r5 killed $s5
1195; SPE-NEXT:    # kill: def $r7 killed $r7 killed $s7
1196; SPE-NEXT:    # kill: def $r8 killed $r8 killed $s8
1197; SPE-NEXT:    bl fma
1198; SPE-NEXT:    evmergelo r26, r3, r4
1199; SPE-NEXT:    evmergehi r3, r29, r29
1200; SPE-NEXT:    evmergehi r5, r28, r28
1201; SPE-NEXT:    evmergehi r7, r27, r27
1202; SPE-NEXT:    mr r4, r29
1203; SPE-NEXT:    mr r6, r28
1204; SPE-NEXT:    mr r8, r27
1205; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
1206; SPE-NEXT:    # kill: def $r5 killed $r5 killed $s5
1207; SPE-NEXT:    # kill: def $r7 killed $r7 killed $s7
1208; SPE-NEXT:    bl fma
1209; SPE-NEXT:    li r5, 8
1210; SPE-NEXT:    evmergelo r3, r3, r4
1211; SPE-NEXT:    evstddx r3, r30, r5
1212; SPE-NEXT:    evstdd r26, 0(r30)
1213; SPE-NEXT:    evldd r30, 48(r1) # 8-byte Folded Reload
1214; SPE-NEXT:    evldd r29, 40(r1) # 8-byte Folded Reload
1215; SPE-NEXT:    evldd r28, 32(r1) # 8-byte Folded Reload
1216; SPE-NEXT:    evldd r27, 24(r1) # 8-byte Folded Reload
1217; SPE-NEXT:    evldd r26, 16(r1) # 8-byte Folded Reload
1218; SPE-NEXT:    lwz r30, 88(r1) # 4-byte Folded Reload
1219; SPE-NEXT:    lwz r29, 84(r1) # 4-byte Folded Reload
1220; SPE-NEXT:    lwz r28, 80(r1) # 4-byte Folded Reload
1221; SPE-NEXT:    lwz r27, 76(r1) # 4-byte Folded Reload
1222; SPE-NEXT:    lwz r26, 72(r1) # 4-byte Folded Reload
1223; SPE-NEXT:    lwz r0, 100(r1)
1224; SPE-NEXT:    addi r1, r1, 96
1225; SPE-NEXT:    mtlr r0
1226; SPE-NEXT:    blr
1227  %neg = fneg <2 x double> %vf2
1228  %res = call <2 x double> @llvm.experimental.constrained.fma.v2f64(
1229                        <2 x double> %vf0, <2 x double> %vf1, <2 x double> %neg,
1230                        metadata !"round.dynamic",
1231                        metadata !"fpexcept.strict") #0
1232  ret <2 x double> %res
1233}
1234
1235define float @fnmadd_f32(float %f0, float %f1, float %f2) #0 {
1236; CHECK-LABEL: fnmadd_f32:
1237; CHECK:       # %bb.0:
1238; CHECK-NEXT:    xsnmaddasp f3, f1, f2
1239; CHECK-NEXT:    fmr f1, f3
1240; CHECK-NEXT:    blr
1241;
1242; NOVSX-LABEL: fnmadd_f32:
1243; NOVSX:       # %bb.0:
1244; NOVSX-NEXT:    fnmadds f1, f1, f2, f3
1245; NOVSX-NEXT:    blr
1246;
1247; SPE-LABEL: fnmadd_f32:
1248; SPE:       # %bb.0:
1249; SPE-NEXT:    mflr r0
1250; SPE-NEXT:    stw r0, 4(r1)
1251; SPE-NEXT:    stwu r1, -16(r1)
1252; SPE-NEXT:    .cfi_def_cfa_offset 16
1253; SPE-NEXT:    .cfi_offset lr, 4
1254; SPE-NEXT:    bl fmaf
1255; SPE-NEXT:    efsneg r3, r3
1256; SPE-NEXT:    lwz r0, 20(r1)
1257; SPE-NEXT:    addi r1, r1, 16
1258; SPE-NEXT:    mtlr r0
1259; SPE-NEXT:    blr
1260  %fma = call float @llvm.experimental.constrained.fma.f32(
1261                        float %f0, float %f1, float %f2,
1262                        metadata !"round.dynamic",
1263                        metadata !"fpexcept.strict") #0
1264  %res = fneg float %fma
1265  ret float %res
1266}
1267
1268define double @fnmadd_f64(double %f0, double %f1, double %f2) #0 {
1269; CHECK-LABEL: fnmadd_f64:
1270; CHECK:       # %bb.0:
1271; CHECK-NEXT:    xsnmaddadp f3, f1, f2
1272; CHECK-NEXT:    fmr f1, f3
1273; CHECK-NEXT:    blr
1274;
1275; NOVSX-LABEL: fnmadd_f64:
1276; NOVSX:       # %bb.0:
1277; NOVSX-NEXT:    fnmadd f1, f1, f2, f3
1278; NOVSX-NEXT:    blr
1279;
1280; SPE-LABEL: fnmadd_f64:
1281; SPE:       # %bb.0:
1282; SPE-NEXT:    mflr r0
1283; SPE-NEXT:    stw r0, 4(r1)
1284; SPE-NEXT:    stwu r1, -16(r1)
1285; SPE-NEXT:    .cfi_def_cfa_offset 16
1286; SPE-NEXT:    .cfi_offset lr, 4
1287; SPE-NEXT:    evmergelo r8, r7, r8
1288; SPE-NEXT:    evmergelo r6, r5, r6
1289; SPE-NEXT:    evmergelo r4, r3, r4
1290; SPE-NEXT:    evmergehi r3, r4, r4
1291; SPE-NEXT:    evmergehi r5, r6, r6
1292; SPE-NEXT:    evmergehi r7, r8, r8
1293; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
1294; SPE-NEXT:    # kill: def $r6 killed $r6 killed $s6
1295; SPE-NEXT:    # kill: def $r8 killed $r8 killed $s8
1296; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
1297; SPE-NEXT:    # kill: def $r5 killed $r5 killed $s5
1298; SPE-NEXT:    # kill: def $r7 killed $r7 killed $s7
1299; SPE-NEXT:    bl fma
1300; SPE-NEXT:    evmergelo r3, r3, r4
1301; SPE-NEXT:    efdneg r4, r3
1302; SPE-NEXT:    evmergehi r3, r4, r4
1303; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
1304; SPE-NEXT:    lwz r0, 20(r1)
1305; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
1306; SPE-NEXT:    addi r1, r1, 16
1307; SPE-NEXT:    mtlr r0
1308; SPE-NEXT:    blr
1309  %fma = call double @llvm.experimental.constrained.fma.f64(
1310                        double %f0, double %f1, double %f2,
1311                        metadata !"round.dynamic",
1312                        metadata !"fpexcept.strict") #0
1313  %res = fneg double %fma
1314  ret double %res
1315}
1316
1317define <4 x float> @fnmadd_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float> %vf2) #0 {
1318; CHECK-LABEL: fnmadd_v4f32:
1319; CHECK:       # %bb.0:
1320; CHECK-NEXT:    xvmaddasp v4, v2, v3
1321; CHECK-NEXT:    xvnegsp v2, v4
1322; CHECK-NEXT:    blr
1323;
1324; NOVSX-LABEL: fnmadd_v4f32:
1325; NOVSX:       # %bb.0:
1326; NOVSX-NEXT:    addi r3, r1, -32
1327; NOVSX-NEXT:    addi r4, r1, -48
1328; NOVSX-NEXT:    stvx v4, 0, r3
1329; NOVSX-NEXT:    addi r3, r1, -64
1330; NOVSX-NEXT:    stvx v3, 0, r4
1331; NOVSX-NEXT:    stvx v2, 0, r3
1332; NOVSX-NEXT:    vspltisb v2, -1
1333; NOVSX-NEXT:    addi r3, r1, -16
1334; NOVSX-NEXT:    lfs f0, -20(r1)
1335; NOVSX-NEXT:    lfs f1, -36(r1)
1336; NOVSX-NEXT:    lfs f2, -52(r1)
1337; NOVSX-NEXT:    vslw v2, v2, v2
1338; NOVSX-NEXT:    fmadds f0, f2, f1, f0
1339; NOVSX-NEXT:    lfs f1, -40(r1)
1340; NOVSX-NEXT:    lfs f2, -56(r1)
1341; NOVSX-NEXT:    stfs f0, -4(r1)
1342; NOVSX-NEXT:    lfs f0, -24(r1)
1343; NOVSX-NEXT:    fmadds f0, f2, f1, f0
1344; NOVSX-NEXT:    lfs f1, -44(r1)
1345; NOVSX-NEXT:    lfs f2, -60(r1)
1346; NOVSX-NEXT:    stfs f0, -8(r1)
1347; NOVSX-NEXT:    lfs f0, -28(r1)
1348; NOVSX-NEXT:    fmadds f0, f2, f1, f0
1349; NOVSX-NEXT:    lfs f1, -48(r1)
1350; NOVSX-NEXT:    lfs f2, -64(r1)
1351; NOVSX-NEXT:    stfs f0, -12(r1)
1352; NOVSX-NEXT:    lfs f0, -32(r1)
1353; NOVSX-NEXT:    fmadds f0, f2, f1, f0
1354; NOVSX-NEXT:    stfs f0, -16(r1)
1355; NOVSX-NEXT:    lvx v3, 0, r3
1356; NOVSX-NEXT:    vsubfp v2, v2, v3
1357; NOVSX-NEXT:    blr
1358;
1359; SPE-LABEL: fnmadd_v4f32:
1360; SPE:       # %bb.0:
1361; SPE-NEXT:    mflr r0
1362; SPE-NEXT:    stw r0, 4(r1)
1363; SPE-NEXT:    stwu r1, -144(r1)
1364; SPE-NEXT:    .cfi_def_cfa_offset 144
1365; SPE-NEXT:    .cfi_offset lr, 4
1366; SPE-NEXT:    .cfi_offset r21, -44
1367; SPE-NEXT:    .cfi_offset r22, -40
1368; SPE-NEXT:    .cfi_offset r23, -36
1369; SPE-NEXT:    .cfi_offset r24, -32
1370; SPE-NEXT:    .cfi_offset r25, -28
1371; SPE-NEXT:    .cfi_offset r26, -24
1372; SPE-NEXT:    .cfi_offset r27, -20
1373; SPE-NEXT:    .cfi_offset r28, -16
1374; SPE-NEXT:    .cfi_offset r29, -12
1375; SPE-NEXT:    .cfi_offset r30, -8
1376; SPE-NEXT:    .cfi_offset r21, -136
1377; SPE-NEXT:    .cfi_offset r22, -128
1378; SPE-NEXT:    .cfi_offset r23, -120
1379; SPE-NEXT:    .cfi_offset r24, -112
1380; SPE-NEXT:    .cfi_offset r25, -104
1381; SPE-NEXT:    .cfi_offset r26, -96
1382; SPE-NEXT:    .cfi_offset r27, -88
1383; SPE-NEXT:    .cfi_offset r28, -80
1384; SPE-NEXT:    .cfi_offset r29, -72
1385; SPE-NEXT:    .cfi_offset r30, -64
1386; SPE-NEXT:    stw r27, 124(r1) # 4-byte Folded Spill
1387; SPE-NEXT:    evstdd r27, 56(r1) # 8-byte Folded Spill
1388; SPE-NEXT:    mr r27, r5
1389; SPE-NEXT:    lwz r5, 164(r1)
1390; SPE-NEXT:    stw r25, 116(r1) # 4-byte Folded Spill
1391; SPE-NEXT:    stw r26, 120(r1) # 4-byte Folded Spill
1392; SPE-NEXT:    evstdd r25, 40(r1) # 8-byte Folded Spill
1393; SPE-NEXT:    mr r25, r3
1394; SPE-NEXT:    evstdd r26, 48(r1) # 8-byte Folded Spill
1395; SPE-NEXT:    mr r26, r4
1396; SPE-NEXT:    mr r3, r6
1397; SPE-NEXT:    mr r4, r10
1398; SPE-NEXT:    stw r21, 100(r1) # 4-byte Folded Spill
1399; SPE-NEXT:    stw r22, 104(r1) # 4-byte Folded Spill
1400; SPE-NEXT:    stw r23, 108(r1) # 4-byte Folded Spill
1401; SPE-NEXT:    stw r24, 112(r1) # 4-byte Folded Spill
1402; SPE-NEXT:    stw r28, 128(r1) # 4-byte Folded Spill
1403; SPE-NEXT:    stw r29, 132(r1) # 4-byte Folded Spill
1404; SPE-NEXT:    stw r30, 136(r1) # 4-byte Folded Spill
1405; SPE-NEXT:    evstdd r21, 8(r1) # 8-byte Folded Spill
1406; SPE-NEXT:    evstdd r22, 16(r1) # 8-byte Folded Spill
1407; SPE-NEXT:    evstdd r23, 24(r1) # 8-byte Folded Spill
1408; SPE-NEXT:    evstdd r24, 32(r1) # 8-byte Folded Spill
1409; SPE-NEXT:    evstdd r28, 64(r1) # 8-byte Folded Spill
1410; SPE-NEXT:    mr r28, r7
1411; SPE-NEXT:    evstdd r29, 72(r1) # 8-byte Folded Spill
1412; SPE-NEXT:    mr r29, r8
1413; SPE-NEXT:    evstdd r30, 80(r1) # 8-byte Folded Spill
1414; SPE-NEXT:    mr r30, r9
1415; SPE-NEXT:    lwz r24, 152(r1)
1416; SPE-NEXT:    lwz r23, 156(r1)
1417; SPE-NEXT:    lwz r22, 160(r1)
1418; SPE-NEXT:    bl fmaf
1419; SPE-NEXT:    mr r21, r3
1420; SPE-NEXT:    mr r3, r27
1421; SPE-NEXT:    mr r4, r30
1422; SPE-NEXT:    mr r5, r22
1423; SPE-NEXT:    bl fmaf
1424; SPE-NEXT:    mr r30, r3
1425; SPE-NEXT:    mr r3, r26
1426; SPE-NEXT:    mr r4, r29
1427; SPE-NEXT:    mr r5, r23
1428; SPE-NEXT:    bl fmaf
1429; SPE-NEXT:    mr r29, r3
1430; SPE-NEXT:    mr r3, r25
1431; SPE-NEXT:    mr r4, r28
1432; SPE-NEXT:    mr r5, r24
1433; SPE-NEXT:    bl fmaf
1434; SPE-NEXT:    efsneg r4, r29
1435; SPE-NEXT:    efsneg r5, r30
1436; SPE-NEXT:    efsneg r6, r21
1437; SPE-NEXT:    evldd r30, 80(r1) # 8-byte Folded Reload
1438; SPE-NEXT:    efsneg r3, r3
1439; SPE-NEXT:    evldd r29, 72(r1) # 8-byte Folded Reload
1440; SPE-NEXT:    evldd r28, 64(r1) # 8-byte Folded Reload
1441; SPE-NEXT:    evldd r27, 56(r1) # 8-byte Folded Reload
1442; SPE-NEXT:    evldd r26, 48(r1) # 8-byte Folded Reload
1443; SPE-NEXT:    evldd r25, 40(r1) # 8-byte Folded Reload
1444; SPE-NEXT:    evldd r24, 32(r1) # 8-byte Folded Reload
1445; SPE-NEXT:    evldd r23, 24(r1) # 8-byte Folded Reload
1446; SPE-NEXT:    evldd r22, 16(r1) # 8-byte Folded Reload
1447; SPE-NEXT:    evldd r21, 8(r1) # 8-byte Folded Reload
1448; SPE-NEXT:    lwz r30, 136(r1) # 4-byte Folded Reload
1449; SPE-NEXT:    lwz r29, 132(r1) # 4-byte Folded Reload
1450; SPE-NEXT:    lwz r28, 128(r1) # 4-byte Folded Reload
1451; SPE-NEXT:    lwz r27, 124(r1) # 4-byte Folded Reload
1452; SPE-NEXT:    lwz r26, 120(r1) # 4-byte Folded Reload
1453; SPE-NEXT:    lwz r25, 116(r1) # 4-byte Folded Reload
1454; SPE-NEXT:    lwz r24, 112(r1) # 4-byte Folded Reload
1455; SPE-NEXT:    lwz r23, 108(r1) # 4-byte Folded Reload
1456; SPE-NEXT:    lwz r22, 104(r1) # 4-byte Folded Reload
1457; SPE-NEXT:    lwz r21, 100(r1) # 4-byte Folded Reload
1458; SPE-NEXT:    lwz r0, 148(r1)
1459; SPE-NEXT:    addi r1, r1, 144
1460; SPE-NEXT:    mtlr r0
1461; SPE-NEXT:    blr
1462  %fma = call <4 x float> @llvm.experimental.constrained.fma.v4f32(
1463                        <4 x float> %vf0, <4 x float> %vf1, <4 x float> %vf2,
1464                        metadata !"round.dynamic",
1465                        metadata !"fpexcept.strict") #0
1466  %res = fneg <4 x float> %fma
1467  ret <4 x float> %res
1468}
1469
1470define <2 x double> @fnmadd_v2f64(<2 x double> %vf0, <2 x double> %vf1, <2 x double> %vf2) #0 {
1471; CHECK-LABEL: fnmadd_v2f64:
1472; CHECK:       # %bb.0:
1473; CHECK-NEXT:    xvnmaddadp v4, v2, v3
1474; CHECK-NEXT:    vmr v2, v4
1475; CHECK-NEXT:    blr
1476;
1477; NOVSX-LABEL: fnmadd_v2f64:
1478; NOVSX:       # %bb.0:
1479; NOVSX-NEXT:    fnmadd f2, f2, f4, f6
1480; NOVSX-NEXT:    fnmadd f1, f1, f3, f5
1481; NOVSX-NEXT:    blr
1482;
1483; SPE-LABEL: fnmadd_v2f64:
1484; SPE:       # %bb.0:
1485; SPE-NEXT:    mflr r0
1486; SPE-NEXT:    stw r0, 4(r1)
1487; SPE-NEXT:    stwu r1, -96(r1)
1488; SPE-NEXT:    .cfi_def_cfa_offset 96
1489; SPE-NEXT:    .cfi_offset lr, 4
1490; SPE-NEXT:    .cfi_offset r26, -24
1491; SPE-NEXT:    .cfi_offset r27, -20
1492; SPE-NEXT:    .cfi_offset r28, -16
1493; SPE-NEXT:    .cfi_offset r29, -12
1494; SPE-NEXT:    .cfi_offset r30, -8
1495; SPE-NEXT:    .cfi_offset r26, -80
1496; SPE-NEXT:    .cfi_offset r27, -72
1497; SPE-NEXT:    .cfi_offset r28, -64
1498; SPE-NEXT:    .cfi_offset r29, -56
1499; SPE-NEXT:    .cfi_offset r30, -48
1500; SPE-NEXT:    stw r26, 72(r1) # 4-byte Folded Spill
1501; SPE-NEXT:    stw r27, 76(r1) # 4-byte Folded Spill
1502; SPE-NEXT:    stw r28, 80(r1) # 4-byte Folded Spill
1503; SPE-NEXT:    stw r29, 84(r1) # 4-byte Folded Spill
1504; SPE-NEXT:    stw r30, 88(r1) # 4-byte Folded Spill
1505; SPE-NEXT:    evstdd r26, 16(r1) # 8-byte Folded Spill
1506; SPE-NEXT:    evstdd r27, 24(r1) # 8-byte Folded Spill
1507; SPE-NEXT:    evstdd r28, 32(r1) # 8-byte Folded Spill
1508; SPE-NEXT:    evstdd r29, 40(r1) # 8-byte Folded Spill
1509; SPE-NEXT:    evstdd r30, 48(r1) # 8-byte Folded Spill
1510; SPE-NEXT:    evmergelo r27, r7, r8
1511; SPE-NEXT:    evmergelo r9, r9, r10
1512; SPE-NEXT:    evmergelo r4, r5, r6
1513; SPE-NEXT:    mr r30, r3
1514; SPE-NEXT:    evldd r8, 112(r1)
1515; SPE-NEXT:    evmergehi r3, r4, r4
1516; SPE-NEXT:    evmergehi r5, r9, r9
1517; SPE-NEXT:    mr r6, r9
1518; SPE-NEXT:    evldd r29, 120(r1)
1519; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
1520; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
1521; SPE-NEXT:    # kill: def $r5 killed $r5 killed $s5
1522; SPE-NEXT:    evmergehi r7, r8, r8
1523; SPE-NEXT:    evldd r28, 104(r1)
1524; SPE-NEXT:    # kill: def $r7 killed $r7 killed $s7
1525; SPE-NEXT:    # kill: def $r8 killed $r8 killed $s8
1526; SPE-NEXT:    bl fma
1527; SPE-NEXT:    evmergelo r26, r3, r4
1528; SPE-NEXT:    evmergehi r3, r27, r27
1529; SPE-NEXT:    evmergehi r5, r28, r28
1530; SPE-NEXT:    evmergehi r7, r29, r29
1531; SPE-NEXT:    mr r4, r27
1532; SPE-NEXT:    mr r6, r28
1533; SPE-NEXT:    mr r8, r29
1534; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
1535; SPE-NEXT:    # kill: def $r5 killed $r5 killed $s5
1536; SPE-NEXT:    # kill: def $r7 killed $r7 killed $s7
1537; SPE-NEXT:    bl fma
1538; SPE-NEXT:    evmergelo r3, r3, r4
1539; SPE-NEXT:    li r5, 8
1540; SPE-NEXT:    efdneg r3, r3
1541; SPE-NEXT:    evstddx r3, r30, r5
1542; SPE-NEXT:    efdneg r3, r26
1543; SPE-NEXT:    evstdd r3, 0(r30)
1544; SPE-NEXT:    evldd r30, 48(r1) # 8-byte Folded Reload
1545; SPE-NEXT:    evldd r29, 40(r1) # 8-byte Folded Reload
1546; SPE-NEXT:    evldd r28, 32(r1) # 8-byte Folded Reload
1547; SPE-NEXT:    evldd r27, 24(r1) # 8-byte Folded Reload
1548; SPE-NEXT:    evldd r26, 16(r1) # 8-byte Folded Reload
1549; SPE-NEXT:    lwz r30, 88(r1) # 4-byte Folded Reload
1550; SPE-NEXT:    lwz r29, 84(r1) # 4-byte Folded Reload
1551; SPE-NEXT:    lwz r28, 80(r1) # 4-byte Folded Reload
1552; SPE-NEXT:    lwz r27, 76(r1) # 4-byte Folded Reload
1553; SPE-NEXT:    lwz r26, 72(r1) # 4-byte Folded Reload
1554; SPE-NEXT:    lwz r0, 100(r1)
1555; SPE-NEXT:    addi r1, r1, 96
1556; SPE-NEXT:    mtlr r0
1557; SPE-NEXT:    blr
1558  %fma = call <2 x double> @llvm.experimental.constrained.fma.v2f64(
1559                        <2 x double> %vf0, <2 x double> %vf1, <2 x double> %vf2,
1560                        metadata !"round.dynamic",
1561                        metadata !"fpexcept.strict") #0
1562  %res = fneg <2 x double> %fma
1563  ret <2 x double> %res
1564}
1565
1566define float @fnmsub_f32(float %f0, float %f1, float %f2) #0 {
1567; CHECK-LABEL: fnmsub_f32:
1568; CHECK:       # %bb.0:
1569; CHECK-NEXT:    xsnmsubasp f3, f1, f2
1570; CHECK-NEXT:    fmr f1, f3
1571; CHECK-NEXT:    blr
1572;
1573; NOVSX-LABEL: fnmsub_f32:
1574; NOVSX:       # %bb.0:
1575; NOVSX-NEXT:    fnmsubs f1, f1, f2, f3
1576; NOVSX-NEXT:    blr
1577;
1578; SPE-LABEL: fnmsub_f32:
1579; SPE:       # %bb.0:
1580; SPE-NEXT:    mflr r0
1581; SPE-NEXT:    stw r0, 4(r1)
1582; SPE-NEXT:    stwu r1, -16(r1)
1583; SPE-NEXT:    .cfi_def_cfa_offset 16
1584; SPE-NEXT:    .cfi_offset lr, 4
1585; SPE-NEXT:    efsneg r5, r5
1586; SPE-NEXT:    bl fmaf
1587; SPE-NEXT:    efsneg r3, r3
1588; SPE-NEXT:    lwz r0, 20(r1)
1589; SPE-NEXT:    addi r1, r1, 16
1590; SPE-NEXT:    mtlr r0
1591; SPE-NEXT:    blr
1592  %neg = fneg float %f2
1593  %fma = call float @llvm.experimental.constrained.fma.f32(
1594                        float %f0, float %f1, float %neg,
1595                        metadata !"round.dynamic",
1596                        metadata !"fpexcept.strict") #0
1597  %res = fneg float %fma
1598  ret float %res
1599}
1600
1601define double @fnmsub_f64(double %f0, double %f1, double %f2) #0 {
1602; CHECK-LABEL: fnmsub_f64:
1603; CHECK:       # %bb.0:
1604; CHECK-NEXT:    xsnmsubadp f3, f1, f2
1605; CHECK-NEXT:    fmr f1, f3
1606; CHECK-NEXT:    blr
1607;
1608; NOVSX-LABEL: fnmsub_f64:
1609; NOVSX:       # %bb.0:
1610; NOVSX-NEXT:    fnmsub f1, f1, f2, f3
1611; NOVSX-NEXT:    blr
1612;
1613; SPE-LABEL: fnmsub_f64:
1614; SPE:       # %bb.0:
1615; SPE-NEXT:    mflr r0
1616; SPE-NEXT:    stw r0, 4(r1)
1617; SPE-NEXT:    stwu r1, -16(r1)
1618; SPE-NEXT:    .cfi_def_cfa_offset 16
1619; SPE-NEXT:    .cfi_offset lr, 4
1620; SPE-NEXT:    evmergelo r6, r5, r6
1621; SPE-NEXT:    evmergelo r4, r3, r4
1622; SPE-NEXT:    evmergelo r3, r7, r8
1623; SPE-NEXT:    efdneg r8, r3
1624; SPE-NEXT:    evmergehi r3, r4, r4
1625; SPE-NEXT:    evmergehi r5, r6, r6
1626; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
1627; SPE-NEXT:    # kill: def $r6 killed $r6 killed $s6
1628; SPE-NEXT:    evmergehi r7, r8, r8
1629; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
1630; SPE-NEXT:    # kill: def $r5 killed $r5 killed $s5
1631; SPE-NEXT:    # kill: def $r8 killed $r8 killed $s8
1632; SPE-NEXT:    # kill: def $r7 killed $r7 killed $s7
1633; SPE-NEXT:    bl fma
1634; SPE-NEXT:    evmergelo r3, r3, r4
1635; SPE-NEXT:    efdneg r4, r3
1636; SPE-NEXT:    evmergehi r3, r4, r4
1637; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
1638; SPE-NEXT:    lwz r0, 20(r1)
1639; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
1640; SPE-NEXT:    addi r1, r1, 16
1641; SPE-NEXT:    mtlr r0
1642; SPE-NEXT:    blr
1643  %neg = fneg double %f2
1644  %fma = call double @llvm.experimental.constrained.fma.f64(
1645                        double %f0, double %f1, double %neg,
1646                        metadata !"round.dynamic",
1647                        metadata !"fpexcept.strict") #0
1648  %res = fneg double %fma
1649  ret double %res
1650}
1651
1652define <4 x float> @fnmsub_v4f32(<4 x float> %vf0, <4 x float> %vf1, <4 x float> %vf2) #0 {
1653; CHECK-LABEL: fnmsub_v4f32:
1654; CHECK:       # %bb.0:
1655; CHECK-NEXT:    xvnmsubasp v4, v2, v3
1656; CHECK-NEXT:    vmr v2, v4
1657; CHECK-NEXT:    blr
1658;
1659; NOVSX-LABEL: fnmsub_v4f32:
1660; NOVSX:       # %bb.0:
1661; NOVSX-NEXT:    vspltisb v5, -1
1662; NOVSX-NEXT:    addi r3, r1, -48
1663; NOVSX-NEXT:    addi r4, r1, -64
1664; NOVSX-NEXT:    stvx v3, 0, r3
1665; NOVSX-NEXT:    addi r3, r1, -32
1666; NOVSX-NEXT:    stvx v2, 0, r4
1667; NOVSX-NEXT:    vslw v5, v5, v5
1668; NOVSX-NEXT:    vsubfp v4, v5, v4
1669; NOVSX-NEXT:    stvx v4, 0, r3
1670; NOVSX-NEXT:    addi r3, r1, -16
1671; NOVSX-NEXT:    lfs f0, -36(r1)
1672; NOVSX-NEXT:    lfs f1, -52(r1)
1673; NOVSX-NEXT:    lfs f2, -20(r1)
1674; NOVSX-NEXT:    fmadds f0, f1, f0, f2
1675; NOVSX-NEXT:    lfs f1, -56(r1)
1676; NOVSX-NEXT:    lfs f2, -24(r1)
1677; NOVSX-NEXT:    stfs f0, -4(r1)
1678; NOVSX-NEXT:    lfs f0, -40(r1)
1679; NOVSX-NEXT:    fmadds f0, f1, f0, f2
1680; NOVSX-NEXT:    lfs f1, -60(r1)
1681; NOVSX-NEXT:    lfs f2, -28(r1)
1682; NOVSX-NEXT:    stfs f0, -8(r1)
1683; NOVSX-NEXT:    lfs f0, -44(r1)
1684; NOVSX-NEXT:    fmadds f0, f1, f0, f2
1685; NOVSX-NEXT:    lfs f1, -64(r1)
1686; NOVSX-NEXT:    lfs f2, -32(r1)
1687; NOVSX-NEXT:    stfs f0, -12(r1)
1688; NOVSX-NEXT:    lfs f0, -48(r1)
1689; NOVSX-NEXT:    fmadds f0, f1, f0, f2
1690; NOVSX-NEXT:    stfs f0, -16(r1)
1691; NOVSX-NEXT:    lvx v2, 0, r3
1692; NOVSX-NEXT:    vsubfp v2, v5, v2
1693; NOVSX-NEXT:    blr
1694;
1695; SPE-LABEL: fnmsub_v4f32:
1696; SPE:       # %bb.0:
1697; SPE-NEXT:    mflr r0
1698; SPE-NEXT:    stw r0, 4(r1)
1699; SPE-NEXT:    stwu r1, -144(r1)
1700; SPE-NEXT:    .cfi_def_cfa_offset 144
1701; SPE-NEXT:    .cfi_offset lr, 4
1702; SPE-NEXT:    .cfi_offset r21, -44
1703; SPE-NEXT:    .cfi_offset r22, -40
1704; SPE-NEXT:    .cfi_offset r23, -36
1705; SPE-NEXT:    .cfi_offset r24, -32
1706; SPE-NEXT:    .cfi_offset r25, -28
1707; SPE-NEXT:    .cfi_offset r26, -24
1708; SPE-NEXT:    .cfi_offset r27, -20
1709; SPE-NEXT:    .cfi_offset r28, -16
1710; SPE-NEXT:    .cfi_offset r29, -12
1711; SPE-NEXT:    .cfi_offset r30, -8
1712; SPE-NEXT:    .cfi_offset r21, -136
1713; SPE-NEXT:    .cfi_offset r22, -128
1714; SPE-NEXT:    .cfi_offset r23, -120
1715; SPE-NEXT:    .cfi_offset r24, -112
1716; SPE-NEXT:    .cfi_offset r25, -104
1717; SPE-NEXT:    .cfi_offset r26, -96
1718; SPE-NEXT:    .cfi_offset r27, -88
1719; SPE-NEXT:    .cfi_offset r28, -80
1720; SPE-NEXT:    .cfi_offset r29, -72
1721; SPE-NEXT:    .cfi_offset r30, -64
1722; SPE-NEXT:    stw r25, 116(r1) # 4-byte Folded Spill
1723; SPE-NEXT:    stw r26, 120(r1) # 4-byte Folded Spill
1724; SPE-NEXT:    stw r27, 124(r1) # 4-byte Folded Spill
1725; SPE-NEXT:    stw r28, 128(r1) # 4-byte Folded Spill
1726; SPE-NEXT:    evstdd r25, 40(r1) # 8-byte Folded Spill
1727; SPE-NEXT:    mr r25, r3
1728; SPE-NEXT:    evstdd r26, 48(r1) # 8-byte Folded Spill
1729; SPE-NEXT:    mr r26, r4
1730; SPE-NEXT:    evstdd r27, 56(r1) # 8-byte Folded Spill
1731; SPE-NEXT:    mr r27, r5
1732; SPE-NEXT:    evstdd r28, 64(r1) # 8-byte Folded Spill
1733; SPE-NEXT:    mr r28, r7
1734; SPE-NEXT:    lwz r3, 160(r1)
1735; SPE-NEXT:    lwz r4, 152(r1)
1736; SPE-NEXT:    lwz r5, 156(r1)
1737; SPE-NEXT:    lwz r7, 164(r1)
1738; SPE-NEXT:    stw r22, 104(r1) # 4-byte Folded Spill
1739; SPE-NEXT:    stw r23, 108(r1) # 4-byte Folded Spill
1740; SPE-NEXT:    stw r24, 112(r1) # 4-byte Folded Spill
1741; SPE-NEXT:    evstdd r22, 16(r1) # 8-byte Folded Spill
1742; SPE-NEXT:    efsneg r22, r3
1743; SPE-NEXT:    evstdd r23, 24(r1) # 8-byte Folded Spill
1744; SPE-NEXT:    efsneg r23, r5
1745; SPE-NEXT:    evstdd r24, 32(r1) # 8-byte Folded Spill
1746; SPE-NEXT:    efsneg r24, r4
1747; SPE-NEXT:    efsneg r5, r7
1748; SPE-NEXT:    mr r3, r6
1749; SPE-NEXT:    mr r4, r10
1750; SPE-NEXT:    stw r21, 100(r1) # 4-byte Folded Spill
1751; SPE-NEXT:    stw r29, 132(r1) # 4-byte Folded Spill
1752; SPE-NEXT:    stw r30, 136(r1) # 4-byte Folded Spill
1753; SPE-NEXT:    evstdd r21, 8(r1) # 8-byte Folded Spill
1754; SPE-NEXT:    evstdd r29, 72(r1) # 8-byte Folded Spill
1755; SPE-NEXT:    mr r29, r8
1756; SPE-NEXT:    evstdd r30, 80(r1) # 8-byte Folded Spill
1757; SPE-NEXT:    mr r30, r9
1758; SPE-NEXT:    bl fmaf
1759; SPE-NEXT:    mr r21, r3
1760; SPE-NEXT:    mr r3, r27
1761; SPE-NEXT:    mr r4, r30
1762; SPE-NEXT:    mr r5, r22
1763; SPE-NEXT:    bl fmaf
1764; SPE-NEXT:    mr r30, r3
1765; SPE-NEXT:    mr r3, r26
1766; SPE-NEXT:    mr r4, r29
1767; SPE-NEXT:    mr r5, r23
1768; SPE-NEXT:    bl fmaf
1769; SPE-NEXT:    mr r29, r3
1770; SPE-NEXT:    mr r3, r25
1771; SPE-NEXT:    mr r4, r28
1772; SPE-NEXT:    mr r5, r24
1773; SPE-NEXT:    bl fmaf
1774; SPE-NEXT:    efsneg r4, r29
1775; SPE-NEXT:    efsneg r5, r30
1776; SPE-NEXT:    efsneg r6, r21
1777; SPE-NEXT:    evldd r30, 80(r1) # 8-byte Folded Reload
1778; SPE-NEXT:    efsneg r3, r3
1779; SPE-NEXT:    evldd r29, 72(r1) # 8-byte Folded Reload
1780; SPE-NEXT:    evldd r28, 64(r1) # 8-byte Folded Reload
1781; SPE-NEXT:    evldd r27, 56(r1) # 8-byte Folded Reload
1782; SPE-NEXT:    evldd r26, 48(r1) # 8-byte Folded Reload
1783; SPE-NEXT:    evldd r25, 40(r1) # 8-byte Folded Reload
1784; SPE-NEXT:    evldd r24, 32(r1) # 8-byte Folded Reload
1785; SPE-NEXT:    evldd r23, 24(r1) # 8-byte Folded Reload
1786; SPE-NEXT:    evldd r22, 16(r1) # 8-byte Folded Reload
1787; SPE-NEXT:    evldd r21, 8(r1) # 8-byte Folded Reload
1788; SPE-NEXT:    lwz r30, 136(r1) # 4-byte Folded Reload
1789; SPE-NEXT:    lwz r29, 132(r1) # 4-byte Folded Reload
1790; SPE-NEXT:    lwz r28, 128(r1) # 4-byte Folded Reload
1791; SPE-NEXT:    lwz r27, 124(r1) # 4-byte Folded Reload
1792; SPE-NEXT:    lwz r26, 120(r1) # 4-byte Folded Reload
1793; SPE-NEXT:    lwz r25, 116(r1) # 4-byte Folded Reload
1794; SPE-NEXT:    lwz r24, 112(r1) # 4-byte Folded Reload
1795; SPE-NEXT:    lwz r23, 108(r1) # 4-byte Folded Reload
1796; SPE-NEXT:    lwz r22, 104(r1) # 4-byte Folded Reload
1797; SPE-NEXT:    lwz r21, 100(r1) # 4-byte Folded Reload
1798; SPE-NEXT:    lwz r0, 148(r1)
1799; SPE-NEXT:    addi r1, r1, 144
1800; SPE-NEXT:    mtlr r0
1801; SPE-NEXT:    blr
1802  %neg = fneg <4 x float> %vf2
1803  %fma = call <4 x float> @llvm.experimental.constrained.fma.v4f32(
1804                        <4 x float> %vf0, <4 x float> %vf1, <4 x float> %neg,
1805                        metadata !"round.dynamic",
1806                        metadata !"fpexcept.strict") #0
1807  %res = fneg <4 x float> %fma
1808  ret <4 x float> %res
1809}
1810
1811define <2 x double> @fnmsub_v2f64(<2 x double> %vf0, <2 x double> %vf1, <2 x double> %vf2) #0 {
1812; CHECK-LABEL: fnmsub_v2f64:
1813; CHECK:       # %bb.0:
1814; CHECK-NEXT:    xvnmsubadp v4, v2, v3
1815; CHECK-NEXT:    vmr v2, v4
1816; CHECK-NEXT:    blr
1817;
1818; NOVSX-LABEL: fnmsub_v2f64:
1819; NOVSX:       # %bb.0:
1820; NOVSX-NEXT:    fnmsub f2, f2, f4, f6
1821; NOVSX-NEXT:    fnmsub f1, f1, f3, f5
1822; NOVSX-NEXT:    blr
1823;
1824; SPE-LABEL: fnmsub_v2f64:
1825; SPE:       # %bb.0:
1826; SPE-NEXT:    mflr r0
1827; SPE-NEXT:    stw r0, 4(r1)
1828; SPE-NEXT:    stwu r1, -96(r1)
1829; SPE-NEXT:    .cfi_def_cfa_offset 96
1830; SPE-NEXT:    .cfi_offset lr, 4
1831; SPE-NEXT:    .cfi_offset r26, -24
1832; SPE-NEXT:    .cfi_offset r27, -20
1833; SPE-NEXT:    .cfi_offset r28, -16
1834; SPE-NEXT:    .cfi_offset r29, -12
1835; SPE-NEXT:    .cfi_offset r30, -8
1836; SPE-NEXT:    .cfi_offset r26, -80
1837; SPE-NEXT:    .cfi_offset r27, -72
1838; SPE-NEXT:    .cfi_offset r28, -64
1839; SPE-NEXT:    .cfi_offset r29, -56
1840; SPE-NEXT:    .cfi_offset r30, -48
1841; SPE-NEXT:    stw r30, 88(r1) # 4-byte Folded Spill
1842; SPE-NEXT:    evstdd r30, 48(r1) # 8-byte Folded Spill
1843; SPE-NEXT:    mr r30, r3
1844; SPE-NEXT:    evldd r3, 112(r1)
1845; SPE-NEXT:    evldd r11, 120(r1)
1846; SPE-NEXT:    stw r26, 72(r1) # 4-byte Folded Spill
1847; SPE-NEXT:    stw r27, 76(r1) # 4-byte Folded Spill
1848; SPE-NEXT:    stw r28, 80(r1) # 4-byte Folded Spill
1849; SPE-NEXT:    stw r29, 84(r1) # 4-byte Folded Spill
1850; SPE-NEXT:    evstdd r26, 16(r1) # 8-byte Folded Spill
1851; SPE-NEXT:    evstdd r27, 24(r1) # 8-byte Folded Spill
1852; SPE-NEXT:    efdneg r27, r11
1853; SPE-NEXT:    evstdd r28, 32(r1) # 8-byte Folded Spill
1854; SPE-NEXT:    evstdd r29, 40(r1) # 8-byte Folded Spill
1855; SPE-NEXT:    evmergelo r29, r7, r8
1856; SPE-NEXT:    evmergelo r9, r9, r10
1857; SPE-NEXT:    evmergelo r4, r5, r6
1858; SPE-NEXT:    efdneg r8, r3
1859; SPE-NEXT:    evmergehi r3, r4, r4
1860; SPE-NEXT:    evmergehi r5, r9, r9
1861; SPE-NEXT:    evmergehi r7, r8, r8
1862; SPE-NEXT:    mr r6, r9
1863; SPE-NEXT:    evldd r28, 104(r1)
1864; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
1865; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
1866; SPE-NEXT:    # kill: def $r5 killed $r5 killed $s5
1867; SPE-NEXT:    # kill: def $r7 killed $r7 killed $s7
1868; SPE-NEXT:    # kill: def $r8 killed $r8 killed $s8
1869; SPE-NEXT:    bl fma
1870; SPE-NEXT:    evmergelo r26, r3, r4
1871; SPE-NEXT:    evmergehi r3, r29, r29
1872; SPE-NEXT:    evmergehi r5, r28, r28
1873; SPE-NEXT:    evmergehi r7, r27, r27
1874; SPE-NEXT:    mr r4, r29
1875; SPE-NEXT:    mr r6, r28
1876; SPE-NEXT:    mr r8, r27
1877; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
1878; SPE-NEXT:    # kill: def $r5 killed $r5 killed $s5
1879; SPE-NEXT:    # kill: def $r7 killed $r7 killed $s7
1880; SPE-NEXT:    bl fma
1881; SPE-NEXT:    evmergelo r3, r3, r4
1882; SPE-NEXT:    li r5, 8
1883; SPE-NEXT:    efdneg r3, r3
1884; SPE-NEXT:    evstddx r3, r30, r5
1885; SPE-NEXT:    efdneg r3, r26
1886; SPE-NEXT:    evstdd r3, 0(r30)
1887; SPE-NEXT:    evldd r30, 48(r1) # 8-byte Folded Reload
1888; SPE-NEXT:    evldd r29, 40(r1) # 8-byte Folded Reload
1889; SPE-NEXT:    evldd r28, 32(r1) # 8-byte Folded Reload
1890; SPE-NEXT:    evldd r27, 24(r1) # 8-byte Folded Reload
1891; SPE-NEXT:    evldd r26, 16(r1) # 8-byte Folded Reload
1892; SPE-NEXT:    lwz r30, 88(r1) # 4-byte Folded Reload
1893; SPE-NEXT:    lwz r29, 84(r1) # 4-byte Folded Reload
1894; SPE-NEXT:    lwz r28, 80(r1) # 4-byte Folded Reload
1895; SPE-NEXT:    lwz r27, 76(r1) # 4-byte Folded Reload
1896; SPE-NEXT:    lwz r26, 72(r1) # 4-byte Folded Reload
1897; SPE-NEXT:    lwz r0, 100(r1)
1898; SPE-NEXT:    addi r1, r1, 96
1899; SPE-NEXT:    mtlr r0
1900; SPE-NEXT:    blr
1901  %neg = fneg <2 x double> %vf2
1902  %fma = call <2 x double> @llvm.experimental.constrained.fma.v2f64(
1903                        <2 x double> %vf0, <2 x double> %vf1, <2 x double> %neg,
1904                        metadata !"round.dynamic",
1905                        metadata !"fpexcept.strict") #0
1906  %res = fneg <2 x double> %fma
1907  ret <2 x double> %res
1908}
1909
1910define float @fsqrt_f32(float %f1) #0 {
1911; CHECK-LABEL: fsqrt_f32:
1912; CHECK:       # %bb.0:
1913; CHECK-NEXT:    xssqrtsp f1, f1
1914; CHECK-NEXT:    blr
1915;
1916; NOVSX-LABEL: fsqrt_f32:
1917; NOVSX:       # %bb.0:
1918; NOVSX-NEXT:    fsqrts f1, f1
1919; NOVSX-NEXT:    blr
1920;
1921; SPE-LABEL: fsqrt_f32:
1922; SPE:       # %bb.0:
1923; SPE-NEXT:    mflr r0
1924; SPE-NEXT:    stw r0, 4(r1)
1925; SPE-NEXT:    stwu r1, -16(r1)
1926; SPE-NEXT:    .cfi_def_cfa_offset 16
1927; SPE-NEXT:    .cfi_offset lr, 4
1928; SPE-NEXT:    bl sqrtf
1929; SPE-NEXT:    lwz r0, 20(r1)
1930; SPE-NEXT:    addi r1, r1, 16
1931; SPE-NEXT:    mtlr r0
1932; SPE-NEXT:    blr
1933  %res = call float @llvm.experimental.constrained.sqrt.f32(
1934                        float %f1,
1935                        metadata !"round.dynamic",
1936                        metadata !"fpexcept.strict") #0
1937  ret float %res
1938}
1939
1940define double @fsqrt_f64(double %f1) #0 {
1941; CHECK-LABEL: fsqrt_f64:
1942; CHECK:       # %bb.0:
1943; CHECK-NEXT:    xssqrtdp f1, f1
1944; CHECK-NEXT:    blr
1945;
1946; NOVSX-LABEL: fsqrt_f64:
1947; NOVSX:       # %bb.0:
1948; NOVSX-NEXT:    fsqrt f1, f1
1949; NOVSX-NEXT:    blr
1950;
1951; SPE-LABEL: fsqrt_f64:
1952; SPE:       # %bb.0:
1953; SPE-NEXT:    mflr r0
1954; SPE-NEXT:    stw r0, 4(r1)
1955; SPE-NEXT:    stwu r1, -16(r1)
1956; SPE-NEXT:    .cfi_def_cfa_offset 16
1957; SPE-NEXT:    .cfi_offset lr, 4
1958; SPE-NEXT:    evmergelo r4, r3, r4
1959; SPE-NEXT:    evmergehi r3, r4, r4
1960; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
1961; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
1962; SPE-NEXT:    bl sqrt
1963; SPE-NEXT:    evmergelo r4, r3, r4
1964; SPE-NEXT:    evmergehi r3, r4, r4
1965; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
1966; SPE-NEXT:    lwz r0, 20(r1)
1967; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
1968; SPE-NEXT:    addi r1, r1, 16
1969; SPE-NEXT:    mtlr r0
1970; SPE-NEXT:    blr
1971  %res = call double @llvm.experimental.constrained.sqrt.f64(
1972                        double %f1,
1973                        metadata !"round.dynamic",
1974                        metadata !"fpexcept.strict") #0
1975  ret double %res
1976}
1977
1978define <4 x float> @fsqrt_v4f32(<4 x float> %vf1) #0 {
1979; CHECK-LABEL: fsqrt_v4f32:
1980; CHECK:       # %bb.0:
1981; CHECK-NEXT:    xvsqrtsp v2, v2
1982; CHECK-NEXT:    blr
1983;
1984; NOVSX-LABEL: fsqrt_v4f32:
1985; NOVSX:       # %bb.0:
1986; NOVSX-NEXT:    addi r3, r1, -32
1987; NOVSX-NEXT:    stvx v2, 0, r3
1988; NOVSX-NEXT:    addi r3, r1, -16
1989; NOVSX-NEXT:    lfs f0, -20(r1)
1990; NOVSX-NEXT:    fsqrts f0, f0
1991; NOVSX-NEXT:    stfs f0, -4(r1)
1992; NOVSX-NEXT:    lfs f0, -24(r1)
1993; NOVSX-NEXT:    fsqrts f0, f0
1994; NOVSX-NEXT:    stfs f0, -8(r1)
1995; NOVSX-NEXT:    lfs f0, -28(r1)
1996; NOVSX-NEXT:    fsqrts f0, f0
1997; NOVSX-NEXT:    stfs f0, -12(r1)
1998; NOVSX-NEXT:    lfs f0, -32(r1)
1999; NOVSX-NEXT:    fsqrts f0, f0
2000; NOVSX-NEXT:    stfs f0, -16(r1)
2001; NOVSX-NEXT:    lvx v2, 0, r3
2002; NOVSX-NEXT:    blr
2003;
2004; SPE-LABEL: fsqrt_v4f32:
2005; SPE:       # %bb.0:
2006; SPE-NEXT:    mflr r0
2007; SPE-NEXT:    stw r0, 4(r1)
2008; SPE-NEXT:    stwu r1, -80(r1)
2009; SPE-NEXT:    .cfi_def_cfa_offset 80
2010; SPE-NEXT:    .cfi_offset lr, 4
2011; SPE-NEXT:    .cfi_offset r27, -20
2012; SPE-NEXT:    .cfi_offset r28, -16
2013; SPE-NEXT:    .cfi_offset r29, -12
2014; SPE-NEXT:    .cfi_offset r30, -8
2015; SPE-NEXT:    .cfi_offset r27, -72
2016; SPE-NEXT:    .cfi_offset r28, -64
2017; SPE-NEXT:    .cfi_offset r29, -56
2018; SPE-NEXT:    .cfi_offset r30, -48
2019; SPE-NEXT:    stw r28, 64(r1) # 4-byte Folded Spill
2020; SPE-NEXT:    evstdd r28, 16(r1) # 8-byte Folded Spill
2021; SPE-NEXT:    mr r28, r3
2022; SPE-NEXT:    mr r3, r6
2023; SPE-NEXT:    stw r27, 60(r1) # 4-byte Folded Spill
2024; SPE-NEXT:    stw r29, 68(r1) # 4-byte Folded Spill
2025; SPE-NEXT:    stw r30, 72(r1) # 4-byte Folded Spill
2026; SPE-NEXT:    evstdd r27, 8(r1) # 8-byte Folded Spill
2027; SPE-NEXT:    evstdd r29, 24(r1) # 8-byte Folded Spill
2028; SPE-NEXT:    mr r29, r4
2029; SPE-NEXT:    evstdd r30, 32(r1) # 8-byte Folded Spill
2030; SPE-NEXT:    mr r30, r5
2031; SPE-NEXT:    bl sqrtf
2032; SPE-NEXT:    mr r27, r3
2033; SPE-NEXT:    mr r3, r30
2034; SPE-NEXT:    bl sqrtf
2035; SPE-NEXT:    mr r30, r3
2036; SPE-NEXT:    mr r3, r29
2037; SPE-NEXT:    bl sqrtf
2038; SPE-NEXT:    mr r29, r3
2039; SPE-NEXT:    mr r3, r28
2040; SPE-NEXT:    bl sqrtf
2041; SPE-NEXT:    mr r4, r29
2042; SPE-NEXT:    mr r5, r30
2043; SPE-NEXT:    mr r6, r27
2044; SPE-NEXT:    evldd r30, 32(r1) # 8-byte Folded Reload
2045; SPE-NEXT:    evldd r29, 24(r1) # 8-byte Folded Reload
2046; SPE-NEXT:    evldd r28, 16(r1) # 8-byte Folded Reload
2047; SPE-NEXT:    evldd r27, 8(r1) # 8-byte Folded Reload
2048; SPE-NEXT:    lwz r30, 72(r1) # 4-byte Folded Reload
2049; SPE-NEXT:    lwz r29, 68(r1) # 4-byte Folded Reload
2050; SPE-NEXT:    lwz r28, 64(r1) # 4-byte Folded Reload
2051; SPE-NEXT:    lwz r27, 60(r1) # 4-byte Folded Reload
2052; SPE-NEXT:    lwz r0, 84(r1)
2053; SPE-NEXT:    addi r1, r1, 80
2054; SPE-NEXT:    mtlr r0
2055; SPE-NEXT:    blr
2056  %res = call <4 x float> @llvm.experimental.constrained.sqrt.v4f32(
2057                        <4 x float> %vf1,
2058                        metadata !"round.dynamic",
2059                        metadata !"fpexcept.strict") #0
2060  ret <4 x float> %res
2061}
2062
2063define <2 x double> @fsqrt_v2f64(<2 x double> %vf1) #0 {
2064; CHECK-LABEL: fsqrt_v2f64:
2065; CHECK:       # %bb.0:
2066; CHECK-NEXT:    xvsqrtdp v2, v2
2067; CHECK-NEXT:    blr
2068;
2069; NOVSX-LABEL: fsqrt_v2f64:
2070; NOVSX:       # %bb.0:
2071; NOVSX-NEXT:    fsqrt f2, f2
2072; NOVSX-NEXT:    fsqrt f1, f1
2073; NOVSX-NEXT:    blr
2074;
2075; SPE-LABEL: fsqrt_v2f64:
2076; SPE:       # %bb.0:
2077; SPE-NEXT:    mflr r0
2078; SPE-NEXT:    stw r0, 4(r1)
2079; SPE-NEXT:    stwu r1, -64(r1)
2080; SPE-NEXT:    .cfi_def_cfa_offset 64
2081; SPE-NEXT:    .cfi_offset lr, 4
2082; SPE-NEXT:    .cfi_offset r28, -16
2083; SPE-NEXT:    .cfi_offset r29, -12
2084; SPE-NEXT:    .cfi_offset r30, -8
2085; SPE-NEXT:    .cfi_offset r28, -48
2086; SPE-NEXT:    .cfi_offset r29, -40
2087; SPE-NEXT:    .cfi_offset r30, -32
2088; SPE-NEXT:    stw r28, 48(r1) # 4-byte Folded Spill
2089; SPE-NEXT:    stw r29, 52(r1) # 4-byte Folded Spill
2090; SPE-NEXT:    stw r30, 56(r1) # 4-byte Folded Spill
2091; SPE-NEXT:    evstdd r28, 16(r1) # 8-byte Folded Spill
2092; SPE-NEXT:    evstdd r29, 24(r1) # 8-byte Folded Spill
2093; SPE-NEXT:    evstdd r30, 32(r1) # 8-byte Folded Spill
2094; SPE-NEXT:    evmergelo r29, r7, r8
2095; SPE-NEXT:    evmergelo r4, r5, r6
2096; SPE-NEXT:    mr r30, r3
2097; SPE-NEXT:    evmergehi r3, r4, r4
2098; SPE-NEXT:    # kill: def $r4 killed $r4 killed $s4
2099; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
2100; SPE-NEXT:    bl sqrt
2101; SPE-NEXT:    evmergelo r28, r3, r4
2102; SPE-NEXT:    evmergehi r3, r29, r29
2103; SPE-NEXT:    mr r4, r29
2104; SPE-NEXT:    # kill: def $r3 killed $r3 killed $s3
2105; SPE-NEXT:    bl sqrt
2106; SPE-NEXT:    li r5, 8
2107; SPE-NEXT:    evmergelo r3, r3, r4
2108; SPE-NEXT:    evstddx r3, r30, r5
2109; SPE-NEXT:    evstdd r28, 0(r30)
2110; SPE-NEXT:    evldd r30, 32(r1) # 8-byte Folded Reload
2111; SPE-NEXT:    evldd r29, 24(r1) # 8-byte Folded Reload
2112; SPE-NEXT:    evldd r28, 16(r1) # 8-byte Folded Reload
2113; SPE-NEXT:    lwz r30, 56(r1) # 4-byte Folded Reload
2114; SPE-NEXT:    lwz r29, 52(r1) # 4-byte Folded Reload
2115; SPE-NEXT:    lwz r28, 48(r1) # 4-byte Folded Reload
2116; SPE-NEXT:    lwz r0, 68(r1)
2117; SPE-NEXT:    addi r1, r1, 64
2118; SPE-NEXT:    mtlr r0
2119; SPE-NEXT:    blr
2120  %res = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64(
2121                        <2 x double> %vf1,
2122                        metadata !"round.dynamic",
2123                        metadata !"fpexcept.strict") #0
2124  ret <2 x double> %res
2125}
2126
2127attributes #0 = { strictfp }
2128