1; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \
2; RUN:   -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s
3
4; Function Attrs: norecurse nounwind
5define void @qpAdd(fp128* nocapture readonly %a, fp128* nocapture %res) {
6entry:
7  %0 = load fp128, fp128* %a, align 16
8  %add = fadd fp128 %0, %0
9  store fp128 %add, fp128* %res, align 16
10  ret void
11; CHECK-LABEL: qpAdd
12; CHECK-NOT: bl __addtf3
13; CHECK: xsaddqp
14; CHECK: stxv
15; CHECK: blr
16}
17
18; Function Attrs: norecurse nounwind
19define void @qpSub(fp128* nocapture readonly %a, fp128* nocapture %res) {
20entry:
21  %0 = load fp128, fp128* %a, align 16
22  %sub = fsub fp128 %0, %0
23  store fp128 %sub, fp128* %res, align 16
24  ret void
25; CHECK-LABEL: qpSub
26; CHECK-NOT: bl __subtf3
27; CHECK: xssubqp
28; CHECK: stxv
29; CHECK: blr
30}
31
32; Function Attrs: norecurse nounwind
33define void @qpMul(fp128* nocapture readonly %a, fp128* nocapture %res) {
34entry:
35  %0 = load fp128, fp128* %a, align 16
36  %mul = fmul fp128 %0, %0
37  store fp128 %mul, fp128* %res, align 16
38  ret void
39; CHECK-LABEL: qpMul
40; CHECK-NOT: bl __multf3
41; CHECK: xsmulqp
42; CHECK: stxv
43; CHECK: blr
44}
45
46; Function Attrs: norecurse nounwind
47define void @qpDiv(fp128* nocapture readonly %a, fp128* nocapture %res) {
48entry:
49  %0 = load fp128, fp128* %a, align 16
50  %div = fdiv fp128 %0, %0
51  store fp128 %div, fp128* %res, align 16
52  ret void
53; CHECK-LABEL: qpDiv
54; CHECK-NOT: bl __divtf3
55; CHECK: xsdivqp
56; CHECK: stxv
57; CHECK: blr
58}
59
60define void @testLdNSt(i8* nocapture readonly %PtrC, fp128* nocapture %PtrF) {
61entry:
62  %add.ptr = getelementptr inbounds i8, i8* %PtrC, i64 4
63  %0 = bitcast i8* %add.ptr to fp128*
64  %1 = load fp128, fp128* %0, align 16
65  %2 = bitcast fp128* %PtrF to i8*
66  %add.ptr1 = getelementptr inbounds i8, i8* %2, i64 8
67  %3 = bitcast i8* %add.ptr1 to fp128*
68  store fp128 %1, fp128* %3, align 16
69  ret void
70; CHECK-LABEL: testLdNSt
71; CHECK: lxvx
72; CHECK: stxvx
73; CHECK-NEXT: blr
74}
75
76define void @qpSqrt(fp128* nocapture readonly %a, fp128* nocapture %res) {
77entry:
78  %0 = load fp128, fp128* %a, align 16
79  %1 = tail call fp128 @llvm.sqrt.f128(fp128 %0)
80  store fp128 %1, fp128* %res, align 16
81  ret void
82
83; CHECK-LABEL: qpSqrt
84; CHECK-NOT: bl sqrtl
85; CHECK: xssqrtqp
86; CHECK: stxv
87; CHECK: blr
88}
89declare fp128 @llvm.sqrt.f128(fp128 %Val)
90
91define void @qpCpsgn(fp128* nocapture readonly %a, fp128* nocapture readonly %b,
92                     fp128* nocapture %res) {
93entry:
94  %0 = load fp128, fp128* %a, align 16
95  %1 = load fp128, fp128* %b, align 16
96  %2 = tail call fp128 @llvm.copysign.f128(fp128 %0, fp128 %1)
97  store fp128 %2, fp128* %res, align 16
98  ret void
99
100; CHECK-LABEL: qpCpsgn
101; CHECK-NOT: rldimi
102; CHECK: xscpsgnqp
103; CHECK: stxv
104; CHECK: blr
105}
106declare fp128 @llvm.copysign.f128(fp128 %Mag, fp128 %Sgn)
107
108define void @qpAbs(fp128* nocapture readonly %a, fp128* nocapture %res) {
109entry:
110  %0 = load fp128, fp128* %a, align 16
111  %1 = tail call fp128 @llvm.fabs.f128(fp128 %0)
112  store fp128 %1, fp128* %res, align 16
113  ret void
114
115; CHECK-LABEL: qpAbs
116; CHECK-NOT: clrldi
117; CHECK: xsabsqp
118; CHECK: stxv
119; CHECK: blr
120}
121declare fp128 @llvm.fabs.f128(fp128 %Val)
122
123define void @qpNAbs(fp128* nocapture readonly %a, fp128* nocapture %res) {
124entry:
125  %0 = load fp128, fp128* %a, align 16
126  %1 = tail call fp128 @llvm.fabs.f128(fp128 %0)
127  %neg = fsub fp128 0xL00000000000000008000000000000000, %1
128  store fp128 %neg, fp128* %res, align 16
129  ret void
130
131; CHECK-LABEL: qpNAbs
132; CHECK-NOT: bl __subtf3
133; CHECK: xsnabsqp
134; CHECK: stxv
135; CHECK: blr
136}
137
138define void @qpNeg(fp128* nocapture readonly %a, fp128* nocapture %res) {
139entry:
140  %0 = load fp128, fp128* %a, align 16
141  %sub = fsub fp128 0xL00000000000000008000000000000000, %0
142  store fp128 %sub, fp128* %res, align 16
143  ret void
144
145; CHECK-LABEL: qpNeg
146; CHECK-NOT: bl __subtf3
147; CHECK: xsnegqp
148; CHECK: stxv
149; CHECK: blr
150}
151
152define fp128 @qp_sin(fp128* nocapture readonly %a) {
153; CHECK-LABEL: qp_sin:
154; CHECK:         lxv v2, 0(r3)
155; CHECK:         bl sinf128
156; CHECK:         blr
157entry:
158  %0 = load fp128, fp128* %a, align 16
159  %1 = tail call fp128 @llvm.sin.f128(fp128 %0)
160  ret fp128 %1
161}
162declare fp128 @llvm.sin.f128(fp128 %Val)
163
164define fp128 @qp_cos(fp128* nocapture readonly %a) {
165; CHECK-LABEL: qp_cos:
166; CHECK:         lxv v2, 0(r3)
167; CHECK:         bl cosf128
168; CHECK:         blr
169entry:
170  %0 = load fp128, fp128* %a, align 16
171  %1 = tail call fp128 @llvm.cos.f128(fp128 %0)
172  ret fp128 %1
173}
174declare fp128 @llvm.cos.f128(fp128 %Val)
175
176define fp128 @qp_log(fp128* nocapture readonly %a) {
177; CHECK-LABEL: qp_log:
178; CHECK:         lxv v2, 0(r3)
179; CHECK:         bl logf128
180; CHECK:         blr
181entry:
182  %0 = load fp128, fp128* %a, align 16
183  %1 = tail call fp128 @llvm.log.f128(fp128 %0)
184  ret fp128 %1
185}
186declare fp128     @llvm.log.f128(fp128 %Val)
187
188define fp128 @qp_log10(fp128* nocapture readonly %a) {
189; CHECK-LABEL: qp_log10:
190; CHECK:         lxv v2, 0(r3)
191; CHECK:         bl log10f128
192; CHECK:         blr
193entry:
194  %0 = load fp128, fp128* %a, align 16
195  %1 = tail call fp128 @llvm.log10.f128(fp128 %0)
196  ret fp128 %1
197}
198declare fp128     @llvm.log10.f128(fp128 %Val)
199
200define fp128 @qp_log2(fp128* nocapture readonly %a) {
201; CHECK-LABEL: qp_log2:
202; CHECK:         lxv v2, 0(r3)
203; CHECK:         bl log2f128
204; CHECK:         blr
205entry:
206  %0 = load fp128, fp128* %a, align 16
207  %1 = tail call fp128 @llvm.log2.f128(fp128 %0)
208  ret fp128 %1
209}
210declare fp128     @llvm.log2.f128(fp128 %Val)
211
212define fp128 @qp_minnum(fp128* nocapture readonly %a,
213                        fp128* nocapture readonly %b) {
214; CHECK-LABEL: qp_minnum:
215; CHECK:         lxv v2, 0(r3)
216; CHECK:         lxv v3, 0(r4)
217; CHECK:         bl fminf128
218; CHECK:         blr
219entry:
220  %0 = load fp128, fp128* %a, align 16
221  %1 = load fp128, fp128* %b, align 16
222  %2 = tail call fp128 @llvm.minnum.f128(fp128 %0, fp128 %1)
223  ret fp128 %2
224}
225declare fp128     @llvm.minnum.f128(fp128 %Val0, fp128 %Val1)
226
227define fp128 @qp_maxnum(fp128* nocapture readonly %a,
228                        fp128* nocapture readonly %b) {
229; CHECK-LABEL: qp_maxnum:
230; CHECK:         lxv v2, 0(r3)
231; CHECK:         lxv v3, 0(r4)
232; CHECK:         bl fmaxf128
233; CHECK:         blr
234entry:
235  %0 = load fp128, fp128* %a, align 16
236  %1 = load fp128, fp128* %b, align 16
237  %2 = tail call fp128 @llvm.maxnum.f128(fp128 %0, fp128 %1)
238  ret fp128 %2
239}
240declare fp128     @llvm.maxnum.f128(fp128 %Val0, fp128 %Val1)
241
242define fp128 @qp_pow(fp128* nocapture readonly %a,
243                     fp128* nocapture readonly %b) {
244; CHECK-LABEL: qp_pow:
245; CHECK:         lxv v2, 0(r3)
246; CHECK:         lxv v3, 0(r4)
247; CHECK:         bl powf128
248; CHECK:         blr
249entry:
250  %0 = load fp128, fp128* %a, align 16
251  %1 = load fp128, fp128* %b, align 16
252  %2 = tail call fp128 @llvm.pow.f128(fp128 %0, fp128 %1)
253  ret fp128 %2
254}
255declare fp128 @llvm.pow.f128(fp128 %Val, fp128 %Power)
256
257define fp128 @qp_exp(fp128* nocapture readonly %a) {
258; CHECK-LABEL: qp_exp:
259; CHECK:         lxv v2, 0(r3)
260; CHECK:         bl expf128
261; CHECK:         blr
262entry:
263  %0 = load fp128, fp128* %a, align 16
264  %1 = tail call fp128 @llvm.exp.f128(fp128 %0)
265  ret fp128 %1
266}
267declare fp128     @llvm.exp.f128(fp128 %Val)
268
269define fp128 @qp_exp2(fp128* nocapture readonly %a) {
270; CHECK-LABEL: qp_exp2:
271; CHECK:         lxv v2, 0(r3)
272; CHECK:         bl exp2f128
273; CHECK:         blr
274entry:
275  %0 = load fp128, fp128* %a, align 16
276  %1 = tail call fp128 @llvm.exp2.f128(fp128 %0)
277  ret fp128 %1
278}
279declare fp128     @llvm.exp2.f128(fp128 %Val)
280
281define void @qp_powi(fp128* nocapture readonly %a, i32* nocapture readonly %b,
282                     fp128* nocapture %res) {
283; CHECK-LABEL: qp_powi:
284; CHECK:         lxv v2, 0(r3)
285; CHECK:         lwz r5, 0(r4)
286; CHECK:         bl __powikf2
287; CHECK:         blr
288entry:
289  %0 = load fp128, fp128* %a, align 16
290  %1 = load i32, i32* %b, align 8
291  %2 = tail call fp128 @llvm.powi.f128(fp128 %0, i32 %1)
292  store fp128 %2, fp128* %res, align 16
293  ret void
294}
295declare fp128 @llvm.powi.f128(fp128 %Val, i32 %power)
296
297@a = common global fp128 0xL00000000000000000000000000000000, align 16
298@b = common global fp128 0xL00000000000000000000000000000000, align 16
299
300define fp128 @qp_frem() #0 {
301entry:
302  %0 = load fp128, fp128* @a, align 16
303  %1 = load fp128, fp128* @b, align 16
304  %rem = frem fp128 %0, %1
305  ret fp128 %rem
306; CHECK-LABEL: qp_frem
307; CHECK: bl fmodf128
308; CHECK: blr
309}
310