1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -relocation-model=pic -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
3; RUN:   -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s \
4; RUN:   | FileCheck %s
5; RUN: llc -relocation-model=pic -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown \
6; RUN:   -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s \
7; RUN:   | FileCheck -check-prefix=CHECK-BE %s
8; RUN: llc -relocation-model=pic -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
9; RUN:   -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s \
10; RUN:   | FileCheck %s -check-prefix=CHECK-P8
11
12; Testing homogeneous aggregates.
13
14%struct.With9fp128params = type { fp128, fp128, fp128, fp128, fp128, fp128,
15                                  fp128, fp128, fp128 }
16
17@a1 = local_unnamed_addr global [3 x fp128] zeroinitializer, align 16
18
19; Function Attrs: norecurse nounwind readonly
20define fp128 @testArray_01(fp128* nocapture readonly %sa) {
21; CHECK-LABEL: testArray_01:
22; CHECK:       # %bb.0: # %entry
23; CHECK-NEXT:    lxv v2, 32(r3)
24; CHECK-NEXT:    blr
25;
26; CHECK-BE-LABEL: testArray_01:
27; CHECK-BE:       # %bb.0: # %entry
28; CHECK-BE-NEXT:    lxv v2, 32(r3)
29; CHECK-BE-NEXT:    blr
30;
31; CHECK-P8-LABEL: testArray_01:
32; CHECK-P8:       # %bb.0: # %entry
33; CHECK-P8-NEXT:    addi r3, r3, 32
34; CHECK-P8-NEXT:    lvx v2, 0, r3
35; CHECK-P8-NEXT:    blr
36
37entry:
38  %arrayidx = getelementptr inbounds fp128, fp128* %sa, i64 2
39  %0 = load fp128, fp128* %arrayidx, align 16
40  ret fp128 %0
41}
42
43; Function Attrs: norecurse nounwind readonly
44define fp128 @testArray_02() {
45; CHECK-LABEL: testArray_02:
46; CHECK:       # %bb.0: # %entry
47; CHECK-NEXT:    addis r3, r2, .LC0@toc@ha
48; CHECK-NEXT:    ld r3, .LC0@toc@l(r3)
49; CHECK-NEXT:    lxv v2, 32(r3)
50; CHECK-NEXT:    blr
51;
52; CHECK-BE-LABEL: testArray_02:
53; CHECK-BE:       # %bb.0: # %entry
54; CHECK-BE-NEXT:    addis r3, r2, .LC0@toc@ha
55; CHECK-BE-NEXT:    ld r3, .LC0@toc@l(r3)
56; CHECK-BE-NEXT:    lxv v2, 32(r3)
57; CHECK-BE-NEXT:    blr
58;
59; CHECK-P8-LABEL: testArray_02:
60; CHECK-P8:       # %bb.0: # %entry
61; CHECK-P8-NEXT:    addis r3, r2, .LC0@toc@ha
62; CHECK-P8-NEXT:    ld r3, .LC0@toc@l(r3)
63; CHECK-P8-NEXT:    addi r3, r3, 32
64; CHECK-P8-NEXT:    lvx v2, 0, r3
65; CHECK-P8-NEXT:    blr
66
67entry:
68  %0 = load fp128, fp128* getelementptr inbounds ([3 x fp128], [3 x fp128]* @a1,
69                                                  i64 0, i64 2), align 16
70  ret fp128 %0
71}
72
73; Function Attrs: norecurse nounwind readnone
74define fp128 @testStruct_01(fp128 inreg returned %a.coerce) {
75; CHECK-LABEL: testStruct_01:
76; CHECK:       # %bb.0: # %entry
77; CHECK-NEXT:    blr
78;
79; CHECK-BE-LABEL: testStruct_01:
80; CHECK-BE:       # %bb.0: # %entry
81; CHECK-BE-NEXT:    blr
82;
83; CHECK-P8-LABEL: testStruct_01:
84; CHECK-P8:       # %bb.0: # %entry
85; CHECK-P8-NEXT:    blr
86
87entry:
88  ret fp128 %a.coerce
89}
90
91; Function Attrs: norecurse nounwind readnone
92define fp128 @testStruct_02([8 x fp128] %a.coerce) {
93; CHECK-LABEL: testStruct_02:
94; CHECK:       # %bb.0: # %entry
95; CHECK-NEXT:    vmr v2, v9
96; CHECK-NEXT:    blr
97;
98; CHECK-BE-LABEL: testStruct_02:
99; CHECK-BE:       # %bb.0: # %entry
100; CHECK-BE-NEXT:    vmr v2, v9
101; CHECK-BE-NEXT:    blr
102;
103; CHECK-P8-LABEL: testStruct_02:
104; CHECK-P8:       # %bb.0: # %entry
105; CHECK-P8-NEXT:    vmr v2, v9
106; CHECK-P8-NEXT:    blr
107
108entry:
109  %a.coerce.fca.7.extract = extractvalue [8 x fp128] %a.coerce, 7
110  ret fp128 %a.coerce.fca.7.extract
111}
112
113; Since we can only pass a max of 8 float128 value in VSX registers, ensure we
114; store to stack if passing more.
115; Function Attrs: norecurse nounwind readonly
116define fp128 @testStruct_03(%struct.With9fp128params* byval(%struct.With9fp128params) nocapture readonly align 16 %a) {
117; CHECK-LABEL: testStruct_03:
118; CHECK:       # %bb.0: # %entry
119; CHECK-NEXT:    lxv v2, 128(r1)
120; CHECK-NEXT:    std r3, 32(r1)
121; CHECK-NEXT:    std r4, 40(r1)
122; CHECK-NEXT:    std r5, 48(r1)
123; CHECK-NEXT:    std r6, 56(r1)
124; CHECK-NEXT:    std r7, 64(r1)
125; CHECK-NEXT:    std r8, 72(r1)
126; CHECK-NEXT:    std r9, 80(r1)
127; CHECK-NEXT:    std r10, 88(r1)
128; CHECK-NEXT:    blr
129;
130; CHECK-BE-LABEL: testStruct_03:
131; CHECK-BE:       # %bb.0: # %entry
132; CHECK-BE-NEXT:    lxv v2, 144(r1)
133; CHECK-BE-NEXT:    std r3, 48(r1)
134; CHECK-BE-NEXT:    std r4, 56(r1)
135; CHECK-BE-NEXT:    std r5, 64(r1)
136; CHECK-BE-NEXT:    std r6, 72(r1)
137; CHECK-BE-NEXT:    std r7, 80(r1)
138; CHECK-BE-NEXT:    std r8, 88(r1)
139; CHECK-BE-NEXT:    std r9, 96(r1)
140; CHECK-BE-NEXT:    std r10, 104(r1)
141; CHECK-BE-NEXT:    blr
142;
143; CHECK-P8-LABEL: testStruct_03:
144; CHECK-P8:       # %bb.0: # %entry
145; CHECK-P8-NEXT:    li r11, 96
146; CHECK-P8-NEXT:    addi r12, r1, 32
147; CHECK-P8-NEXT:    std r3, 32(r1)
148; CHECK-P8-NEXT:    std r4, 40(r1)
149; CHECK-P8-NEXT:    std r5, 48(r1)
150; CHECK-P8-NEXT:    std r6, 56(r1)
151; CHECK-P8-NEXT:    lvx v2, r12, r11
152; CHECK-P8-NEXT:    std r7, 64(r1)
153; CHECK-P8-NEXT:    std r8, 72(r1)
154; CHECK-P8-NEXT:    std r9, 80(r1)
155; CHECK-P8-NEXT:    std r10, 88(r1)
156; CHECK-P8-NEXT:    blr
157
158entry:
159  %a7 = getelementptr inbounds %struct.With9fp128params,
160                               %struct.With9fp128params* %a, i64 0, i32 6
161  %0 = load fp128, fp128* %a7, align 16
162  ret fp128 %0
163}
164
165; Function Attrs: norecurse nounwind readnone
166define fp128 @testStruct_04([8 x fp128] %a.coerce) {
167; CHECK-LABEL: testStruct_04:
168; CHECK:       # %bb.0: # %entry
169; CHECK-NEXT:    vmr v2, v5
170; CHECK-NEXT:    blr
171;
172; CHECK-BE-LABEL: testStruct_04:
173; CHECK-BE:       # %bb.0: # %entry
174; CHECK-BE-NEXT:    vmr v2, v5
175; CHECK-BE-NEXT:    blr
176;
177; CHECK-P8-LABEL: testStruct_04:
178; CHECK-P8:       # %bb.0: # %entry
179; CHECK-P8-NEXT:    vmr v2, v5
180; CHECK-P8-NEXT:    blr
181
182entry:
183  %a.coerce.fca.3.extract = extractvalue [8 x fp128] %a.coerce, 3
184  ret fp128 %a.coerce.fca.3.extract
185}
186
187; Function Attrs: norecurse nounwind readnone
188define fp128 @testHUnion_01([1 x fp128] %a.coerce) {
189; CHECK-LABEL: testHUnion_01:
190; CHECK:       # %bb.0: # %entry
191; CHECK-NEXT:    blr
192;
193; CHECK-BE-LABEL: testHUnion_01:
194; CHECK-BE:       # %bb.0: # %entry
195; CHECK-BE-NEXT:    blr
196;
197; CHECK-P8-LABEL: testHUnion_01:
198; CHECK-P8:       # %bb.0: # %entry
199; CHECK-P8-NEXT:    blr
200
201entry:
202  %a.coerce.fca.0.extract = extractvalue [1 x fp128] %a.coerce, 0
203  ret fp128 %a.coerce.fca.0.extract
204}
205
206; Function Attrs: norecurse nounwind readnone
207define fp128 @testHUnion_02([3 x fp128] %a.coerce) {
208; CHECK-LABEL: testHUnion_02:
209; CHECK:       # %bb.0: # %entry
210; CHECK-NEXT:    blr
211;
212; CHECK-BE-LABEL: testHUnion_02:
213; CHECK-BE:       # %bb.0: # %entry
214; CHECK-BE-NEXT:    blr
215;
216; CHECK-P8-LABEL: testHUnion_02:
217; CHECK-P8:       # %bb.0: # %entry
218; CHECK-P8-NEXT:    blr
219
220entry:
221  %a.coerce.fca.0.extract = extractvalue [3 x fp128] %a.coerce, 0
222  ret fp128 %a.coerce.fca.0.extract
223}
224
225; Function Attrs: norecurse nounwind readnone
226define fp128 @testHUnion_03([3 x fp128] %a.coerce) {
227; CHECK-LABEL: testHUnion_03:
228; CHECK:       # %bb.0: # %entry
229; CHECK-NEXT:    vmr v2, v3
230; CHECK-NEXT:    blr
231;
232; CHECK-BE-LABEL: testHUnion_03:
233; CHECK-BE:       # %bb.0: # %entry
234; CHECK-BE-NEXT:    vmr v2, v3
235; CHECK-BE-NEXT:    blr
236;
237; CHECK-P8-LABEL: testHUnion_03:
238; CHECK-P8:       # %bb.0: # %entry
239; CHECK-P8-NEXT:    vmr v2, v3
240; CHECK-P8-NEXT:    blr
241
242entry:
243  %a.coerce.fca.1.extract = extractvalue [3 x fp128] %a.coerce, 1
244  ret fp128 %a.coerce.fca.1.extract
245}
246
247; Function Attrs: norecurse nounwind readnone
248define fp128 @testHUnion_04([3 x fp128] %a.coerce) {
249; CHECK-LABEL: testHUnion_04:
250; CHECK:       # %bb.0: # %entry
251; CHECK-NEXT:    vmr v2, v4
252; CHECK-NEXT:    blr
253;
254; CHECK-BE-LABEL: testHUnion_04:
255; CHECK-BE:       # %bb.0: # %entry
256; CHECK-BE-NEXT:    vmr v2, v4
257; CHECK-BE-NEXT:    blr
258;
259; CHECK-P8-LABEL: testHUnion_04:
260; CHECK-P8:       # %bb.0: # %entry
261; CHECK-P8-NEXT:    vmr v2, v4
262; CHECK-P8-NEXT:    blr
263
264entry:
265  %a.coerce.fca.2.extract = extractvalue [3 x fp128] %a.coerce, 2
266  ret fp128 %a.coerce.fca.2.extract
267}
268
269; Testing mixed member aggregates.
270
271%struct.MixedC = type { i32, %struct.SA, float, [12 x i8] }
272%struct.SA = type { double, fp128, <4 x float> }
273
274; Function Attrs: norecurse nounwind readnone
275define fp128 @testMixedAggregate([3 x i128] %a.coerce) {
276; CHECK-LABEL: testMixedAggregate:
277; CHECK:       # %bb.0: # %entry
278; CHECK-NEXT:    mtvsrdd v2, r8, r7
279; CHECK-NEXT:    blr
280;
281; CHECK-BE-LABEL: testMixedAggregate:
282; CHECK-BE:       # %bb.0: # %entry
283; CHECK-BE-NEXT:    mtvsrdd v2, r8, r7
284; CHECK-BE-NEXT:    blr
285;
286; CHECK-P8-LABEL: testMixedAggregate:
287; CHECK-P8:       # %bb.0: # %entry
288; CHECK-P8-NEXT:    addi r3, r1, -16
289; CHECK-P8-NEXT:    std r8, -8(r1)
290; CHECK-P8-NEXT:    std r7, -16(r1)
291; CHECK-P8-NEXT:    lvx v2, 0, r3
292; CHECK-P8-NEXT:    blr
293
294entry:
295  %a.coerce.fca.2.extract = extractvalue [3 x i128] %a.coerce, 2
296  %0 = bitcast i128 %a.coerce.fca.2.extract to fp128
297  ret fp128 %0
298}
299
300; Function Attrs: norecurse nounwind readnone
301define fp128 @testMixedAggregate_02([4 x i128] %a.coerce) {
302; CHECK-LABEL: testMixedAggregate_02:
303; CHECK:       # %bb.0: # %entry
304; CHECK-NEXT:    mtvsrdd v2, r6, r5
305; CHECK-NEXT:    blr
306;
307; CHECK-BE-LABEL: testMixedAggregate_02:
308; CHECK-BE:       # %bb.0: # %entry
309; CHECK-BE-NEXT:    mtvsrdd v2, r6, r5
310; CHECK-BE-NEXT:    blr
311;
312; CHECK-P8-LABEL: testMixedAggregate_02:
313; CHECK-P8:       # %bb.0: # %entry
314; CHECK-P8-NEXT:    addi r3, r1, -16
315; CHECK-P8-NEXT:    std r6, -8(r1)
316; CHECK-P8-NEXT:    std r5, -16(r1)
317; CHECK-P8-NEXT:    lvx v2, 0, r3
318; CHECK-P8-NEXT:    blr
319
320entry:
321  %a.coerce.fca.1.extract = extractvalue [4 x i128] %a.coerce, 1
322  %0 = bitcast i128 %a.coerce.fca.1.extract to fp128
323  ret fp128 %0
324}
325
326; Function Attrs: norecurse nounwind readnone
327define fp128 @testMixedAggregate_03([4 x i128] %sa.coerce) {
328; CHECK-LABEL: testMixedAggregate_03:
329; CHECK:       # %bb.0: # %entry
330; CHECK-NEXT:    mtvsrwa v2, r3
331; CHECK-NEXT:    mtvsrdd v3, r6, r5
332; CHECK-NEXT:    xscvsdqp v2, v2
333; CHECK-NEXT:    xsaddqp v2, v3, v2
334; CHECK-NEXT:    mtvsrd v3, r10
335; CHECK-NEXT:    xscvsdqp v3, v3
336; CHECK-NEXT:    xsaddqp v2, v2, v3
337; CHECK-NEXT:    blr
338;
339; CHECK-BE-LABEL: testMixedAggregate_03:
340; CHECK-BE:       # %bb.0: # %entry
341; CHECK-BE-NEXT:    mtvsrwa v2, r4
342; CHECK-BE-NEXT:    mtvsrdd v3, r6, r5
343; CHECK-BE-NEXT:    xscvsdqp v2, v2
344; CHECK-BE-NEXT:    xsaddqp v2, v3, v2
345; CHECK-BE-NEXT:    mtvsrd v3, r9
346; CHECK-BE-NEXT:    xscvsdqp v3, v3
347; CHECK-BE-NEXT:    xsaddqp v2, v2, v3
348; CHECK-BE-NEXT:    blr
349;
350; CHECK-P8-LABEL: testMixedAggregate_03:
351; CHECK-P8:       # %bb.0: # %entry
352; CHECK-P8-NEXT:    mflr r0
353; CHECK-P8-NEXT:    std r0, 16(r1)
354; CHECK-P8-NEXT:    stdu r1, -96(r1)
355; CHECK-P8-NEXT:    .cfi_def_cfa_offset 96
356; CHECK-P8-NEXT:    .cfi_offset lr, 16
357; CHECK-P8-NEXT:    .cfi_offset r30, -16
358; CHECK-P8-NEXT:    .cfi_offset v31, -32
359; CHECK-P8-NEXT:    li r4, 64
360; CHECK-P8-NEXT:    std r30, 80(r1) # 8-byte Folded Spill
361; CHECK-P8-NEXT:    extsw r3, r3
362; CHECK-P8-NEXT:    mr r30, r10
363; CHECK-P8-NEXT:    stvx v31, r1, r4 # 16-byte Folded Spill
364; CHECK-P8-NEXT:    addi r4, r1, 48
365; CHECK-P8-NEXT:    std r6, 56(r1)
366; CHECK-P8-NEXT:    std r5, 48(r1)
367; CHECK-P8-NEXT:    lvx v31, 0, r4
368; CHECK-P8-NEXT:    bl __floatsikf
369; CHECK-P8-NEXT:    nop
370; CHECK-P8-NEXT:    vmr v3, v2
371; CHECK-P8-NEXT:    vmr v2, v31
372; CHECK-P8-NEXT:    bl __addkf3
373; CHECK-P8-NEXT:    nop
374; CHECK-P8-NEXT:    mr r3, r30
375; CHECK-P8-NEXT:    vmr v31, v2
376; CHECK-P8-NEXT:    bl __floatdikf
377; CHECK-P8-NEXT:    nop
378; CHECK-P8-NEXT:    vmr v3, v2
379; CHECK-P8-NEXT:    vmr v2, v31
380; CHECK-P8-NEXT:    bl __addkf3
381; CHECK-P8-NEXT:    nop
382; CHECK-P8-NEXT:    li r3, 64
383; CHECK-P8-NEXT:    ld r30, 80(r1) # 8-byte Folded Reload
384; CHECK-P8-NEXT:    lvx v31, r1, r3 # 16-byte Folded Reload
385; CHECK-P8-NEXT:    addi r1, r1, 96
386; CHECK-P8-NEXT:    ld r0, 16(r1)
387; CHECK-P8-NEXT:    mtlr r0
388; CHECK-P8-NEXT:    blr
389entry:
390  %sa.coerce.fca.0.extract = extractvalue [4 x i128] %sa.coerce, 0
391  %sa.sroa.0.0.extract.trunc = trunc i128 %sa.coerce.fca.0.extract to i32
392  %sa.coerce.fca.1.extract = extractvalue [4 x i128] %sa.coerce, 1
393  %sa.coerce.fca.3.extract = extractvalue [4 x i128] %sa.coerce, 3
394  %sa.sroa.6.48.extract.shift = lshr i128 %sa.coerce.fca.3.extract, 64
395  %sa.sroa.6.48.extract.trunc = trunc i128 %sa.sroa.6.48.extract.shift to i64
396  %conv = sitofp i32 %sa.sroa.0.0.extract.trunc to fp128
397  %0 = bitcast i128 %sa.coerce.fca.1.extract to fp128
398  %add = fadd fp128 %0, %conv
399  %conv2 = sitofp i64 %sa.sroa.6.48.extract.trunc to fp128
400  %add3 = fadd fp128 %add, %conv2
401  ret fp128 %add3
402}
403
404
405; Function Attrs: norecurse nounwind readonly
406define fp128 @testNestedAggregate(%struct.MixedC* byval(%struct.MixedC) nocapture readonly align 16 %a) {
407; CHECK-LABEL: testNestedAggregate:
408; CHECK:       # %bb.0: # %entry
409; CHECK-NEXT:    std r8, 72(r1)
410; CHECK-NEXT:    std r7, 64(r1)
411; CHECK-NEXT:    lxv v2, 64(r1)
412; CHECK-NEXT:    std r3, 32(r1)
413; CHECK-NEXT:    std r4, 40(r1)
414; CHECK-NEXT:    std r5, 48(r1)
415; CHECK-NEXT:    std r6, 56(r1)
416; CHECK-NEXT:    std r9, 80(r1)
417; CHECK-NEXT:    std r10, 88(r1)
418; CHECK-NEXT:    blr
419;
420; CHECK-BE-LABEL: testNestedAggregate:
421; CHECK-BE:       # %bb.0: # %entry
422; CHECK-BE-NEXT:    std r8, 88(r1)
423; CHECK-BE-NEXT:    std r7, 80(r1)
424; CHECK-BE-NEXT:    lxv v2, 80(r1)
425; CHECK-BE-NEXT:    std r3, 48(r1)
426; CHECK-BE-NEXT:    std r4, 56(r1)
427; CHECK-BE-NEXT:    std r5, 64(r1)
428; CHECK-BE-NEXT:    std r6, 72(r1)
429; CHECK-BE-NEXT:    std r9, 96(r1)
430; CHECK-BE-NEXT:    std r10, 104(r1)
431; CHECK-BE-NEXT:    blr
432;
433; CHECK-P8-LABEL: testNestedAggregate:
434; CHECK-P8:       # %bb.0: # %entry
435; CHECK-P8-NEXT:    li r11, 32
436; CHECK-P8-NEXT:    std r8, 72(r1)
437; CHECK-P8-NEXT:    std r7, 64(r1)
438; CHECK-P8-NEXT:    std r9, 80(r1)
439; CHECK-P8-NEXT:    std r10, 88(r1)
440; CHECK-P8-NEXT:    addi r7, r1, 32
441; CHECK-P8-NEXT:    lvx v2, r7, r11
442; CHECK-P8-NEXT:    std r3, 32(r1)
443; CHECK-P8-NEXT:    std r4, 40(r1)
444; CHECK-P8-NEXT:    std r5, 48(r1)
445; CHECK-P8-NEXT:    std r6, 56(r1)
446; CHECK-P8-NEXT:    blr
447
448entry:
449  %c = getelementptr inbounds %struct.MixedC, %struct.MixedC* %a, i64 0, i32 1, i32 1
450  %0 = load fp128, fp128* %c, align 16
451  ret fp128 %0
452}
453
454; Function Attrs: norecurse nounwind readnone
455define fp128 @testUnion_01([1 x i128] %a.coerce) {
456; CHECK-LABEL: testUnion_01:
457; CHECK:       # %bb.0: # %entry
458; CHECK-NEXT:    mtvsrdd v2, r4, r3
459; CHECK-NEXT:    blr
460;
461; CHECK-BE-LABEL: testUnion_01:
462; CHECK-BE:       # %bb.0: # %entry
463; CHECK-BE-NEXT:    mtvsrdd v2, r4, r3
464; CHECK-BE-NEXT:    blr
465;
466; CHECK-P8-LABEL: testUnion_01:
467; CHECK-P8:       # %bb.0: # %entry
468; CHECK-P8-NEXT:    addi r5, r1, -16
469; CHECK-P8-NEXT:    std r4, -8(r1)
470; CHECK-P8-NEXT:    std r3, -16(r1)
471; CHECK-P8-NEXT:    lvx v2, 0, r5
472; CHECK-P8-NEXT:    blr
473
474entry:
475  %a.coerce.fca.0.extract = extractvalue [1 x i128] %a.coerce, 0
476  %0 = bitcast i128 %a.coerce.fca.0.extract to fp128
477  ret fp128 %0
478}
479
480; Function Attrs: norecurse nounwind readnone
481define fp128 @testUnion_02([1 x i128] %a.coerce) {
482; CHECK-LABEL: testUnion_02:
483; CHECK:       # %bb.0: # %entry
484; CHECK-NEXT:    mtvsrdd v2, r4, r3
485; CHECK-NEXT:    blr
486;
487; CHECK-BE-LABEL: testUnion_02:
488; CHECK-BE:       # %bb.0: # %entry
489; CHECK-BE-NEXT:    mtvsrdd v2, r4, r3
490; CHECK-BE-NEXT:    blr
491;
492; CHECK-P8-LABEL: testUnion_02:
493; CHECK-P8:       # %bb.0: # %entry
494; CHECK-P8-NEXT:    addi r5, r1, -16
495; CHECK-P8-NEXT:    std r4, -8(r1)
496; CHECK-P8-NEXT:    std r3, -16(r1)
497; CHECK-P8-NEXT:    lvx v2, 0, r5
498; CHECK-P8-NEXT:    blr
499
500entry:
501  %a.coerce.fca.0.extract = extractvalue [1 x i128] %a.coerce, 0
502  %0 = bitcast i128 %a.coerce.fca.0.extract to fp128
503  ret fp128 %0
504}
505
506; Function Attrs: norecurse nounwind readnone
507define fp128 @testUnion_03([4 x i128] %a.coerce) {
508; CHECK-LABEL: testUnion_03:
509; CHECK:       # %bb.0: # %entry
510; CHECK-NEXT:    mtvsrdd v2, r8, r7
511; CHECK-NEXT:    blr
512;
513; CHECK-BE-LABEL: testUnion_03:
514; CHECK-BE:       # %bb.0: # %entry
515; CHECK-BE-NEXT:    mtvsrdd v2, r8, r7
516; CHECK-BE-NEXT:    blr
517;
518; CHECK-P8-LABEL: testUnion_03:
519; CHECK-P8:       # %bb.0: # %entry
520; CHECK-P8-NEXT:    addi r3, r1, -16
521; CHECK-P8-NEXT:    std r8, -8(r1)
522; CHECK-P8-NEXT:    std r7, -16(r1)
523; CHECK-P8-NEXT:    lvx v2, 0, r3
524; CHECK-P8-NEXT:    blr
525
526entry:
527  %a.coerce.fca.2.extract = extractvalue [4 x i128] %a.coerce, 2
528  %0 = bitcast i128 %a.coerce.fca.2.extract to fp128
529  ret fp128 %0
530}
531
532; Function Attrs: nounwind
533define fp128 @sum_float128(i32 signext %count, ...) {
534; CHECK-LABEL: sum_float128:
535; CHECK:       # %bb.0: # %entry
536; CHECK-NEXT:    std r4, 40(r1)
537; CHECK-NEXT:    addis r4, r2, .LCPI17_0@toc@ha
538; CHECK-NEXT:    cmpwi r3, 1
539; CHECK-NEXT:    std r5, 48(r1)
540; CHECK-NEXT:    addi r4, r4, .LCPI17_0@toc@l
541; CHECK-NEXT:    std r6, 56(r1)
542; CHECK-NEXT:    std r7, 64(r1)
543; CHECK-NEXT:    std r8, 72(r1)
544; CHECK-NEXT:    lxvx v2, 0, r4
545; CHECK-NEXT:    std r9, 80(r1)
546; CHECK-NEXT:    std r10, 88(r1)
547; CHECK-NEXT:    bltlr cr0
548; CHECK-NEXT:  # %bb.1: # %if.end
549; CHECK-NEXT:    addi r3, r1, 40
550; CHECK-NEXT:    addi r4, r1, 72
551; CHECK-NEXT:    lxvx v3, 0, r3
552; CHECK-NEXT:    std r4, -8(r1)
553; CHECK-NEXT:    xsaddqp v2, v3, v2
554; CHECK-NEXT:    lxv v3, 16(r3)
555; CHECK-NEXT:    xsaddqp v2, v2, v3
556; CHECK-NEXT:    blr
557;
558; CHECK-BE-LABEL: sum_float128:
559; CHECK-BE:       # %bb.0: # %entry
560; CHECK-BE-NEXT:    std r4, 56(r1)
561; CHECK-BE-NEXT:    addis r4, r2, .LCPI17_0@toc@ha
562; CHECK-BE-NEXT:    cmpwi r3, 1
563; CHECK-BE-NEXT:    std r5, 64(r1)
564; CHECK-BE-NEXT:    addi r4, r4, .LCPI17_0@toc@l
565; CHECK-BE-NEXT:    std r6, 72(r1)
566; CHECK-BE-NEXT:    std r7, 80(r1)
567; CHECK-BE-NEXT:    std r8, 88(r1)
568; CHECK-BE-NEXT:    lxvx v2, 0, r4
569; CHECK-BE-NEXT:    std r9, 96(r1)
570; CHECK-BE-NEXT:    std r10, 104(r1)
571; CHECK-BE-NEXT:    bltlr cr0
572; CHECK-BE-NEXT:  # %bb.1: # %if.end
573; CHECK-BE-NEXT:    addi r3, r1, 56
574; CHECK-BE-NEXT:    addi r4, r1, 88
575; CHECK-BE-NEXT:    lxvx v3, 0, r3
576; CHECK-BE-NEXT:    std r4, -8(r1)
577; CHECK-BE-NEXT:    xsaddqp v2, v3, v2
578; CHECK-BE-NEXT:    lxv v3, 16(r3)
579; CHECK-BE-NEXT:    xsaddqp v2, v2, v3
580; CHECK-BE-NEXT:    blr
581;
582; CHECK-P8-LABEL: sum_float128:
583; CHECK-P8:       # %bb.0: # %entry
584; CHECK-P8-NEXT:    mflr r0
585; CHECK-P8-NEXT:    .cfi_def_cfa_offset 64
586; CHECK-P8-NEXT:    .cfi_offset lr, 16
587; CHECK-P8-NEXT:    .cfi_offset r30, -16
588; CHECK-P8-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
589; CHECK-P8-NEXT:    std r0, 16(r1)
590; CHECK-P8-NEXT:    stdu r1, -64(r1)
591; CHECK-P8-NEXT:    addis r11, r2, .LCPI17_0@toc@ha
592; CHECK-P8-NEXT:    cmpwi r3, 1
593; CHECK-P8-NEXT:    std r4, 104(r1)
594; CHECK-P8-NEXT:    std r5, 112(r1)
595; CHECK-P8-NEXT:    std r6, 120(r1)
596; CHECK-P8-NEXT:    std r7, 128(r1)
597; CHECK-P8-NEXT:    addi r3, r11, .LCPI17_0@toc@l
598; CHECK-P8-NEXT:    std r8, 136(r1)
599; CHECK-P8-NEXT:    std r9, 144(r1)
600; CHECK-P8-NEXT:    std r10, 152(r1)
601; CHECK-P8-NEXT:    blt cr0, .LBB17_2
602; CHECK-P8-NEXT:  # %bb.1: # %if.end
603; CHECK-P8-NEXT:    addi r30, r1, 104
604; CHECK-P8-NEXT:    lvx v3, 0, r3
605; CHECK-P8-NEXT:    lxvd2x vs0, 0, r30
606; CHECK-P8-NEXT:    xxswapd v2, vs0
607; CHECK-P8-NEXT:    bl __addkf3
608; CHECK-P8-NEXT:    nop
609; CHECK-P8-NEXT:    li r3, 16
610; CHECK-P8-NEXT:    lxvd2x vs0, r30, r3
611; CHECK-P8-NEXT:    addi r3, r1, 136
612; CHECK-P8-NEXT:    std r3, 40(r1)
613; CHECK-P8-NEXT:    xxswapd v3, vs0
614; CHECK-P8-NEXT:    bl __addkf3
615; CHECK-P8-NEXT:    nop
616; CHECK-P8-NEXT:    b .LBB17_3
617; CHECK-P8-NEXT:  .LBB17_2:
618; CHECK-P8-NEXT:    lvx v2, 0, r3
619; CHECK-P8-NEXT:  .LBB17_3: # %cleanup
620; CHECK-P8-NEXT:    addi r1, r1, 64
621; CHECK-P8-NEXT:    ld r0, 16(r1)
622; CHECK-P8-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
623; CHECK-P8-NEXT:    mtlr r0
624; CHECK-P8-NEXT:    blr
625entry:
626  %ap = alloca i8*, align 8
627  %0 = bitcast i8** %ap to i8*
628  call void @llvm.lifetime.start.p0i8(i64 8, i8* nonnull %0) #2
629  %cmp = icmp slt i32 %count, 1
630  br i1 %cmp, label %cleanup, label %if.end
631
632if.end:                                           ; preds = %entry
633  call void @llvm.va_start(i8* nonnull %0)
634  %argp.cur = load i8*, i8** %ap, align 8
635  %argp.next = getelementptr inbounds i8, i8* %argp.cur, i64 16
636  %1 = bitcast i8* %argp.cur to fp128*
637  %2 = load fp128, fp128* %1, align 8
638  %add = fadd fp128 %2, 0xL00000000000000000000000000000000
639  %argp.next3 = getelementptr inbounds i8, i8* %argp.cur, i64 32
640  store i8* %argp.next3, i8** %ap, align 8
641  %3 = bitcast i8* %argp.next to fp128*
642  %4 = load fp128, fp128* %3, align 8
643  %add4 = fadd fp128 %add, %4
644  call void @llvm.va_end(i8* nonnull %0)
645  br label %cleanup
646
647cleanup:                                          ; preds = %entry, %if.end
648  %retval.0 = phi fp128 [ %add4, %if.end ], [ 0xL00000000000000000000000000000000, %entry ]
649  call void @llvm.lifetime.end.p0i8(i64 8, i8* nonnull %0) #2
650  ret fp128 %retval.0
651}
652
653declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #1
654declare void @llvm.va_start(i8*) #2
655declare void @llvm.va_end(i8*) #2
656declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #1
657