1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=powerpc64le-- -verify-machineinstrs | FileCheck %s
3; RUN: llc < %s -mtriple=powerpc64-ibm-aix-xcoff -verify-machineinstrs | FileCheck %s
4
5define i32 @sub_zext_cmp_mask_same_size_result(i32 %x) {
6; CHECK-LABEL: sub_zext_cmp_mask_same_size_result:
7; CHECK:       # %bb.0:
8; CHECK-NEXT:    clrldi 3, 3, 63
9; CHECK-NEXT:    ori 3, 3, 65508
10; CHECK-NEXT:    oris 3, 3, 65535
11; CHECK-NEXT:    blr
12  %a = and i32 %x, 1
13  %c = icmp eq i32 %a, 0
14  %z = zext i1 %c to i32
15  %r = sub i32 -27, %z
16  ret i32 %r
17}
18
19define i32 @sub_zext_cmp_mask_wider_result(i8 %x) {
20; CHECK-LABEL: sub_zext_cmp_mask_wider_result:
21; CHECK:       # %bb.0:
22; CHECK-NEXT:    clrldi 3, 3, 63
23; CHECK-NEXT:    ori 3, 3, 26
24; CHECK-NEXT:    blr
25  %a = and i8 %x, 1
26  %c = icmp eq i8 %a, 0
27  %z = zext i1 %c to i32
28  %r = sub i32 27, %z
29  ret i32 %r
30}
31
32define i8 @sub_zext_cmp_mask_narrower_result(i32 %x) {
33; CHECK-LABEL: sub_zext_cmp_mask_narrower_result:
34; CHECK:       # %bb.0:
35; CHECK-NEXT:    clrldi 3, 3, 63
36; CHECK-NEXT:    ori 3, 3, 46
37; CHECK-NEXT:    blr
38  %a = and i32 %x, 1
39  %c = icmp eq i32 %a, 0
40  %z = zext i1 %c to i8
41  %r = sub i8 47, %z
42  ret i8 %r
43}
44
45define i8 @add_zext_cmp_mask_same_size_result(i8 %x) {
46; CHECK-LABEL: add_zext_cmp_mask_same_size_result:
47; CHECK:       # %bb.0:
48; CHECK-NEXT:    clrlwi 3, 3, 31
49; CHECK-NEXT:    subfic 3, 3, 27
50; CHECK-NEXT:    blr
51  %a = and i8 %x, 1
52  %c = icmp eq i8 %a, 0
53  %z = zext i1 %c to i8
54  %r = add i8 %z, 26
55  ret i8 %r
56}
57
58define i32 @add_zext_cmp_mask_wider_result(i8 %x) {
59; CHECK-LABEL: add_zext_cmp_mask_wider_result:
60; CHECK:       # %bb.0:
61; CHECK-NEXT:    clrlwi 3, 3, 31
62; CHECK-NEXT:    subfic 3, 3, 27
63; CHECK-NEXT:    blr
64  %a = and i8 %x, 1
65  %c = icmp eq i8 %a, 0
66  %z = zext i1 %c to i32
67  %r = add i32 %z, 26
68  ret i32 %r
69}
70
71define i8 @add_zext_cmp_mask_narrower_result(i32 %x) {
72; CHECK-LABEL: add_zext_cmp_mask_narrower_result:
73; CHECK:       # %bb.0:
74; CHECK-NEXT:    clrlwi 3, 3, 31
75; CHECK-NEXT:    subfic 3, 3, 43
76; CHECK-NEXT:    blr
77  %a = and i32 %x, 1
78  %c = icmp eq i32 %a, 0
79  %z = zext i1 %c to i8
80  %r = add i8 %z, 42
81  ret i8 %r
82}
83
84define i32 @low_bit_select_constants_bigger_false_same_size_result(i32 %x) {
85; CHECK-LABEL: low_bit_select_constants_bigger_false_same_size_result:
86; CHECK:       # %bb.0:
87; CHECK-NEXT:    clrldi 3, 3, 63
88; CHECK-NEXT:    ori 3, 3, 42
89; CHECK-NEXT:    blr
90  %a = and i32 %x, 1
91  %c = icmp eq i32 %a, 0
92  %r = select i1 %c, i32 42, i32 43
93  ret i32 %r
94}
95
96define i64 @low_bit_select_constants_bigger_false_wider_result(i32 %x) {
97; CHECK-LABEL: low_bit_select_constants_bigger_false_wider_result:
98; CHECK:       # %bb.0:
99; CHECK-NEXT:    clrldi 3, 3, 63
100; CHECK-NEXT:    ori 3, 3, 26
101; CHECK-NEXT:    blr
102  %a = and i32 %x, 1
103  %c = icmp eq i32 %a, 0
104  %r = select i1 %c, i64 26, i64 27
105  ret i64 %r
106}
107
108define i16 @low_bit_select_constants_bigger_false_narrower_result(i32 %x) {
109; CHECK-LABEL: low_bit_select_constants_bigger_false_narrower_result:
110; CHECK:       # %bb.0:
111; CHECK-NEXT:    clrldi 3, 3, 63
112; CHECK-NEXT:    ori 3, 3, 36
113; CHECK-NEXT:    blr
114  %a = and i32 %x, 1
115  %c = icmp eq i32 %a, 0
116  %r = select i1 %c, i16 36, i16 37
117  ret i16 %r
118}
119
120define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) {
121; CHECK-LABEL: low_bit_select_constants_bigger_true_same_size_result:
122; CHECK:       # %bb.0:
123; CHECK-NEXT:    clrldi 3, 3, 63
124; CHECK-NEXT:    subfic 3, 3, -29
125; CHECK-NEXT:    blr
126  %a = and i8 %x, 1
127  %c = icmp eq i8 %a, 0
128  %r = select i1 %c, i8 227, i8 226
129  ret i8 %r
130}
131
132define i32 @low_bit_select_constants_bigger_true_wider_result(i8 %x) {
133; CHECK-LABEL: low_bit_select_constants_bigger_true_wider_result:
134; CHECK:       # %bb.0:
135; CHECK-NEXT:    clrldi 3, 3, 63
136; CHECK-NEXT:    subfic 3, 3, 227
137; CHECK-NEXT:    blr
138  %a = and i8 %x, 1
139  %c = icmp eq i8 %a, 0
140  %r = select i1 %c, i32 227, i32 226
141  ret i32 %r
142}
143
144define i8 @low_bit_select_constants_bigger_true_narrower_result(i16 %x) {
145; CHECK-LABEL: low_bit_select_constants_bigger_true_narrower_result:
146; CHECK:       # %bb.0:
147; CHECK-NEXT:    clrldi 3, 3, 63
148; CHECK-NEXT:    subfic 3, 3, 41
149; CHECK-NEXT:    blr
150  %a = and i16 %x, 1
151  %c = icmp eq i16 %a, 0
152  %r = select i1 %c, i8 41, i8 40
153  ret i8 %r
154}
155
156