1*484a36b9SSean Fertile; RUN: llc -mcpu=pwr7 -mattr=-altivec -verify-machineinstrs \
2*484a36b9SSean Fertile; RUN:   -mtriple=powerpc-unknown-aix < %s  | FileCheck %s --check-prefix 32BIT
3*484a36b9SSean Fertile
4*484a36b9SSean Fertile; RUN: llc -mcpu=pwr7 -mattr=-altivec -verify-machineinstrs \
5*484a36b9SSean Fertile; RUN:   -mtriple=powerpc64-unknown-aix < %s | FileCheck %s --check-prefix 64BIT
6*484a36b9SSean Fertile
7*484a36b9SSean Fertile; Use an overaligned buffer to force base-pointer usage. Test verifies:
8*484a36b9SSean Fertile; - base pointer register (r30) is saved/defined/restored.
9*484a36b9SSean Fertile; - stack frame is allocated with correct alignment.
10*484a36b9SSean Fertile; - Address of %AlignedBuffer is calculated based off offset from the stack
11*484a36b9SSean Fertile;   pointer.
12*484a36b9SSean Fertile
13*484a36b9SSean Fertiledefine void @caller() {
14*484a36b9SSean Fertile  %AlignedBuffer = alloca [32 x i32], align 32
15*484a36b9SSean Fertile  %Pointer = getelementptr inbounds [32 x i32], [32 x i32]* %AlignedBuffer, i64 0, i64 0
16*484a36b9SSean Fertile  call void @callee(i32* %Pointer)
17*484a36b9SSean Fertile  ret void
18*484a36b9SSean Fertile}
19*484a36b9SSean Fertile
20*484a36b9SSean Fertiledeclare void @callee(i32*)
21*484a36b9SSean Fertile
22*484a36b9SSean Fertile; 32BIT-LABEL: .caller:
23*484a36b9SSean Fertile; 32BIT:         stw 30, -8(1)
24*484a36b9SSean Fertile; 32BIT:         mr 30, 1
25*484a36b9SSean Fertile; 32BIT:         clrlwi  0, 1, 27
26*484a36b9SSean Fertile; 32BIT:         subfic 0, 0, -224
27*484a36b9SSean Fertile; 32BIT:         stwux 1, 1, 0
28*484a36b9SSean Fertile; 32BIT:         addi 3, 1, 64
29*484a36b9SSean Fertile; 32BIT:         bl .callee
30*484a36b9SSean Fertile; 32BIT:         lwz 1, 0(1)
31*484a36b9SSean Fertile; 32BIT:         lwz 30, -8(1)
32*484a36b9SSean Fertile
33*484a36b9SSean Fertile; 64BIT-LABEL: .caller:
34*484a36b9SSean Fertile; 64BIT:         std 30, -16(1)
35*484a36b9SSean Fertile; 64BIT:         mr 30, 1
36*484a36b9SSean Fertile; 64BIT:         clrldi  0, 1, 59
37*484a36b9SSean Fertile; 64BIT:         subfic 0, 0, -288
38*484a36b9SSean Fertile; 64BIT:         stdux 1, 1, 0
39*484a36b9SSean Fertile; 64BIT:         addi 3, 1, 128
40*484a36b9SSean Fertile; 64BIT:         bl .callee
41*484a36b9SSean Fertile; 64BIT:         ld 1, 0(1)
42*484a36b9SSean Fertile; 64BIT:         ld 30, -16(1)
43