1; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=PTX32
2; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX64
3; RUN: %if ptxas %{ llc < %s -march=nvptx -mcpu=sm_20 | %ptxas-verify %}
4; RUN: %if ptxas %{ llc < %s -march=nvptx64 -mcpu=sm_20 | %ptxas-verify %}
5
6
7;; i8
8define i8 @ld_global_i8(i8 addrspace(0)* %ptr) {
9; PTX32: ld.u8 %r{{[0-9]+}}, [%r{{[0-9]+}}]
10; PTX32: ret
11; PTX64: ld.u8 %r{{[0-9]+}}, [%rd{{[0-9]+}}]
12; PTX64: ret
13  %a = load i8, i8 addrspace(0)* %ptr
14  ret i8 %a
15}
16
17;; i16
18define i16 @ld_global_i16(i16 addrspace(0)* %ptr) {
19; PTX32: ld.u16 %r{{[0-9]+}}, [%r{{[0-9]+}}]
20; PTX32: ret
21; PTX64: ld.u16 %r{{[0-9]+}}, [%rd{{[0-9]+}}]
22; PTX64: ret
23  %a = load i16, i16 addrspace(0)* %ptr
24  ret i16 %a
25}
26
27;; i32
28define i32 @ld_global_i32(i32 addrspace(0)* %ptr) {
29; PTX32: ld.u32 %r{{[0-9]+}}, [%r{{[0-9]+}}]
30; PTX32: ret
31; PTX64: ld.u32 %r{{[0-9]+}}, [%rd{{[0-9]+}}]
32; PTX64: ret
33  %a = load i32, i32 addrspace(0)* %ptr
34  ret i32 %a
35}
36
37;; i64
38define i64 @ld_global_i64(i64 addrspace(0)* %ptr) {
39; PTX32: ld.u64 %rd{{[0-9]+}}, [%r{{[0-9]+}}]
40; PTX32: ret
41; PTX64: ld.u64 %rd{{[0-9]+}}, [%rd{{[0-9]+}}]
42; PTX64: ret
43  %a = load i64, i64 addrspace(0)* %ptr
44  ret i64 %a
45}
46
47;; f32
48define float @ld_global_f32(float addrspace(0)* %ptr) {
49; PTX32: ld.f32 %f{{[0-9]+}}, [%r{{[0-9]+}}]
50; PTX32: ret
51; PTX64: ld.f32 %f{{[0-9]+}}, [%rd{{[0-9]+}}]
52; PTX64: ret
53  %a = load float, float addrspace(0)* %ptr
54  ret float %a
55}
56
57;; f64
58define double @ld_global_f64(double addrspace(0)* %ptr) {
59; PTX32: ld.f64 %fd{{[0-9]+}}, [%r{{[0-9]+}}]
60; PTX32: ret
61; PTX64: ld.f64 %fd{{[0-9]+}}, [%rd{{[0-9]+}}]
62; PTX64: ret
63  %a = load double, double addrspace(0)* %ptr
64  ret double %a
65}
66