1; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \
2; RUN:   -relocation-model=pic -O3 < %s | FileCheck %s
3; For microMIPS64, also check 32 to 64 bit registers and 64 to 32 bit register copies
4; RUN: llc -march=mips -mcpu=mips64r6 -mattr=+micromips \
5; RUN:   -relocation-model=pic -O3 < %s | FileCheck %s
6
7@x = global i32 65504, align 4
8@y = global i32 60929, align 4
9@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1
10
11define i32 @main() nounwind {
12entry:
13  %0 = load i32, i32* @x, align 4
14  %and1 = and i32 %0, 4
15  %call1 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds
16                                  ([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i32 %and1)
17
18  %1 = load i32, i32* @y, align 4
19  %and2 = and i32 %1, 5
20  %call2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds
21                                  ([7 x i8], [7 x i8]* @.str, i32 0, i32 0), i32 %and2)
22  ret i32 0
23}
24
25declare i32 @printf(i8*, ...)
26
27; CHECK: andi16 ${{[2-7]|16|17}}, ${{[2-7]|16|17}}
28; CHECK: andi   ${{[0-9]+}}, ${{[0-9]+}}
29