1; RUN: llc < %s | FileCheck %s
2
3target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16-a0:16:16"
4target triple = "msp430---elf"
5
6define void @test() #0 {
7entry:
8; CHECK: test:
9
10; CHECK: mov.w #1, r12
11; CHECK: call #f_i16
12  call void @f_i16(i16 1)
13
14; CHECK: mov.w #772, r12
15; CHECK: mov.w #258, r13
16; CHECK: call #f_i32
17  call void @f_i32(i32 16909060)
18
19; CHECK: mov.w #1800, r12
20; CHECK: mov.w #1286, r13
21; CHECK: mov.w #772, r14
22; CHECK: mov.w #258, r15
23; CHECK: call #f_i64
24  call void @f_i64(i64 72623859790382856)
25
26; CHECK: mov.w #772, r12
27; CHECK: mov.w #258, r13
28; CHECK: mov.w #1800, r14
29; CHECK: mov.w #1286, r15
30; CHECK: call #f_i32_i32
31  call void @f_i32_i32(i32 16909060, i32 84281096)
32
33; CHECK: mov.w #1, r12
34; CHECK: mov.w #772, r13
35; CHECK: mov.w #258, r14
36; CHECK: mov.w #2, r15
37; CHECK: call #f_i16_i32_i16
38  call void @f_i16_i32_i16(i16 1, i32 16909060, i16 2)
39
40; CHECK: mov.w #1286, 0(r1)
41; CHECK: mov.w #1, r12
42; CHECK: mov.w #772, r13
43; CHECK: mov.w #258, r14
44; CHECK: mov.w #1800, r15
45; CHECK: call #f_i16_i32_i32
46  call void @f_i16_i32_i32(i16 1, i32 16909060, i32 84281096)
47
48; CHECK: mov.w #258, 6(r1)
49; CHECK: mov.w #772, 4(r1)
50; CHECK: mov.w #1286, 2(r1)
51; CHECK: mov.w #1800, 0(r1)
52; CHECK: mov.w #1, r12
53; CHECK: mov.w #2, r13
54; CHECK: call #f_i16_i64_i16
55  call void @f_i16_i64_i16(i16 1, i64 72623859790382856, i16 2)
56
57  ret void
58}
59
60@g_i16 = common global i16 0, align 2
61@g_i32 = common global i32 0, align 2
62@g_i64 = common global i64 0, align 2
63
64define void @f_i16(i16 %a) #0 {
65; CHECK: f_i16:
66; CHECK: mov.w r12, &g_i16
67  store volatile i16 %a, i16* @g_i16, align 2
68  ret void
69}
70
71define void @f_i32(i32 %a) #0 {
72; CHECK: f_i32:
73; CHECK: mov.w r13, &g_i32+2
74; CHECK: mov.w r12, &g_i32
75  store volatile i32 %a, i32* @g_i32, align 2
76  ret void
77}
78
79define void @f_i64(i64 %a) #0 {
80; CHECK: f_i64:
81; CHECK: mov.w r15, &g_i64+6
82; CHECK: mov.w r14, &g_i64+4
83; CHECK: mov.w r13, &g_i64+2
84; CHECK: mov.w r12, &g_i64
85  store volatile i64 %a, i64* @g_i64, align 2
86  ret void
87}
88
89define void @f_i32_i32(i32 %a, i32 %b) #0 {
90; CHECK: f_i32_i32:
91; CHECK: mov.w r13, &g_i32+2
92; CHECK: mov.w r12, &g_i32
93  store volatile i32 %a, i32* @g_i32, align 2
94; CHECK: mov.w r15, &g_i32+2
95; CHECK: mov.w r14, &g_i32
96  store volatile i32 %b, i32* @g_i32, align 2
97  ret void
98}
99
100define void @f_i16_i32_i32(i16 %a, i32 %b, i32 %c) #0 {
101; CHECK: f_i16_i32_i32:
102; CHECK: mov.w r12, &g_i16
103  store volatile i16 %a, i16* @g_i16, align 2
104; CHECK: mov.w r14, &g_i32+2
105; CHECK: mov.w r13, &g_i32
106  store volatile i32 %b, i32* @g_i32, align 2
107; CHECK: mov.w r15, &g_i32
108; CHECK: mov.w 4(r4), &g_i32+2
109  store volatile i32 %c, i32* @g_i32, align 2
110  ret void
111}
112
113define void @f_i16_i32_i16(i16 %a, i32 %b, i16 %c) #0 {
114; CHECK: f_i16_i32_i16:
115; CHECK: mov.w r12, &g_i16
116  store volatile i16 %a, i16* @g_i16, align 2
117; CHECK: mov.w r14, &g_i32+2
118; CHECK: mov.w r13, &g_i32
119  store volatile i32 %b, i32* @g_i32, align 2
120; CHECK: mov.w r15, &g_i16
121  store volatile i16 %c, i16* @g_i16, align 2
122  ret void
123}
124
125define void @f_i16_i64_i16(i16 %a, i64 %b, i16 %c) #0 {
126; CHECK: f_i16_i64_i16:
127; CHECK: mov.w r12, &g_i16
128  store volatile i16 %a, i16* @g_i16, align 2
129;CHECK: mov.w 10(r4), &g_i64+6
130;CHECK: mov.w 8(r4), &g_i64+4
131;CHECK: mov.w 6(r4), &g_i64+2
132;CHECK: mov.w 4(r4), &g_i64
133  store volatile i64 %b, i64* @g_i64, align 2
134;CHECK: mov.w r13, &g_i16
135  store volatile i16 %c, i16* @g_i16, align 2
136  ret void
137}
138
139attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" }
140