1; RUN: llc -mcpu=hexagonv5 < %s
2; REQUIRES: asserts
3
4target datalayout = "e-m:e-p:32:32-i1:32-i64:64-a:0-v32:32-n16:32"
5target triple = "hexagon-unknown--elf"
6
7; Function Attrs: nounwind readnone
8define i64 @foo() #0 {
9entry:
10  %0 = tail call i32 @llvm.hexagon.S2.clbp(i64 291)
11  %1 = tail call i64 @llvm.hexagon.A4.combineir(i32 0, i32 %0)
12  ret i64 %1
13}
14
15; Function Attrs: nounwind readnone
16declare i32 @llvm.hexagon.S2.clbp(i64) #1
17
18; Function Attrs: nounwind readnone
19declare i64 @llvm.hexagon.A4.combineir(i32, i32) #1
20
21attributes #0 = { nounwind readnone "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
22attributes #1 = { nounwind readnone }
23
24