1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky -mattr=+2e3 | FileCheck %s 3 4;EQ 5define i32 @brRR_eq(i32 %x, i32 %y) { 6; CHECK-LABEL: brRR_eq: 7; CHECK: # %bb.0: # %entry 8; CHECK-NEXT: cmpne16 a1, a0 9; CHECK-NEXT: bt32 .LBB0_2 10; CHECK-NEXT: # %bb.1: # %label1 11; CHECK-NEXT: movi16 a0, 1 12; CHECK-NEXT: rts16 13; CHECK-NEXT: .LBB0_2: # %label2 14; CHECK-NEXT: movi16 a0, 0 15; CHECK-NEXT: rts16 16entry: 17 %icmp = icmp eq i32 %y, %x 18 br i1 %icmp, label %label1, label %label2 19label1: 20 ret i32 1 21label2: 22 ret i32 0 23} 24 25define i32 @brRI_eq(i32 %x) { 26; CHECK-LABEL: brRI_eq: 27; CHECK: # %bb.0: # %entry 28; CHECK-NEXT: cmpnei16 a0, 10 29; CHECK-NEXT: bt32 .LBB1_2 30; CHECK-NEXT: # %bb.1: # %label1 31; CHECK-NEXT: movi16 a0, 1 32; CHECK-NEXT: rts16 33; CHECK-NEXT: .LBB1_2: # %label2 34; CHECK-NEXT: movi16 a0, 0 35; CHECK-NEXT: rts16 36entry: 37 %icmp = icmp eq i32 %x, 10 38 br i1 %icmp, label %label1, label %label2 39label1: 40 ret i32 1 41label2: 42 ret i32 0 43} 44 45define i32 @brR0_eq(i32 %x) { 46; CHECK-LABEL: brR0_eq: 47; CHECK: # %bb.0: # %entry 48; CHECK-NEXT: bez32 a0, .LBB2_2 49; CHECK-NEXT: # %bb.1: # %label2 50; CHECK-NEXT: movi16 a0, 0 51; CHECK-NEXT: rts16 52; CHECK-NEXT: .LBB2_2: # %label1 53; CHECK-NEXT: movi16 a0, 1 54; CHECK-NEXT: rts16 55entry: 56 %icmp = icmp eq i32 %x, 0 57 br i1 %icmp, label %label1, label %label2 58label1: 59 ret i32 1 60label2: 61 ret i32 0 62} 63 64;NE 65define i32 @brRR_ne(i32 %x, i32 %y) { 66; CHECK-LABEL: brRR_ne: 67; CHECK: # %bb.0: # %entry 68; CHECK-NEXT: cmpne16 a1, a0 69; CHECK-NEXT: bf32 .LBB3_2 70; CHECK-NEXT: # %bb.1: # %label1 71; CHECK-NEXT: movi16 a0, 1 72; CHECK-NEXT: rts16 73; CHECK-NEXT: .LBB3_2: # %label2 74; CHECK-NEXT: movi16 a0, 0 75; CHECK-NEXT: rts16 76entry: 77 %icmp = icmp ne i32 %y, %x 78 br i1 %icmp, label %label1, label %label2 79label1: 80 ret i32 1 81label2: 82 ret i32 0 83} 84 85define i32 @brRI_ne(i32 %x) { 86; CHECK-LABEL: brRI_ne: 87; CHECK: # %bb.0: # %entry 88; CHECK-NEXT: cmpnei16 a0, 10 89; CHECK-NEXT: bf32 .LBB4_2 90; CHECK-NEXT: # %bb.1: # %label1 91; CHECK-NEXT: movi16 a0, 1 92; CHECK-NEXT: rts16 93; CHECK-NEXT: .LBB4_2: # %label2 94; CHECK-NEXT: movi16 a0, 0 95; CHECK-NEXT: rts16 96entry: 97 %icmp = icmp ne i32 %x, 10 98 br i1 %icmp, label %label1, label %label2 99label1: 100 ret i32 1 101label2: 102 ret i32 0 103} 104 105define i32 @brR0_ne(i32 %x) { 106; CHECK-LABEL: brR0_ne: 107; CHECK: # %bb.0: # %entry 108; CHECK-NEXT: bez32 a0, .LBB5_2 109; CHECK-NEXT: # %bb.1: # %label1 110; CHECK-NEXT: movi16 a0, 1 111; CHECK-NEXT: rts16 112; CHECK-NEXT: .LBB5_2: # %label2 113; CHECK-NEXT: movi16 a0, 0 114; CHECK-NEXT: rts16 115entry: 116 %icmp = icmp ne i32 %x, 0 117 br i1 %icmp, label %label1, label %label2 118label1: 119 ret i32 1 120label2: 121 ret i32 0 122} 123 124;UGT 125define i32 @brRR_ugt(i32 %x, i32 %y) { 126; CHECK-LABEL: brRR_ugt: 127; CHECK: # %bb.0: # %entry 128; CHECK-NEXT: cmphs16 a0, a1 129; CHECK-NEXT: bt32 .LBB6_2 130; CHECK-NEXT: # %bb.1: # %label1 131; CHECK-NEXT: movi16 a0, 1 132; CHECK-NEXT: rts16 133; CHECK-NEXT: .LBB6_2: # %label2 134; CHECK-NEXT: movi16 a0, 0 135; CHECK-NEXT: rts16 136; CHECK-UGTXT: icmpu32 a0, a1, a0 137; CHECK-UGTXT: rts16 138entry: 139 %icmp = icmp ugt i32 %y, %x 140 br i1 %icmp, label %label1, label %label2 141label1: 142 ret i32 1 143label2: 144 ret i32 0 145} 146 147define i32 @brRI_ugt(i32 %x) { 148; CHECK-LABEL: brRI_ugt: 149; CHECK: # %bb.0: # %entry 150; CHECK-NEXT: cmphsi16 a0, 11 151; CHECK-NEXT: bf32 .LBB7_2 152; CHECK-NEXT: # %bb.1: # %label1 153; CHECK-NEXT: movi16 a0, 1 154; CHECK-NEXT: rts16 155; CHECK-NEXT: .LBB7_2: # %label2 156; CHECK-NEXT: movi16 a0, 0 157; CHECK-NEXT: rts16 158; CHECK-UGTXT: icmpu32 a0, a1, a0 159; CHECK-UGTXT: rts16 160entry: 161 %icmp = icmp ugt i32 %x, 10 162 br i1 %icmp, label %label1, label %label2 163label1: 164 ret i32 1 165label2: 166 ret i32 0 167} 168 169define i32 @brR0_ugt(i32 %x) { 170; CHECK-LABEL: brR0_ugt: 171; CHECK: # %bb.0: # %entry 172; CHECK-NEXT: bez32 a0, .LBB8_2 173; CHECK-NEXT: # %bb.1: # %label1 174; CHECK-NEXT: movi16 a0, 1 175; CHECK-NEXT: rts16 176; CHECK-NEXT: .LBB8_2: # %label2 177; CHECK-NEXT: movi16 a0, 0 178; CHECK-NEXT: rts16 179; CHECK-UGTXT: icmpu32 a0, a1, a0 180; CHECK-UGTXT: rts16 181entry: 182 %icmp = icmp ugt i32 %x, 0 183 br i1 %icmp, label %label1, label %label2 184label1: 185 ret i32 1 186label2: 187 ret i32 0 188} 189 190;UGE 191define i32 @brRR_uge(i32 %x, i32 %y) { 192; CHECK-LABEL: brRR_uge: 193; CHECK: # %bb.0: # %entry 194; CHECK-NEXT: cmphs16 a1, a0 195; CHECK-NEXT: bf32 .LBB9_2 196; CHECK-NEXT: # %bb.1: # %label1 197; CHECK-NEXT: movi16 a0, 1 198; CHECK-NEXT: rts16 199; CHECK-NEXT: .LBB9_2: # %label2 200; CHECK-NEXT: movi16 a0, 0 201; CHECK-NEXT: rts16 202; CHECK-UGTXT: icmpu32 a0, a1, a0 203; CHECK-UGTXT: rts16 204entry: 205 %icmp = icmp uge i32 %y, %x 206 br i1 %icmp, label %label1, label %label2 207label1: 208 ret i32 1 209label2: 210 ret i32 0 211} 212 213define i32 @brRI_uge(i32 %x) { 214; CHECK-LABEL: brRI_uge: 215; CHECK: # %bb.0: # %entry 216; CHECK-NEXT: cmphsi16 a0, 10 217; CHECK-NEXT: bf32 .LBB10_2 218; CHECK-NEXT: # %bb.1: # %label1 219; CHECK-NEXT: movi16 a0, 1 220; CHECK-NEXT: rts16 221; CHECK-NEXT: .LBB10_2: # %label2 222; CHECK-NEXT: movi16 a0, 0 223; CHECK-NEXT: rts16 224; CHECK-UGTXT: icmpu32 a0, a1, a0 225; CHECK-UGTXT: rts16 226entry: 227 %icmp = icmp uge i32 %x, 10 228 br i1 %icmp, label %label1, label %label2 229label1: 230 ret i32 1 231label2: 232 ret i32 0 233} 234 235;ULT 236define i32 @brRR_ult(i32 %x, i32 %y) { 237; CHECK-LABEL: brRR_ult: 238; CHECK: # %bb.0: # %entry 239; CHECK-NEXT: cmphs16 a1, a0 240; CHECK-NEXT: bt32 .LBB11_2 241; CHECK-NEXT: # %bb.1: # %label1 242; CHECK-NEXT: movi16 a0, 1 243; CHECK-NEXT: rts16 244; CHECK-NEXT: .LBB11_2: # %label2 245; CHECK-NEXT: movi16 a0, 0 246; CHECK-NEXT: rts16 247; CHECK-UGTXT: icmpu32 a0, a1, a0 248; CHECK-UGTXT: rts16 249entry: 250 %icmp = icmp ult i32 %y, %x 251 br i1 %icmp, label %label1, label %label2 252label1: 253 ret i32 1 254label2: 255 ret i32 0 256} 257 258define i32 @brRI_ult(i32 %x) { 259; CHECK-LABEL: brRI_ult: 260; CHECK: # %bb.0: # %entry 261; CHECK-NEXT: movi16 a1, 9 262; CHECK-NEXT: cmphs16 a1, a0 263; CHECK-NEXT: bf32 .LBB12_2 264; CHECK-NEXT: # %bb.1: # %label1 265; CHECK-NEXT: movi16 a0, 1 266; CHECK-NEXT: rts16 267; CHECK-NEXT: .LBB12_2: # %label2 268; CHECK-NEXT: movi16 a0, 0 269; CHECK-NEXT: rts16 270; CHECK-UGTXT: icmpu32 a0, a1, a0 271; CHECK-UGTXT: rts16 272entry: 273 %icmp = icmp ult i32 %x, 10 274 br i1 %icmp, label %label1, label %label2 275label1: 276 ret i32 1 277label2: 278 ret i32 0 279} 280 281 282;ULE 283define i32 @brRR_ule(i32 %x, i32 %y) { 284; CHECK-LABEL: brRR_ule: 285; CHECK: # %bb.0: # %entry 286; CHECK-NEXT: cmphs16 a0, a1 287; CHECK-NEXT: bf32 .LBB13_2 288; CHECK-NEXT: # %bb.1: # %label1 289; CHECK-NEXT: movi16 a0, 1 290; CHECK-NEXT: rts16 291; CHECK-NEXT: .LBB13_2: # %label2 292; CHECK-NEXT: movi16 a0, 0 293; CHECK-NEXT: rts16 294; CHECK-UGTXT: icmpu32 a0, a1, a0 295; CHECK-UGTXT: rts16 296entry: 297 %icmp = icmp ule i32 %y, %x 298 br i1 %icmp, label %label1, label %label2 299label1: 300 ret i32 1 301label2: 302 ret i32 0 303} 304 305define i32 @brRI_ule(i32 %x) { 306; CHECK-LABEL: brRI_ule: 307; CHECK: # %bb.0: # %entry 308; CHECK-NEXT: movi16 a1, 10 309; CHECK-NEXT: cmphs16 a1, a0 310; CHECK-NEXT: bf32 .LBB14_2 311; CHECK-NEXT: # %bb.1: # %label1 312; CHECK-NEXT: movi16 a0, 1 313; CHECK-NEXT: rts16 314; CHECK-NEXT: .LBB14_2: # %label2 315; CHECK-NEXT: movi16 a0, 0 316; CHECK-NEXT: rts16 317; CHECK-UGTXT: icmpu32 a0, a1, a0 318; CHECK-UGTXT: rts16 319entry: 320 %icmp = icmp ule i32 %x, 10 321 br i1 %icmp, label %label1, label %label2 322label1: 323 ret i32 1 324label2: 325 ret i32 0 326} 327 328define i32 @brR0_ule(i32 %x) { 329; CHECK-LABEL: brR0_ule: 330; CHECK: # %bb.0: # %entry 331; CHECK-NEXT: bnez32 a0, .LBB15_2 332; CHECK-NEXT: # %bb.1: # %label1 333; CHECK-NEXT: movi16 a0, 1 334; CHECK-NEXT: rts16 335; CHECK-NEXT: .LBB15_2: # %label2 336; CHECK-NEXT: movi16 a0, 0 337; CHECK-NEXT: rts16 338; CHECK-UGTXT: icmpu32 a0, a1, a0 339; CHECK-UGTXT: rts16 340entry: 341 %icmp = icmp ule i32 %x, 0 342 br i1 %icmp, label %label1, label %label2 343label1: 344 ret i32 1 345label2: 346 ret i32 0 347} 348 349;SGT 350define i32 @brRR_sgt(i32 %x, i32 %y) { 351; CHECK-LABEL: brRR_sgt: 352; CHECK: # %bb.0: # %entry 353; CHECK-NEXT: cmplt16 a0, a1 354; CHECK-NEXT: bf32 .LBB16_2 355; CHECK-NEXT: # %bb.1: # %label1 356; CHECK-NEXT: movi16 a0, 1 357; CHECK-NEXT: rts16 358; CHECK-NEXT: .LBB16_2: # %label2 359; CHECK-NEXT: movi16 a0, 0 360; CHECK-NEXT: rts16 361; CHECK-UGTXT: icmpu32 a0, a1, a0 362; CHECK-UGTXT: rts16 363entry: 364 %icmp = icmp sgt i32 %y, %x 365 br i1 %icmp, label %label1, label %label2 366label1: 367 ret i32 1 368label2: 369 ret i32 0 370} 371 372define i32 @brRI_sgt(i32 %x) { 373; CHECK-LABEL: brRI_sgt: 374; CHECK: # %bb.0: # %entry 375; CHECK-NEXT: cmplti16 a0, 11 376; CHECK-NEXT: bt32 .LBB17_2 377; CHECK-NEXT: # %bb.1: # %label1 378; CHECK-NEXT: movi16 a0, 1 379; CHECK-NEXT: rts16 380; CHECK-NEXT: .LBB17_2: # %label2 381; CHECK-NEXT: movi16 a0, 0 382; CHECK-NEXT: rts16 383; CHECK-UGTXT: icmpu32 a0, a1, a0 384; CHECK-UGTXT: rts16 385entry: 386 %icmp = icmp sgt i32 %x, 10 387 br i1 %icmp, label %label1, label %label2 388label1: 389 ret i32 1 390label2: 391 ret i32 0 392} 393 394define i32 @brR0_sgt(i32 %x) { 395; CHECK-LABEL: brR0_sgt: 396; CHECK: # %bb.0: # %entry 397; CHECK-NEXT: cmplti16 a0, 1 398; CHECK-NEXT: bt32 .LBB18_2 399; CHECK-NEXT: # %bb.1: # %label1 400; CHECK-NEXT: movi16 a0, 1 401; CHECK-NEXT: rts16 402; CHECK-NEXT: .LBB18_2: # %label2 403; CHECK-NEXT: movi16 a0, 0 404; CHECK-NEXT: rts16 405; CHECK-UGTXT: icmpu32 a0, a1, a0 406; CHECK-UGTXT: rts16 407entry: 408 %icmp = icmp sgt i32 %x, 0 409 br i1 %icmp, label %label1, label %label2 410label1: 411 ret i32 1 412label2: 413 ret i32 0 414} 415 416;SGE 417define i32 @brRR_sge(i32 %x, i32 %y) { 418; CHECK-LABEL: brRR_sge: 419; CHECK: # %bb.0: # %entry 420; CHECK-NEXT: cmplt16 a1, a0 421; CHECK-NEXT: bt32 .LBB19_2 422; CHECK-NEXT: # %bb.1: # %label1 423; CHECK-NEXT: movi16 a0, 1 424; CHECK-NEXT: rts16 425; CHECK-NEXT: .LBB19_2: # %label2 426; CHECK-NEXT: movi16 a0, 0 427; CHECK-NEXT: rts16 428; CHECK-UGTXT: icmpu32 a0, a1, a0 429; CHECK-UGTXT: rts16 430entry: 431 %icmp = icmp sge i32 %y, %x 432 br i1 %icmp, label %label1, label %label2 433label1: 434 ret i32 1 435label2: 436 ret i32 0 437} 438 439define i32 @brRI_sge(i32 %x) { 440; CHECK-LABEL: brRI_sge: 441; CHECK: # %bb.0: # %entry 442; CHECK-NEXT: cmplti16 a0, 10 443; CHECK-NEXT: bt32 .LBB20_2 444; CHECK-NEXT: # %bb.1: # %label1 445; CHECK-NEXT: movi16 a0, 1 446; CHECK-NEXT: rts16 447; CHECK-NEXT: .LBB20_2: # %label2 448; CHECK-NEXT: movi16 a0, 0 449; CHECK-NEXT: rts16 450; CHECK-UGTXT: icmpu32 a0, a1, a0 451; CHECK-UGTXT: rts16 452entry: 453 %icmp = icmp sge i32 %x, 10 454 br i1 %icmp, label %label1, label %label2 455label1: 456 ret i32 1 457label2: 458 ret i32 0 459} 460 461define i32 @brR0_sge(i32 %x) { 462; CHECK-LABEL: brR0_sge: 463; CHECK: # %bb.0: # %entry 464; CHECK-NEXT: blz32 a0, .LBB21_2 465; CHECK-NEXT: # %bb.1: # %label1 466; CHECK-NEXT: movi16 a0, 1 467; CHECK-NEXT: rts16 468; CHECK-NEXT: .LBB21_2: # %label2 469; CHECK-NEXT: movi16 a0, 0 470; CHECK-NEXT: rts16 471; CHECK-UGTXT: icmpu32 a0, a1, a0 472; CHECK-UGTXT: rts16 473entry: 474 %icmp = icmp sge i32 %x, 0 475 br i1 %icmp, label %label1, label %label2 476label1: 477 ret i32 1 478label2: 479 ret i32 0 480} 481 482;SLT 483define i32 @brRR_slt(i32 %x, i32 %y) { 484; CHECK-LABEL: brRR_slt: 485; CHECK: # %bb.0: # %entry 486; CHECK-NEXT: cmplt16 a1, a0 487; CHECK-NEXT: bf32 .LBB22_2 488; CHECK-NEXT: # %bb.1: # %label1 489; CHECK-NEXT: movi16 a0, 1 490; CHECK-NEXT: rts16 491; CHECK-NEXT: .LBB22_2: # %label2 492; CHECK-NEXT: movi16 a0, 0 493; CHECK-NEXT: rts16 494; CHECK-UGTXT: icmpu32 a0, a1, a0 495; CHECK-UGTXT: rts16 496entry: 497 %icmp = icmp slt i32 %y, %x 498 br i1 %icmp, label %label1, label %label2 499label1: 500 ret i32 1 501label2: 502 ret i32 0 503} 504 505define i32 @brRI_slt(i32 %x) { 506; CHECK-LABEL: brRI_slt: 507; CHECK: # %bb.0: # %entry 508; CHECK-NEXT: movi16 a1, 9 509; CHECK-NEXT: cmplt16 a1, a0 510; CHECK-NEXT: bt32 .LBB23_2 511; CHECK-NEXT: # %bb.1: # %label1 512; CHECK-NEXT: movi16 a0, 1 513; CHECK-NEXT: rts16 514; CHECK-NEXT: .LBB23_2: # %label2 515; CHECK-NEXT: movi16 a0, 0 516; CHECK-NEXT: rts16 517; CHECK-UGTXT: icmpu32 a0, a1, a0 518; CHECK-UGTXT: rts16 519entry: 520 %icmp = icmp slt i32 %x, 10 521 br i1 %icmp, label %label1, label %label2 522label1: 523 ret i32 1 524label2: 525 ret i32 0 526} 527 528define i32 @brR0_slt(i32 %x) { 529; CHECK-LABEL: brR0_slt: 530; CHECK: # %bb.0: # %entry 531; CHECK-NEXT: movih32 a1, 65535 532; CHECK-NEXT: ori32 a1, a1, 65535 533; CHECK-NEXT: cmplt16 a1, a0 534; CHECK-NEXT: bf32 .LBB24_2 535; CHECK-NEXT: # %bb.1: # %label2 536; CHECK-NEXT: movi16 a0, 0 537; CHECK-NEXT: rts16 538; CHECK-NEXT: .LBB24_2: # %label1 539; CHECK-NEXT: movi16 a0, 1 540; CHECK-NEXT: rts16 541; CHECK-UGTXT: icmpu32 a0, a1, a0 542; CHECK-UGTXT: rts16 543entry: 544 %icmp = icmp slt i32 %x, 0 545 br i1 %icmp, label %label1, label %label2 546label1: 547 ret i32 1 548label2: 549 ret i32 0 550} 551 552;SLE 553define i32 @brRR_sle(i32 %x, i32 %y) { 554; CHECK-LABEL: brRR_sle: 555; CHECK: # %bb.0: # %entry 556; CHECK-NEXT: cmplt16 a0, a1 557; CHECK-NEXT: bt32 .LBB25_2 558; CHECK-NEXT: # %bb.1: # %label1 559; CHECK-NEXT: movi16 a0, 1 560; CHECK-NEXT: rts16 561; CHECK-NEXT: .LBB25_2: # %label2 562; CHECK-NEXT: movi16 a0, 0 563; CHECK-NEXT: rts16 564; CHECK-UGTXT: icmpu32 a0, a1, a0 565; CHECK-UGTXT: rts16 566entry: 567 %icmp = icmp sle i32 %y, %x 568 br i1 %icmp, label %label1, label %label2 569label1: 570 ret i32 1 571label2: 572 ret i32 0 573} 574 575define i32 @brRI_sle(i32 %x) { 576; CHECK-LABEL: brRI_sle: 577; CHECK: # %bb.0: # %entry 578; CHECK-NEXT: movi16 a1, 10 579; CHECK-NEXT: cmplt16 a1, a0 580; CHECK-NEXT: bt32 .LBB26_2 581; CHECK-NEXT: # %bb.1: # %label1 582; CHECK-NEXT: movi16 a0, 1 583; CHECK-NEXT: rts16 584; CHECK-NEXT: .LBB26_2: # %label2 585; CHECK-NEXT: movi16 a0, 0 586; CHECK-NEXT: rts16 587; CHECK-UGTXT: icmpu32 a0, a1, a0 588; CHECK-UGTXT: rts16 589entry: 590 %icmp = icmp sle i32 %x, 10 591 br i1 %icmp, label %label1, label %label2 592label1: 593 ret i32 1 594label2: 595 ret i32 0 596} 597 598define i32 @brR0_sle(i32 %x) { 599; CHECK-LABEL: brR0_sle: 600; CHECK: # %bb.0: # %entry 601; CHECK-NEXT: bhz32 a0, .LBB27_2 602; CHECK-NEXT: # %bb.1: # %label1 603; CHECK-NEXT: movi16 a0, 1 604; CHECK-NEXT: rts16 605; CHECK-NEXT: .LBB27_2: # %label2 606; CHECK-NEXT: movi16 a0, 0 607; CHECK-NEXT: rts16 608; CHECK-UGTXT: icmpu32 a0, a1, a0 609; CHECK-UGTXT: rts16 610entry: 611 %icmp = icmp sle i32 %x, 0 612 br i1 %icmp, label %label1, label %label2 613label1: 614 ret i32 1 615label2: 616 ret i32 0 617} 618 619 620define i32 @brCBit(i1 %c) { 621; CHECK-LABEL: brCBit: 622; CHECK: # %bb.0: # %entry 623; CHECK-NEXT: andi32 a0, a0, 1 624; CHECK-NEXT: bez32 a0, .LBB28_2 625; CHECK-NEXT: # %bb.1: # %label1 626; CHECK-NEXT: movi16 a0, 1 627; CHECK-NEXT: rts16 628; CHECK-NEXT: .LBB28_2: # %label2 629; CHECK-NEXT: movi16 a0, 0 630; CHECK-NEXT: rts16 631entry: 632 br i1 %c, label %label1, label %label2 633label1: 634 ret i32 1 635label2: 636 ret i32 0 637} 638 639 640;EQ 641define i64 @brRR_i64_eq(i64 %x, i64 %y) { 642; CHECK-LABEL: brRR_i64_eq: 643; CHECK: # %bb.0: # %entry 644; CHECK-NEXT: xor16 a1, a3 645; CHECK-NEXT: xor16 a0, a2 646; CHECK-NEXT: or16 a0, a1 647; CHECK-NEXT: bnez32 a0, .LBB29_2 648; CHECK-NEXT: # %bb.1: # %label1 649; CHECK-NEXT: movi16 a0, 1 650; CHECK-NEXT: movi16 a1, 0 651; CHECK-NEXT: rts16 652; CHECK-NEXT: .LBB29_2: # %label2 653; CHECK-NEXT: movi16 a0, 0 654; CHECK-NEXT: movi16 a1, 0 655; CHECK-NEXT: rts16 656entry: 657 %icmp = icmp eq i64 %y, %x 658 br i1 %icmp, label %label1, label %label2 659label1: 660 ret i64 1 661label2: 662 ret i64 0 663} 664 665define i64 @brR0_i64_eq(i64 %x) { 666; CHECK-LABEL: brR0_i64_eq: 667; CHECK: # %bb.0: # %entry 668; CHECK-NEXT: xori32 a0, a0, 10 669; CHECK-NEXT: or16 a0, a1 670; CHECK-NEXT: bnez32 a0, .LBB30_2 671; CHECK-NEXT: # %bb.1: # %label1 672; CHECK-NEXT: movi16 a0, 1 673; CHECK-NEXT: movi16 a1, 0 674; CHECK-NEXT: rts16 675; CHECK-NEXT: .LBB30_2: # %label2 676; CHECK-NEXT: movi16 a0, 0 677; CHECK-NEXT: movi16 a1, 0 678; CHECK-NEXT: rts16 679entry: 680 %icmp = icmp eq i64 %x, 10 681 br i1 %icmp, label %label1, label %label2 682label1: 683 ret i64 1 684label2: 685 ret i64 0 686} 687 688define i64 @brRI_i64_eq(i64 %x) { 689; CHECK-LABEL: brRI_i64_eq: 690; CHECK: # %bb.0: # %entry 691; CHECK-NEXT: or16 a0, a1 692; CHECK-NEXT: bez32 a0, .LBB31_2 693; CHECK-NEXT: # %bb.1: # %label2 694; CHECK-NEXT: movi16 a0, 0 695; CHECK-NEXT: movi16 a1, 0 696; CHECK-NEXT: rts16 697; CHECK-NEXT: .LBB31_2: # %label1 698; CHECK-NEXT: movi16 a0, 1 699; CHECK-NEXT: movi16 a1, 0 700; CHECK-NEXT: rts16 701entry: 702 %icmp = icmp eq i64 %x, 0 703 br i1 %icmp, label %label1, label %label2 704label1: 705 ret i64 1 706label2: 707 ret i64 0 708} 709 710;NE 711define i64 @brRR_i64_ne(i64 %x, i64 %y) { 712; CHECK-LABEL: brRR_i64_ne: 713; CHECK: # %bb.0: # %entry 714; CHECK-NEXT: xor16 a1, a3 715; CHECK-NEXT: xor16 a0, a2 716; CHECK-NEXT: or16 a0, a1 717; CHECK-NEXT: bez32 a0, .LBB32_2 718; CHECK-NEXT: # %bb.1: # %label1 719; CHECK-NEXT: movi16 a0, 1 720; CHECK-NEXT: movi16 a1, 0 721; CHECK-NEXT: rts16 722; CHECK-NEXT: .LBB32_2: # %label2 723; CHECK-NEXT: movi16 a0, 0 724; CHECK-NEXT: movi16 a1, 0 725; CHECK-NEXT: rts16 726entry: 727 %icmp = icmp ne i64 %y, %x 728 br i1 %icmp, label %label1, label %label2 729label1: 730 ret i64 1 731label2: 732 ret i64 0 733} 734 735define i64 @brRI_i64_ne(i64 %x) { 736; CHECK-LABEL: brRI_i64_ne: 737; CHECK: # %bb.0: # %entry 738; CHECK-NEXT: xori32 a0, a0, 10 739; CHECK-NEXT: or16 a0, a1 740; CHECK-NEXT: bez32 a0, .LBB33_2 741; CHECK-NEXT: # %bb.1: # %label1 742; CHECK-NEXT: movi16 a0, 1 743; CHECK-NEXT: movi16 a1, 0 744; CHECK-NEXT: rts16 745; CHECK-NEXT: .LBB33_2: # %label2 746; CHECK-NEXT: movi16 a0, 0 747; CHECK-NEXT: movi16 a1, 0 748; CHECK-NEXT: rts16 749entry: 750 %icmp = icmp ne i64 %x, 10 751 br i1 %icmp, label %label1, label %label2 752label1: 753 ret i64 1 754label2: 755 ret i64 0 756} 757 758define i64 @brR0_i64_ne(i64 %x) { 759; CHECK-LABEL: brR0_i64_ne: 760; CHECK: # %bb.0: # %entry 761; CHECK-NEXT: or16 a0, a1 762; CHECK-NEXT: bez32 a0, .LBB34_2 763; CHECK-NEXT: # %bb.1: # %label1 764; CHECK-NEXT: movi16 a0, 1 765; CHECK-NEXT: movi16 a1, 0 766; CHECK-NEXT: rts16 767; CHECK-NEXT: .LBB34_2: # %label2 768; CHECK-NEXT: movi16 a0, 0 769; CHECK-NEXT: movi16 a1, 0 770; CHECK-NEXT: rts16 771entry: 772 %icmp = icmp ne i64 %x, 0 773 br i1 %icmp, label %label1, label %label2 774label1: 775 ret i64 1 776label2: 777 ret i64 0 778} 779 780;UGT 781define i64 @brRR_i64_ugt(i64 %x, i64 %y) { 782; CHECK-LABEL: brRR_i64_ugt: 783; CHECK: # %bb.0: # %entry 784; CHECK-NEXT: .cfi_def_cfa_offset 0 785; CHECK-NEXT: subi16 sp, sp, 16 786; CHECK-NEXT: .cfi_def_cfa_offset 16 787; CHECK-NEXT: cmphs16 a1, a3 788; CHECK-NEXT: mvc32 t0 789; CHECK-NEXT: st32.w t0, (sp, 12) 790; CHECK-NEXT: cmphs16 a0, a2 791; CHECK-NEXT: mvc32 a0 792; CHECK-NEXT: st16.w a0, (sp, 4) 793; CHECK-NEXT: cmpne16 a3, a1 794; CHECK-NEXT: mvc32 a0 795; CHECK-NEXT: st16.w a0, (sp, 8) 796; CHECK-NEXT: ld16.w a0, (sp, 4) 797; CHECK-NEXT: btsti32 a0, 0 798; CHECK-NEXT: mvc32 a0 799; CHECK-NEXT: ld16.w a1, (sp, 12) 800; CHECK-NEXT: btsti32 a1, 0 801; CHECK-NEXT: mvc32 a1 802; CHECK-NEXT: ld16.w a2, (sp, 8) 803; CHECK-NEXT: btsti32 a2, 0 804; CHECK-NEXT: movf32 a1, a0 805; CHECK-NEXT: btsti32 a1, 0 806; CHECK-NEXT: bt32 .LBB35_2 807; CHECK-NEXT: # %bb.1: # %label1 808; CHECK-NEXT: movi16 a0, 1 809; CHECK-NEXT: br32 .LBB35_3 810; CHECK-NEXT: .LBB35_2: # %label2 811; CHECK-NEXT: movi16 a0, 0 812; CHECK-NEXT: .LBB35_3: # %label1 813; CHECK-NEXT: movi16 a1, 0 814; CHECK-NEXT: addi16 sp, sp, 16 815; CHECK-NEXT: rts16 816; CHECK-UGTXT: icmpu32 a0, a1, a0 817; CHECK-UGTXT: rts16 818entry: 819 %icmp = icmp ugt i64 %y, %x 820 br i1 %icmp, label %label1, label %label2 821label1: 822 ret i64 1 823label2: 824 ret i64 0 825} 826 827define i64 @brRI_i64_ugt(i64 %x) { 828; CHECK-LABEL: brRI_i64_ugt: 829; CHECK: # %bb.0: # %entry 830; CHECK-NEXT: .cfi_def_cfa_offset 0 831; CHECK-NEXT: subi16 sp, sp, 8 832; CHECK-NEXT: .cfi_def_cfa_offset 8 833; CHECK-NEXT: cmpnei16 a1, 0 834; CHECK-NEXT: mvc32 a1 835; CHECK-NEXT: st16.w a1, (sp, 4) 836; CHECK-NEXT: cmphsi16 a0, 11 837; CHECK-NEXT: mvcv16 a0 838; CHECK-NEXT: movi16 a1, 0 839; CHECK-NEXT: ld16.w a2, (sp, 4) 840; CHECK-NEXT: btsti32 a2, 0 841; CHECK-NEXT: movf32 a1, a0 842; CHECK-NEXT: btsti32 a1, 0 843; CHECK-NEXT: bt32 .LBB36_2 844; CHECK-NEXT: # %bb.1: # %label1 845; CHECK-NEXT: movi16 a0, 1 846; CHECK-NEXT: br32 .LBB36_3 847; CHECK-NEXT: .LBB36_2: # %label2 848; CHECK-NEXT: movi16 a0, 0 849; CHECK-NEXT: .LBB36_3: # %label1 850; CHECK-NEXT: movi16 a1, 0 851; CHECK-NEXT: addi16 sp, sp, 8 852; CHECK-NEXT: rts16 853; CHECK-UGTXT: icmpu32 a0, a1, a0 854; CHECK-UGTXT: rts16 855entry: 856 %icmp = icmp ugt i64 %x, 10 857 br i1 %icmp, label %label1, label %label2 858label1: 859 ret i64 1 860label2: 861 ret i64 0 862} 863 864define i64 @brR0_i64_ugt(i64 %x) { 865; CHECK-LABEL: brR0_i64_ugt: 866; CHECK: # %bb.0: # %entry 867; CHECK-NEXT: or16 a0, a1 868; CHECK-NEXT: bez32 a0, .LBB37_2 869; CHECK-NEXT: # %bb.1: # %label1 870; CHECK-NEXT: movi16 a0, 1 871; CHECK-NEXT: movi16 a1, 0 872; CHECK-NEXT: rts16 873; CHECK-NEXT: .LBB37_2: # %label2 874; CHECK-NEXT: movi16 a0, 0 875; CHECK-NEXT: movi16 a1, 0 876; CHECK-NEXT: rts16 877; CHECK-UGTXT: icmpu32 a0, a1, a0 878; CHECK-UGTXT: rts16 879entry: 880 %icmp = icmp ugt i64 %x, 0 881 br i1 %icmp, label %label1, label %label2 882label1: 883 ret i64 1 884label2: 885 ret i64 0 886} 887 888;UGE 889define i64 @brRR_i64_uge(i64 %x, i64 %y) { 890; CHECK-LABEL: brRR_i64_uge: 891; CHECK: # %bb.0: # %entry 892; CHECK-NEXT: .cfi_def_cfa_offset 0 893; CHECK-NEXT: subi16 sp, sp, 8 894; CHECK-NEXT: .cfi_def_cfa_offset 8 895; CHECK-NEXT: cmpne16 a3, a1 896; CHECK-NEXT: mvc32 t0 897; CHECK-NEXT: st32.w t0, (sp, 4) 898; CHECK-NEXT: cmphs16 a3, a1 899; CHECK-NEXT: mvcv16 a1 900; CHECK-NEXT: cmphs16 a2, a0 901; CHECK-NEXT: mvcv16 a0 902; CHECK-NEXT: ld16.w a2, (sp, 4) 903; CHECK-NEXT: btsti32 a2, 0 904; CHECK-NEXT: movf32 a1, a0 905; CHECK-NEXT: btsti32 a1, 0 906; CHECK-NEXT: bt32 .LBB38_2 907; CHECK-NEXT: # %bb.1: # %label1 908; CHECK-NEXT: movi16 a0, 1 909; CHECK-NEXT: br32 .LBB38_3 910; CHECK-NEXT: .LBB38_2: # %label2 911; CHECK-NEXT: movi16 a0, 0 912; CHECK-NEXT: .LBB38_3: # %label1 913; CHECK-NEXT: movi16 a1, 0 914; CHECK-NEXT: addi16 sp, sp, 8 915; CHECK-NEXT: rts16 916; CHECK-UGTXT: icmpu32 a0, a1, a0 917; CHECK-UGTXT: rts16 918entry: 919 %icmp = icmp uge i64 %y, %x 920 br i1 %icmp, label %label1, label %label2 921label1: 922 ret i64 1 923label2: 924 ret i64 0 925} 926 927define i64 @brRI_i64_uge(i64 %x) { 928; CHECK-LABEL: brRI_i64_uge: 929; CHECK: # %bb.0: # %entry 930; CHECK-NEXT: .cfi_def_cfa_offset 0 931; CHECK-NEXT: subi16 sp, sp, 8 932; CHECK-NEXT: .cfi_def_cfa_offset 8 933; CHECK-NEXT: cmpnei16 a1, 0 934; CHECK-NEXT: mvc32 a1 935; CHECK-NEXT: st16.w a1, (sp, 4) 936; CHECK-NEXT: cmphsi16 a0, 10 937; CHECK-NEXT: mvcv16 a0 938; CHECK-NEXT: movi16 a1, 0 939; CHECK-NEXT: ld16.w a2, (sp, 4) 940; CHECK-NEXT: btsti32 a2, 0 941; CHECK-NEXT: movf32 a1, a0 942; CHECK-NEXT: btsti32 a1, 0 943; CHECK-NEXT: bt32 .LBB39_2 944; CHECK-NEXT: # %bb.1: # %label1 945; CHECK-NEXT: movi16 a0, 1 946; CHECK-NEXT: br32 .LBB39_3 947; CHECK-NEXT: .LBB39_2: # %label2 948; CHECK-NEXT: movi16 a0, 0 949; CHECK-NEXT: .LBB39_3: # %label1 950; CHECK-NEXT: movi16 a1, 0 951; CHECK-NEXT: addi16 sp, sp, 8 952; CHECK-NEXT: rts16 953; CHECK-UGTXT: icmpu32 a0, a1, a0 954; CHECK-UGTXT: rts16 955entry: 956 %icmp = icmp uge i64 %x, 10 957 br i1 %icmp, label %label1, label %label2 958label1: 959 ret i64 1 960label2: 961 ret i64 0 962} 963 964;ULT 965define i64 @brRR_i64_ult(i64 %x, i64 %y) { 966; CHECK-LABEL: brRR_i64_ult: 967; CHECK: # %bb.0: # %entry 968; CHECK-NEXT: .cfi_def_cfa_offset 0 969; CHECK-NEXT: subi16 sp, sp, 16 970; CHECK-NEXT: .cfi_def_cfa_offset 16 971; CHECK-NEXT: cmphs16 a3, a1 972; CHECK-NEXT: mvc32 t0 973; CHECK-NEXT: st32.w t0, (sp, 12) 974; CHECK-NEXT: cmphs16 a2, a0 975; CHECK-NEXT: mvc32 a0 976; CHECK-NEXT: st16.w a0, (sp, 4) 977; CHECK-NEXT: cmpne16 a3, a1 978; CHECK-NEXT: mvc32 a0 979; CHECK-NEXT: st16.w a0, (sp, 8) 980; CHECK-NEXT: ld16.w a0, (sp, 4) 981; CHECK-NEXT: btsti32 a0, 0 982; CHECK-NEXT: mvc32 a0 983; CHECK-NEXT: ld16.w a1, (sp, 12) 984; CHECK-NEXT: btsti32 a1, 0 985; CHECK-NEXT: mvc32 a1 986; CHECK-NEXT: ld16.w a2, (sp, 8) 987; CHECK-NEXT: btsti32 a2, 0 988; CHECK-NEXT: movf32 a1, a0 989; CHECK-NEXT: btsti32 a1, 0 990; CHECK-NEXT: bt32 .LBB40_2 991; CHECK-NEXT: # %bb.1: # %label1 992; CHECK-NEXT: movi16 a0, 1 993; CHECK-NEXT: br32 .LBB40_3 994; CHECK-NEXT: .LBB40_2: # %label2 995; CHECK-NEXT: movi16 a0, 0 996; CHECK-NEXT: .LBB40_3: # %label1 997; CHECK-NEXT: movi16 a1, 0 998; CHECK-NEXT: addi16 sp, sp, 16 999; CHECK-NEXT: rts16 1000; CHECK-UGTXT: icmpu32 a0, a1, a0 1001; CHECK-UGTXT: rts16 1002entry: 1003 %icmp = icmp ult i64 %y, %x 1004 br i1 %icmp, label %label1, label %label2 1005label1: 1006 ret i64 1 1007label2: 1008 ret i64 0 1009} 1010 1011define i64 @brRI_i64_ult(i64 %x) { 1012; CHECK-LABEL: brRI_i64_ult: 1013; CHECK: # %bb.0: # %entry 1014; CHECK-NEXT: movi16 a2, 9 1015; CHECK-NEXT: cmphs16 a2, a0 1016; CHECK-NEXT: mvcv16 a0 1017; CHECK-NEXT: cmpnei16 a1, 0 1018; CHECK-NEXT: mvc32 a1 1019; CHECK-NEXT: movf32 a1, a0 1020; CHECK-NEXT: btsti32 a1, 0 1021; CHECK-NEXT: bt32 .LBB41_2 1022; CHECK-NEXT: # %bb.1: # %label1 1023; CHECK-NEXT: movi16 a0, 1 1024; CHECK-NEXT: movi16 a1, 0 1025; CHECK-NEXT: rts16 1026; CHECK-NEXT: .LBB41_2: # %label2 1027; CHECK-NEXT: movi16 a0, 0 1028; CHECK-NEXT: movi16 a1, 0 1029; CHECK-NEXT: rts16 1030; CHECK-UGTXT: icmpu32 a0, a1, a0 1031; CHECK-UGTXT: rts16 1032entry: 1033 %icmp = icmp ult i64 %x, 10 1034 br i1 %icmp, label %label1, label %label2 1035label1: 1036 ret i64 1 1037label2: 1038 ret i64 0 1039} 1040 1041 1042;ULE 1043define i64 @brRR_i64_ule(i64 %x, i64 %y) { 1044; CHECK-LABEL: brRR_i64_ule: 1045; CHECK: # %bb.0: # %entry 1046; CHECK-NEXT: .cfi_def_cfa_offset 0 1047; CHECK-NEXT: subi16 sp, sp, 8 1048; CHECK-NEXT: .cfi_def_cfa_offset 8 1049; CHECK-NEXT: cmpne16 a3, a1 1050; CHECK-NEXT: mvc32 t0 1051; CHECK-NEXT: st32.w t0, (sp, 4) 1052; CHECK-NEXT: cmphs16 a1, a3 1053; CHECK-NEXT: mvcv16 a1 1054; CHECK-NEXT: cmphs16 a0, a2 1055; CHECK-NEXT: mvcv16 a0 1056; CHECK-NEXT: ld16.w a2, (sp, 4) 1057; CHECK-NEXT: btsti32 a2, 0 1058; CHECK-NEXT: movf32 a1, a0 1059; CHECK-NEXT: btsti32 a1, 0 1060; CHECK-NEXT: bt32 .LBB42_2 1061; CHECK-NEXT: # %bb.1: # %label1 1062; CHECK-NEXT: movi16 a0, 1 1063; CHECK-NEXT: br32 .LBB42_3 1064; CHECK-NEXT: .LBB42_2: # %label2 1065; CHECK-NEXT: movi16 a0, 0 1066; CHECK-NEXT: .LBB42_3: # %label1 1067; CHECK-NEXT: movi16 a1, 0 1068; CHECK-NEXT: addi16 sp, sp, 8 1069; CHECK-NEXT: rts16 1070; CHECK-UGTXT: icmpu32 a0, a1, a0 1071; CHECK-UGTXT: rts16 1072entry: 1073 %icmp = icmp ule i64 %y, %x 1074 br i1 %icmp, label %label1, label %label2 1075label1: 1076 ret i64 1 1077label2: 1078 ret i64 0 1079} 1080 1081define i64 @brRI_i64_ule(i64 %x) { 1082; CHECK-LABEL: brRI_i64_ule: 1083; CHECK: # %bb.0: # %entry 1084; CHECK-NEXT: movi16 a2, 10 1085; CHECK-NEXT: cmphs16 a2, a0 1086; CHECK-NEXT: mvcv16 a0 1087; CHECK-NEXT: cmpnei16 a1, 0 1088; CHECK-NEXT: mvc32 a1 1089; CHECK-NEXT: movf32 a1, a0 1090; CHECK-NEXT: btsti32 a1, 0 1091; CHECK-NEXT: bt32 .LBB43_2 1092; CHECK-NEXT: # %bb.1: # %label1 1093; CHECK-NEXT: movi16 a0, 1 1094; CHECK-NEXT: movi16 a1, 0 1095; CHECK-NEXT: rts16 1096; CHECK-NEXT: .LBB43_2: # %label2 1097; CHECK-NEXT: movi16 a0, 0 1098; CHECK-NEXT: movi16 a1, 0 1099; CHECK-NEXT: rts16 1100; CHECK-UGTXT: icmpu32 a0, a1, a0 1101; CHECK-UGTXT: rts16 1102entry: 1103 %icmp = icmp ule i64 %x, 10 1104 br i1 %icmp, label %label1, label %label2 1105label1: 1106 ret i64 1 1107label2: 1108 ret i64 0 1109} 1110 1111define i64 @brR0_i64_ule(i64 %x) { 1112; CHECK-LABEL: brR0_i64_ule: 1113; CHECK: # %bb.0: # %entry 1114; CHECK-NEXT: or16 a0, a1 1115; CHECK-NEXT: bnez32 a0, .LBB44_2 1116; CHECK-NEXT: # %bb.1: # %label1 1117; CHECK-NEXT: movi16 a0, 1 1118; CHECK-NEXT: movi16 a1, 0 1119; CHECK-NEXT: rts16 1120; CHECK-NEXT: .LBB44_2: # %label2 1121; CHECK-NEXT: movi16 a0, 0 1122; CHECK-NEXT: movi16 a1, 0 1123; CHECK-NEXT: rts16 1124; CHECK-UGTXT: icmpu32 a0, a1, a0 1125; CHECK-UGTXT: rts16 1126entry: 1127 %icmp = icmp ule i64 %x, 0 1128 br i1 %icmp, label %label1, label %label2 1129label1: 1130 ret i64 1 1131label2: 1132 ret i64 0 1133} 1134 1135;SGT 1136define i64 @brRR_i64_sgt(i64 %x, i64 %y) { 1137; CHECK-LABEL: brRR_i64_sgt: 1138; CHECK: # %bb.0: # %entry 1139; CHECK-NEXT: .cfi_def_cfa_offset 0 1140; CHECK-NEXT: subi16 sp, sp, 12 1141; CHECK-NEXT: .cfi_def_cfa_offset 12 1142; CHECK-NEXT: cmphs16 a0, a2 1143; CHECK-NEXT: mvc32 a0 1144; CHECK-NEXT: st16.w a0, (sp, 4) 1145; CHECK-NEXT: cmpne16 a3, a1 1146; CHECK-NEXT: mvc32 a0 1147; CHECK-NEXT: st16.w a0, (sp, 8) 1148; CHECK-NEXT: cmplt16 a1, a3 1149; CHECK-NEXT: mvcv16 a0 1150; CHECK-NEXT: ld16.w a1, (sp, 4) 1151; CHECK-NEXT: btsti32 a1, 0 1152; CHECK-NEXT: mvc32 a1 1153; CHECK-NEXT: ld16.w a2, (sp, 8) 1154; CHECK-NEXT: btsti32 a2, 0 1155; CHECK-NEXT: movf32 a0, a1 1156; CHECK-NEXT: btsti32 a0, 0 1157; CHECK-NEXT: bt32 .LBB45_2 1158; CHECK-NEXT: # %bb.1: # %label1 1159; CHECK-NEXT: movi16 a0, 1 1160; CHECK-NEXT: br32 .LBB45_3 1161; CHECK-NEXT: .LBB45_2: # %label2 1162; CHECK-NEXT: movi16 a0, 0 1163; CHECK-NEXT: .LBB45_3: # %label1 1164; CHECK-NEXT: movi16 a1, 0 1165; CHECK-NEXT: addi16 sp, sp, 12 1166; CHECK-NEXT: rts16 1167; CHECK-UGTXT: icmpu32 a0, a1, a0 1168; CHECK-UGTXT: rts16 1169entry: 1170 %icmp = icmp sgt i64 %y, %x 1171 br i1 %icmp, label %label1, label %label2 1172label1: 1173 ret i64 1 1174label2: 1175 ret i64 0 1176} 1177 1178define i64 @brRI_i64_sgt(i64 %x) { 1179; CHECK-LABEL: brRI_i64_sgt: 1180; CHECK: # %bb.0: # %entry 1181; CHECK-NEXT: .cfi_def_cfa_offset 0 1182; CHECK-NEXT: subi16 sp, sp, 12 1183; CHECK-NEXT: .cfi_def_cfa_offset 12 1184; CHECK-NEXT: movi16 a2, 0 1185; CHECK-NEXT: cmplt16 a1, a2 1186; CHECK-NEXT: mvc32 a2 1187; CHECK-NEXT: st16.w a2, (sp, 4) 1188; CHECK-NEXT: cmpnei16 a1, 0 1189; CHECK-NEXT: mvc32 a1 1190; CHECK-NEXT: st16.w a1, (sp, 8) 1191; CHECK-NEXT: cmphsi16 a0, 11 1192; CHECK-NEXT: mvcv16 a0 1193; CHECK-NEXT: ld16.w a1, (sp, 4) 1194; CHECK-NEXT: btsti32 a1, 0 1195; CHECK-NEXT: mvc32 a1 1196; CHECK-NEXT: ld16.w a2, (sp, 8) 1197; CHECK-NEXT: btsti32 a2, 0 1198; CHECK-NEXT: movf32 a1, a0 1199; CHECK-NEXT: btsti32 a1, 0 1200; CHECK-NEXT: bt32 .LBB46_2 1201; CHECK-NEXT: # %bb.1: # %label1 1202; CHECK-NEXT: movi16 a0, 1 1203; CHECK-NEXT: br32 .LBB46_3 1204; CHECK-NEXT: .LBB46_2: # %label2 1205; CHECK-NEXT: movi16 a0, 0 1206; CHECK-NEXT: .LBB46_3: # %label1 1207; CHECK-NEXT: movi16 a1, 0 1208; CHECK-NEXT: addi16 sp, sp, 12 1209; CHECK-NEXT: rts16 1210; CHECK-UGTXT: icmpu32 a0, a1, a0 1211; CHECK-UGTXT: rts16 1212entry: 1213 %icmp = icmp sgt i64 %x, 10 1214 br i1 %icmp, label %label1, label %label2 1215label1: 1216 ret i64 1 1217label2: 1218 ret i64 0 1219} 1220 1221define i64 @brR0_i64_sgt(i64 %x) { 1222; CHECK-LABEL: brR0_i64_sgt: 1223; CHECK: # %bb.0: # %entry 1224; CHECK-NEXT: .cfi_def_cfa_offset 0 1225; CHECK-NEXT: subi16 sp, sp, 12 1226; CHECK-NEXT: .cfi_def_cfa_offset 12 1227; CHECK-NEXT: movi16 a2, 0 1228; CHECK-NEXT: cmplt16 a1, a2 1229; CHECK-NEXT: mvc32 a2 1230; CHECK-NEXT: st16.w a2, (sp, 4) 1231; CHECK-NEXT: cmpnei16 a1, 0 1232; CHECK-NEXT: mvc32 a1 1233; CHECK-NEXT: st16.w a1, (sp, 8) 1234; CHECK-NEXT: cmpnei16 a0, 0 1235; CHECK-NEXT: mvcv16 a0 1236; CHECK-NEXT: ld16.w a1, (sp, 4) 1237; CHECK-NEXT: btsti32 a1, 0 1238; CHECK-NEXT: mvc32 a1 1239; CHECK-NEXT: ld16.w a2, (sp, 8) 1240; CHECK-NEXT: btsti32 a2, 0 1241; CHECK-NEXT: movf32 a1, a0 1242; CHECK-NEXT: btsti32 a1, 0 1243; CHECK-NEXT: bt32 .LBB47_2 1244; CHECK-NEXT: # %bb.1: # %label1 1245; CHECK-NEXT: movi16 a0, 1 1246; CHECK-NEXT: br32 .LBB47_3 1247; CHECK-NEXT: .LBB47_2: # %label2 1248; CHECK-NEXT: movi16 a0, 0 1249; CHECK-NEXT: .LBB47_3: # %label1 1250; CHECK-NEXT: movi16 a1, 0 1251; CHECK-NEXT: addi16 sp, sp, 12 1252; CHECK-NEXT: rts16 1253; CHECK-UGTXT: icmpu32 a0, a1, a0 1254; CHECK-UGTXT: rts16 1255entry: 1256 %icmp = icmp sgt i64 %x, 0 1257 br i1 %icmp, label %label1, label %label2 1258label1: 1259 ret i64 1 1260label2: 1261 ret i64 0 1262} 1263 1264;SGE 1265define i64 @brRR_i64_sge(i64 %x, i64 %y) { 1266; CHECK-LABEL: brRR_i64_sge: 1267; CHECK: # %bb.0: # %entry 1268; CHECK-NEXT: .cfi_def_cfa_offset 0 1269; CHECK-NEXT: subi16 sp, sp, 12 1270; CHECK-NEXT: .cfi_def_cfa_offset 12 1271; CHECK-NEXT: cmplt16 a3, a1 1272; CHECK-NEXT: mvc32 t0 1273; CHECK-NEXT: st32.w t0, (sp, 4) 1274; CHECK-NEXT: cmpne16 a3, a1 1275; CHECK-NEXT: mvc32 a1 1276; CHECK-NEXT: st16.w a1, (sp, 8) 1277; CHECK-NEXT: cmphs16 a2, a0 1278; CHECK-NEXT: mvcv16 a0 1279; CHECK-NEXT: ld16.w a1, (sp, 4) 1280; CHECK-NEXT: btsti32 a1, 0 1281; CHECK-NEXT: mvc32 a1 1282; CHECK-NEXT: ld16.w a2, (sp, 8) 1283; CHECK-NEXT: btsti32 a2, 0 1284; CHECK-NEXT: movf32 a1, a0 1285; CHECK-NEXT: btsti32 a1, 0 1286; CHECK-NEXT: bt32 .LBB48_2 1287; CHECK-NEXT: # %bb.1: # %label1 1288; CHECK-NEXT: movi16 a0, 1 1289; CHECK-NEXT: br32 .LBB48_3 1290; CHECK-NEXT: .LBB48_2: # %label2 1291; CHECK-NEXT: movi16 a0, 0 1292; CHECK-NEXT: .LBB48_3: # %label1 1293; CHECK-NEXT: movi16 a1, 0 1294; CHECK-NEXT: addi16 sp, sp, 12 1295; CHECK-NEXT: rts16 1296; CHECK-UGTXT: icmpu32 a0, a1, a0 1297; CHECK-UGTXT: rts16 1298entry: 1299 %icmp = icmp sge i64 %y, %x 1300 br i1 %icmp, label %label1, label %label2 1301label1: 1302 ret i64 1 1303label2: 1304 ret i64 0 1305} 1306 1307define i64 @brRI_i64_sge(i64 %x) { 1308; CHECK-LABEL: brRI_i64_sge: 1309; CHECK: # %bb.0: # %entry 1310; CHECK-NEXT: .cfi_def_cfa_offset 0 1311; CHECK-NEXT: subi16 sp, sp, 12 1312; CHECK-NEXT: .cfi_def_cfa_offset 12 1313; CHECK-NEXT: movi16 a2, 0 1314; CHECK-NEXT: cmplt16 a1, a2 1315; CHECK-NEXT: mvc32 a2 1316; CHECK-NEXT: st16.w a2, (sp, 4) 1317; CHECK-NEXT: cmpnei16 a1, 0 1318; CHECK-NEXT: mvc32 a1 1319; CHECK-NEXT: st16.w a1, (sp, 8) 1320; CHECK-NEXT: cmphsi16 a0, 10 1321; CHECK-NEXT: mvcv16 a0 1322; CHECK-NEXT: ld16.w a1, (sp, 4) 1323; CHECK-NEXT: btsti32 a1, 0 1324; CHECK-NEXT: mvc32 a1 1325; CHECK-NEXT: ld16.w a2, (sp, 8) 1326; CHECK-NEXT: btsti32 a2, 0 1327; CHECK-NEXT: movf32 a1, a0 1328; CHECK-NEXT: btsti32 a1, 0 1329; CHECK-NEXT: bt32 .LBB49_2 1330; CHECK-NEXT: # %bb.1: # %label1 1331; CHECK-NEXT: movi16 a0, 1 1332; CHECK-NEXT: br32 .LBB49_3 1333; CHECK-NEXT: .LBB49_2: # %label2 1334; CHECK-NEXT: movi16 a0, 0 1335; CHECK-NEXT: .LBB49_3: # %label1 1336; CHECK-NEXT: movi16 a1, 0 1337; CHECK-NEXT: addi16 sp, sp, 12 1338; CHECK-NEXT: rts16 1339; CHECK-UGTXT: icmpu32 a0, a1, a0 1340; CHECK-UGTXT: rts16 1341entry: 1342 %icmp = icmp sge i64 %x, 10 1343 br i1 %icmp, label %label1, label %label2 1344label1: 1345 ret i64 1 1346label2: 1347 ret i64 0 1348} 1349 1350define i64 @brR0_i64_sge(i64 %x) { 1351; CHECK-LABEL: brR0_i64_sge: 1352; CHECK: # %bb.0: # %entry 1353; CHECK-NEXT: blz32 a1, .LBB50_2 1354; CHECK-NEXT: # %bb.1: # %label1 1355; CHECK-NEXT: movi16 a0, 1 1356; CHECK-NEXT: movi16 a1, 0 1357; CHECK-NEXT: rts16 1358; CHECK-NEXT: .LBB50_2: # %label2 1359; CHECK-NEXT: movi16 a0, 0 1360; CHECK-NEXT: movi16 a1, 0 1361; CHECK-NEXT: rts16 1362; CHECK-UGTXT: icmpu32 a0, a1, a0 1363; CHECK-UGTXT: rts16 1364entry: 1365 %icmp = icmp sge i64 %x, 0 1366 br i1 %icmp, label %label1, label %label2 1367label1: 1368 ret i64 1 1369label2: 1370 ret i64 0 1371} 1372 1373;SLT 1374define i64 @brRR_i64_slt(i64 %x, i64 %y) { 1375; CHECK-LABEL: brRR_i64_slt: 1376; CHECK: # %bb.0: # %entry 1377; CHECK-NEXT: .cfi_def_cfa_offset 0 1378; CHECK-NEXT: subi16 sp, sp, 12 1379; CHECK-NEXT: .cfi_def_cfa_offset 12 1380; CHECK-NEXT: cmphs16 a2, a0 1381; CHECK-NEXT: mvc32 a0 1382; CHECK-NEXT: st16.w a0, (sp, 4) 1383; CHECK-NEXT: cmpne16 a3, a1 1384; CHECK-NEXT: mvc32 a0 1385; CHECK-NEXT: st16.w a0, (sp, 8) 1386; CHECK-NEXT: cmplt16 a3, a1 1387; CHECK-NEXT: mvcv16 a0 1388; CHECK-NEXT: ld16.w a1, (sp, 4) 1389; CHECK-NEXT: btsti32 a1, 0 1390; CHECK-NEXT: mvc32 a1 1391; CHECK-NEXT: ld16.w a2, (sp, 8) 1392; CHECK-NEXT: btsti32 a2, 0 1393; CHECK-NEXT: movf32 a0, a1 1394; CHECK-NEXT: btsti32 a0, 0 1395; CHECK-NEXT: bt32 .LBB51_2 1396; CHECK-NEXT: # %bb.1: # %label1 1397; CHECK-NEXT: movi16 a0, 1 1398; CHECK-NEXT: br32 .LBB51_3 1399; CHECK-NEXT: .LBB51_2: # %label2 1400; CHECK-NEXT: movi16 a0, 0 1401; CHECK-NEXT: .LBB51_3: # %label1 1402; CHECK-NEXT: movi16 a1, 0 1403; CHECK-NEXT: addi16 sp, sp, 12 1404; CHECK-NEXT: rts16 1405; CHECK-UGTXT: icmpu32 a0, a1, a0 1406; CHECK-UGTXT: rts16 1407entry: 1408 %icmp = icmp slt i64 %y, %x 1409 br i1 %icmp, label %label1, label %label2 1410label1: 1411 ret i64 1 1412label2: 1413 ret i64 0 1414} 1415 1416define i64 @brRI_i64_slt(i64 %x) { 1417; CHECK-LABEL: brRI_i64_slt: 1418; CHECK: # %bb.0: # %entry 1419; CHECK-NEXT: .cfi_def_cfa_offset 0 1420; CHECK-NEXT: subi16 sp, sp, 12 1421; CHECK-NEXT: .cfi_def_cfa_offset 12 1422; CHECK-NEXT: movi16 a2, 0 1423; CHECK-NEXT: cmplt16 a2, a1 1424; CHECK-NEXT: mvc32 a2 1425; CHECK-NEXT: st16.w a2, (sp, 8) 1426; CHECK-NEXT: movi16 a2, 9 1427; CHECK-NEXT: cmphs16 a2, a0 1428; CHECK-NEXT: mvcv16 a0 1429; CHECK-NEXT: cmpnei16 a1, 0 1430; CHECK-NEXT: mvc32 a1 1431; CHECK-NEXT: st16.w a1, (sp, 4) 1432; CHECK-NEXT: ld16.w a1, (sp, 8) 1433; CHECK-NEXT: btsti32 a1, 0 1434; CHECK-NEXT: mvc32 a1 1435; CHECK-NEXT: ld16.w a2, (sp, 4) 1436; CHECK-NEXT: btsti32 a2, 0 1437; CHECK-NEXT: movf32 a1, a0 1438; CHECK-NEXT: btsti32 a1, 0 1439; CHECK-NEXT: bt32 .LBB52_2 1440; CHECK-NEXT: # %bb.1: # %label1 1441; CHECK-NEXT: movi16 a0, 1 1442; CHECK-NEXT: br32 .LBB52_3 1443; CHECK-NEXT: .LBB52_2: # %label2 1444; CHECK-NEXT: movi16 a0, 0 1445; CHECK-NEXT: .LBB52_3: # %label1 1446; CHECK-NEXT: movi16 a1, 0 1447; CHECK-NEXT: addi16 sp, sp, 12 1448; CHECK-NEXT: rts16 1449; CHECK-UGTXT: icmpu32 a0, a1, a0 1450; CHECK-UGTXT: rts16 1451entry: 1452 %icmp = icmp slt i64 %x, 10 1453 br i1 %icmp, label %label1, label %label2 1454label1: 1455 ret i64 1 1456label2: 1457 ret i64 0 1458} 1459 1460define i64 @brR0_i64_slt(i64 %x) { 1461; CHECK-LABEL: brR0_i64_slt: 1462; CHECK: # %bb.0: # %entry 1463; CHECK-NEXT: movih32 a0, 65535 1464; CHECK-NEXT: ori32 a0, a0, 65535 1465; CHECK-NEXT: cmplt16 a0, a1 1466; CHECK-NEXT: bf32 .LBB53_2 1467; CHECK-NEXT: # %bb.1: # %label2 1468; CHECK-NEXT: movi16 a0, 0 1469; CHECK-NEXT: movi16 a1, 0 1470; CHECK-NEXT: rts16 1471; CHECK-NEXT: .LBB53_2: # %label1 1472; CHECK-NEXT: movi16 a0, 1 1473; CHECK-NEXT: movi16 a1, 0 1474; CHECK-NEXT: rts16 1475; CHECK-UGTXT: icmpu32 a0, a1, a0 1476; CHECK-UGTXT: rts16 1477entry: 1478 %icmp = icmp slt i64 %x, 0 1479 br i1 %icmp, label %label1, label %label2 1480label1: 1481 ret i64 1 1482label2: 1483 ret i64 0 1484} 1485 1486;SLE 1487define i64 @brRR_i64_sle(i64 %x, i64 %y) { 1488; CHECK-LABEL: brRR_i64_sle: 1489; CHECK: # %bb.0: # %entry 1490; CHECK-NEXT: .cfi_def_cfa_offset 0 1491; CHECK-NEXT: subi16 sp, sp, 12 1492; CHECK-NEXT: .cfi_def_cfa_offset 12 1493; CHECK-NEXT: cmplt16 a1, a3 1494; CHECK-NEXT: mvc32 t0 1495; CHECK-NEXT: st32.w t0, (sp, 4) 1496; CHECK-NEXT: cmpne16 a3, a1 1497; CHECK-NEXT: mvc32 a1 1498; CHECK-NEXT: st16.w a1, (sp, 8) 1499; CHECK-NEXT: cmphs16 a0, a2 1500; CHECK-NEXT: mvcv16 a0 1501; CHECK-NEXT: ld16.w a1, (sp, 4) 1502; CHECK-NEXT: btsti32 a1, 0 1503; CHECK-NEXT: mvc32 a1 1504; CHECK-NEXT: ld16.w a2, (sp, 8) 1505; CHECK-NEXT: btsti32 a2, 0 1506; CHECK-NEXT: movf32 a1, a0 1507; CHECK-NEXT: btsti32 a1, 0 1508; CHECK-NEXT: bt32 .LBB54_2 1509; CHECK-NEXT: # %bb.1: # %label1 1510; CHECK-NEXT: movi16 a0, 1 1511; CHECK-NEXT: br32 .LBB54_3 1512; CHECK-NEXT: .LBB54_2: # %label2 1513; CHECK-NEXT: movi16 a0, 0 1514; CHECK-NEXT: .LBB54_3: # %label1 1515; CHECK-NEXT: movi16 a1, 0 1516; CHECK-NEXT: addi16 sp, sp, 12 1517; CHECK-NEXT: rts16 1518; CHECK-UGTXT: icmpu32 a0, a1, a0 1519; CHECK-UGTXT: rts16 1520entry: 1521 %icmp = icmp sle i64 %y, %x 1522 br i1 %icmp, label %label1, label %label2 1523label1: 1524 ret i64 1 1525label2: 1526 ret i64 0 1527} 1528 1529define i64 @brRI_i64_sle(i64 %x) { 1530; CHECK-LABEL: brRI_i64_sle: 1531; CHECK: # %bb.0: # %entry 1532; CHECK-NEXT: .cfi_def_cfa_offset 0 1533; CHECK-NEXT: subi16 sp, sp, 12 1534; CHECK-NEXT: .cfi_def_cfa_offset 12 1535; CHECK-NEXT: movi16 a2, 0 1536; CHECK-NEXT: cmplt16 a2, a1 1537; CHECK-NEXT: mvc32 a2 1538; CHECK-NEXT: st16.w a2, (sp, 8) 1539; CHECK-NEXT: movi16 a2, 10 1540; CHECK-NEXT: cmphs16 a2, a0 1541; CHECK-NEXT: mvcv16 a0 1542; CHECK-NEXT: cmpnei16 a1, 0 1543; CHECK-NEXT: mvc32 a1 1544; CHECK-NEXT: st16.w a1, (sp, 4) 1545; CHECK-NEXT: ld16.w a1, (sp, 8) 1546; CHECK-NEXT: btsti32 a1, 0 1547; CHECK-NEXT: mvc32 a1 1548; CHECK-NEXT: ld16.w a2, (sp, 4) 1549; CHECK-NEXT: btsti32 a2, 0 1550; CHECK-NEXT: movf32 a1, a0 1551; CHECK-NEXT: btsti32 a1, 0 1552; CHECK-NEXT: bt32 .LBB55_2 1553; CHECK-NEXT: # %bb.1: # %label1 1554; CHECK-NEXT: movi16 a0, 1 1555; CHECK-NEXT: br32 .LBB55_3 1556; CHECK-NEXT: .LBB55_2: # %label2 1557; CHECK-NEXT: movi16 a0, 0 1558; CHECK-NEXT: .LBB55_3: # %label1 1559; CHECK-NEXT: movi16 a1, 0 1560; CHECK-NEXT: addi16 sp, sp, 12 1561; CHECK-NEXT: rts16 1562; CHECK-UGTXT: icmpu32 a0, a1, a0 1563; CHECK-UGTXT: rts16 1564entry: 1565 %icmp = icmp sle i64 %x, 10 1566 br i1 %icmp, label %label1, label %label2 1567label1: 1568 ret i64 1 1569label2: 1570 ret i64 0 1571} 1572 1573define i64 @brR0_i64_sle(i64 %x) { 1574; CHECK-LABEL: brR0_i64_sle: 1575; CHECK: # %bb.0: # %entry 1576; CHECK-NEXT: .cfi_def_cfa_offset 0 1577; CHECK-NEXT: subi16 sp, sp, 16 1578; CHECK-NEXT: .cfi_def_cfa_offset 16 1579; CHECK-NEXT: movi16 a2, 0 1580; CHECK-NEXT: cmplt16 a2, a1 1581; CHECK-NEXT: mvc32 a2 1582; CHECK-NEXT: st16.w a2, (sp, 12) 1583; CHECK-NEXT: cmpnei16 a0, 0 1584; CHECK-NEXT: mvc32 a0 1585; CHECK-NEXT: st16.w a0, (sp, 4) 1586; CHECK-NEXT: cmpnei16 a1, 0 1587; CHECK-NEXT: mvc32 a0 1588; CHECK-NEXT: st16.w a0, (sp, 8) 1589; CHECK-NEXT: ld16.w a0, (sp, 4) 1590; CHECK-NEXT: btsti32 a0, 0 1591; CHECK-NEXT: mvc32 a0 1592; CHECK-NEXT: ld16.w a1, (sp, 12) 1593; CHECK-NEXT: btsti32 a1, 0 1594; CHECK-NEXT: mvc32 a1 1595; CHECK-NEXT: ld16.w a2, (sp, 8) 1596; CHECK-NEXT: btsti32 a2, 0 1597; CHECK-NEXT: movf32 a1, a0 1598; CHECK-NEXT: btsti32 a1, 0 1599; CHECK-NEXT: bt32 .LBB56_2 1600; CHECK-NEXT: # %bb.1: # %label1 1601; CHECK-NEXT: movi16 a0, 1 1602; CHECK-NEXT: br32 .LBB56_3 1603; CHECK-NEXT: .LBB56_2: # %label2 1604; CHECK-NEXT: movi16 a0, 0 1605; CHECK-NEXT: .LBB56_3: # %label1 1606; CHECK-NEXT: movi16 a1, 0 1607; CHECK-NEXT: addi16 sp, sp, 16 1608; CHECK-NEXT: rts16 1609; CHECK-UGTXT: icmpu32 a0, a1, a0 1610; CHECK-UGTXT: rts16 1611entry: 1612 %icmp = icmp sle i64 %x, 0 1613 br i1 %icmp, label %label1, label %label2 1614label1: 1615 ret i64 1 1616label2: 1617 ret i64 0 1618} 1619 1620 1621define i64 @brCBit_i64(i1 %c) { 1622; CHECK-LABEL: brCBit_i64: 1623; CHECK: # %bb.0: # %entry 1624; CHECK-NEXT: andi32 a0, a0, 1 1625; CHECK-NEXT: bez32 a0, .LBB57_2 1626; CHECK-NEXT: # %bb.1: # %label1 1627; CHECK-NEXT: movi16 a0, 1 1628; CHECK-NEXT: movi16 a1, 0 1629; CHECK-NEXT: rts16 1630; CHECK-NEXT: .LBB57_2: # %label2 1631; CHECK-NEXT: movi16 a0, 0 1632; CHECK-NEXT: movi16 a1, 0 1633; CHECK-NEXT: rts16 1634entry: 1635 br i1 %c, label %label1, label %label2 1636label1: 1637 ret i64 1 1638label2: 1639 ret i64 0 1640} 1641 1642 1643;EQ 1644define i16 @brRR_i16_eq(i16 %x, i16 %y) { 1645; CHECK-LABEL: brRR_i16_eq: 1646; CHECK: # %bb.0: # %entry 1647; CHECK-NEXT: zexth16 a0, a0 1648; CHECK-NEXT: zexth16 a1, a1 1649; CHECK-NEXT: cmpne16 a1, a0 1650; CHECK-NEXT: bt32 .LBB58_2 1651; CHECK-NEXT: # %bb.1: # %label1 1652; CHECK-NEXT: movi16 a0, 1 1653; CHECK-NEXT: rts16 1654; CHECK-NEXT: .LBB58_2: # %label2 1655; CHECK-NEXT: movi16 a0, 0 1656; CHECK-NEXT: rts16 1657entry: 1658 %icmp = icmp eq i16 %y, %x 1659 br i1 %icmp, label %label1, label %label2 1660label1: 1661 ret i16 1 1662label2: 1663 ret i16 0 1664} 1665 1666define i16 @brRI_i16_eq(i16 %x) { 1667; CHECK-LABEL: brRI_i16_eq: 1668; CHECK: # %bb.0: # %entry 1669; CHECK-NEXT: zexth16 a0, a0 1670; CHECK-NEXT: cmpnei16 a0, 10 1671; CHECK-NEXT: bt32 .LBB59_2 1672; CHECK-NEXT: # %bb.1: # %label1 1673; CHECK-NEXT: movi16 a0, 1 1674; CHECK-NEXT: rts16 1675; CHECK-NEXT: .LBB59_2: # %label2 1676; CHECK-NEXT: movi16 a0, 0 1677; CHECK-NEXT: rts16 1678entry: 1679 %icmp = icmp eq i16 %x, 10 1680 br i1 %icmp, label %label1, label %label2 1681label1: 1682 ret i16 1 1683label2: 1684 ret i16 0 1685} 1686 1687define i16 @brR0_i16_eq(i16 %x) { 1688; CHECK-LABEL: brR0_i16_eq: 1689; CHECK: # %bb.0: # %entry 1690; CHECK-NEXT: zexth16 a0, a0 1691; CHECK-NEXT: bez32 a0, .LBB60_2 1692; CHECK-NEXT: # %bb.1: # %label2 1693; CHECK-NEXT: movi16 a0, 0 1694; CHECK-NEXT: rts16 1695; CHECK-NEXT: .LBB60_2: # %label1 1696; CHECK-NEXT: movi16 a0, 1 1697; CHECK-NEXT: rts16 1698entry: 1699 %icmp = icmp eq i16 %x, 0 1700 br i1 %icmp, label %label1, label %label2 1701label1: 1702 ret i16 1 1703label2: 1704 ret i16 0 1705} 1706 1707;NE 1708define i16 @brRR_i16_ne(i16 %x, i16 %y) { 1709; CHECK-LABEL: brRR_i16_ne: 1710; CHECK: # %bb.0: # %entry 1711; CHECK-NEXT: zexth16 a0, a0 1712; CHECK-NEXT: zexth16 a1, a1 1713; CHECK-NEXT: cmpne16 a1, a0 1714; CHECK-NEXT: bf32 .LBB61_2 1715; CHECK-NEXT: # %bb.1: # %label1 1716; CHECK-NEXT: movi16 a0, 1 1717; CHECK-NEXT: rts16 1718; CHECK-NEXT: .LBB61_2: # %label2 1719; CHECK-NEXT: movi16 a0, 0 1720; CHECK-NEXT: rts16 1721entry: 1722 %icmp = icmp ne i16 %y, %x 1723 br i1 %icmp, label %label1, label %label2 1724label1: 1725 ret i16 1 1726label2: 1727 ret i16 0 1728} 1729 1730define i16 @brRI_i16_ne(i16 %x) { 1731; CHECK-LABEL: brRI_i16_ne: 1732; CHECK: # %bb.0: # %entry 1733; CHECK-NEXT: zexth16 a0, a0 1734; CHECK-NEXT: cmpnei16 a0, 10 1735; CHECK-NEXT: bf32 .LBB62_2 1736; CHECK-NEXT: # %bb.1: # %label1 1737; CHECK-NEXT: movi16 a0, 1 1738; CHECK-NEXT: rts16 1739; CHECK-NEXT: .LBB62_2: # %label2 1740; CHECK-NEXT: movi16 a0, 0 1741; CHECK-NEXT: rts16 1742entry: 1743 %icmp = icmp ne i16 %x, 10 1744 br i1 %icmp, label %label1, label %label2 1745label1: 1746 ret i16 1 1747label2: 1748 ret i16 0 1749} 1750 1751define i16 @brR0_i16_ne(i16 %x) { 1752; CHECK-LABEL: brR0_i16_ne: 1753; CHECK: # %bb.0: # %entry 1754; CHECK-NEXT: zexth16 a0, a0 1755; CHECK-NEXT: bez32 a0, .LBB63_2 1756; CHECK-NEXT: # %bb.1: # %label1 1757; CHECK-NEXT: movi16 a0, 1 1758; CHECK-NEXT: rts16 1759; CHECK-NEXT: .LBB63_2: # %label2 1760; CHECK-NEXT: movi16 a0, 0 1761; CHECK-NEXT: rts16 1762entry: 1763 %icmp = icmp ne i16 %x, 0 1764 br i1 %icmp, label %label1, label %label2 1765label1: 1766 ret i16 1 1767label2: 1768 ret i16 0 1769} 1770 1771;UGT 1772define i16 @brRR_i16_ugt(i16 %x, i16 %y) { 1773; CHECK-LABEL: brRR_i16_ugt: 1774; CHECK: # %bb.0: # %entry 1775; CHECK-NEXT: zexth16 a1, a1 1776; CHECK-NEXT: zexth16 a0, a0 1777; CHECK-NEXT: cmphs16 a0, a1 1778; CHECK-NEXT: bt32 .LBB64_2 1779; CHECK-NEXT: # %bb.1: # %label1 1780; CHECK-NEXT: movi16 a0, 1 1781; CHECK-NEXT: rts16 1782; CHECK-NEXT: .LBB64_2: # %label2 1783; CHECK-NEXT: movi16 a0, 0 1784; CHECK-NEXT: rts16 1785; CHECK-UGTXT: icmpu32 a0, a1, a0 1786; CHECK-UGTXT: rts16 1787entry: 1788 %icmp = icmp ugt i16 %y, %x 1789 br i1 %icmp, label %label1, label %label2 1790label1: 1791 ret i16 1 1792label2: 1793 ret i16 0 1794} 1795 1796define i16 @brRI_i16_ugt(i16 %x) { 1797; CHECK-LABEL: brRI_i16_ugt: 1798; CHECK: # %bb.0: # %entry 1799; CHECK-NEXT: zexth16 a0, a0 1800; CHECK-NEXT: cmphsi16 a0, 11 1801; CHECK-NEXT: bf32 .LBB65_2 1802; CHECK-NEXT: # %bb.1: # %label1 1803; CHECK-NEXT: movi16 a0, 1 1804; CHECK-NEXT: rts16 1805; CHECK-NEXT: .LBB65_2: # %label2 1806; CHECK-NEXT: movi16 a0, 0 1807; CHECK-NEXT: rts16 1808; CHECK-UGTXT: icmpu32 a0, a1, a0 1809; CHECK-UGTXT: rts16 1810entry: 1811 %icmp = icmp ugt i16 %x, 10 1812 br i1 %icmp, label %label1, label %label2 1813label1: 1814 ret i16 1 1815label2: 1816 ret i16 0 1817} 1818 1819define i16 @brR0_i16_ugt(i16 %x) { 1820; CHECK-LABEL: brR0_i16_ugt: 1821; CHECK: # %bb.0: # %entry 1822; CHECK-NEXT: zexth16 a0, a0 1823; CHECK-NEXT: bez32 a0, .LBB66_2 1824; CHECK-NEXT: # %bb.1: # %label1 1825; CHECK-NEXT: movi16 a0, 1 1826; CHECK-NEXT: rts16 1827; CHECK-NEXT: .LBB66_2: # %label2 1828; CHECK-NEXT: movi16 a0, 0 1829; CHECK-NEXT: rts16 1830; CHECK-UGTXT: icmpu32 a0, a1, a0 1831; CHECK-UGTXT: rts16 1832entry: 1833 %icmp = icmp ugt i16 %x, 0 1834 br i1 %icmp, label %label1, label %label2 1835label1: 1836 ret i16 1 1837label2: 1838 ret i16 0 1839} 1840 1841;UGE 1842define i16 @brRR_i16_uge(i16 %x, i16 %y) { 1843; CHECK-LABEL: brRR_i16_uge: 1844; CHECK: # %bb.0: # %entry 1845; CHECK-NEXT: zexth16 a0, a0 1846; CHECK-NEXT: zexth16 a1, a1 1847; CHECK-NEXT: cmphs16 a1, a0 1848; CHECK-NEXT: bf32 .LBB67_2 1849; CHECK-NEXT: # %bb.1: # %label1 1850; CHECK-NEXT: movi16 a0, 1 1851; CHECK-NEXT: rts16 1852; CHECK-NEXT: .LBB67_2: # %label2 1853; CHECK-NEXT: movi16 a0, 0 1854; CHECK-NEXT: rts16 1855; CHECK-UGTXT: icmpu32 a0, a1, a0 1856; CHECK-UGTXT: rts16 1857entry: 1858 %icmp = icmp uge i16 %y, %x 1859 br i1 %icmp, label %label1, label %label2 1860label1: 1861 ret i16 1 1862label2: 1863 ret i16 0 1864} 1865 1866define i16 @brRI_i16_uge(i16 %x) { 1867; CHECK-LABEL: brRI_i16_uge: 1868; CHECK: # %bb.0: # %entry 1869; CHECK-NEXT: zexth16 a0, a0 1870; CHECK-NEXT: cmphsi16 a0, 10 1871; CHECK-NEXT: bf32 .LBB68_2 1872; CHECK-NEXT: # %bb.1: # %label1 1873; CHECK-NEXT: movi16 a0, 1 1874; CHECK-NEXT: rts16 1875; CHECK-NEXT: .LBB68_2: # %label2 1876; CHECK-NEXT: movi16 a0, 0 1877; CHECK-NEXT: rts16 1878; CHECK-UGTXT: icmpu32 a0, a1, a0 1879; CHECK-UGTXT: rts16 1880entry: 1881 %icmp = icmp uge i16 %x, 10 1882 br i1 %icmp, label %label1, label %label2 1883label1: 1884 ret i16 1 1885label2: 1886 ret i16 0 1887} 1888 1889;ULT 1890define i16 @brRR_i16_ult(i16 %x, i16 %y) { 1891; CHECK-LABEL: brRR_i16_ult: 1892; CHECK: # %bb.0: # %entry 1893; CHECK-NEXT: zexth16 a0, a0 1894; CHECK-NEXT: zexth16 a1, a1 1895; CHECK-NEXT: cmphs16 a1, a0 1896; CHECK-NEXT: bt32 .LBB69_2 1897; CHECK-NEXT: # %bb.1: # %label1 1898; CHECK-NEXT: movi16 a0, 1 1899; CHECK-NEXT: rts16 1900; CHECK-NEXT: .LBB69_2: # %label2 1901; CHECK-NEXT: movi16 a0, 0 1902; CHECK-NEXT: rts16 1903; CHECK-UGTXT: icmpu32 a0, a1, a0 1904; CHECK-UGTXT: rts16 1905entry: 1906 %icmp = icmp ult i16 %y, %x 1907 br i1 %icmp, label %label1, label %label2 1908label1: 1909 ret i16 1 1910label2: 1911 ret i16 0 1912} 1913 1914define i16 @brRI_i16_ult(i16 %x) { 1915; CHECK-LABEL: brRI_i16_ult: 1916; CHECK: # %bb.0: # %entry 1917; CHECK-NEXT: zexth16 a0, a0 1918; CHECK-NEXT: movi16 a1, 9 1919; CHECK-NEXT: cmphs16 a1, a0 1920; CHECK-NEXT: bf32 .LBB70_2 1921; CHECK-NEXT: # %bb.1: # %label1 1922; CHECK-NEXT: movi16 a0, 1 1923; CHECK-NEXT: rts16 1924; CHECK-NEXT: .LBB70_2: # %label2 1925; CHECK-NEXT: movi16 a0, 0 1926; CHECK-NEXT: rts16 1927; CHECK-UGTXT: icmpu32 a0, a1, a0 1928; CHECK-UGTXT: rts16 1929entry: 1930 %icmp = icmp ult i16 %x, 10 1931 br i1 %icmp, label %label1, label %label2 1932label1: 1933 ret i16 1 1934label2: 1935 ret i16 0 1936} 1937 1938 1939;ULE 1940define i16 @brRR_i16_ule(i16 %x, i16 %y) { 1941; CHECK-LABEL: brRR_i16_ule: 1942; CHECK: # %bb.0: # %entry 1943; CHECK-NEXT: zexth16 a1, a1 1944; CHECK-NEXT: zexth16 a0, a0 1945; CHECK-NEXT: cmphs16 a0, a1 1946; CHECK-NEXT: bf32 .LBB71_2 1947; CHECK-NEXT: # %bb.1: # %label1 1948; CHECK-NEXT: movi16 a0, 1 1949; CHECK-NEXT: rts16 1950; CHECK-NEXT: .LBB71_2: # %label2 1951; CHECK-NEXT: movi16 a0, 0 1952; CHECK-NEXT: rts16 1953; CHECK-UGTXT: icmpu32 a0, a1, a0 1954; CHECK-UGTXT: rts16 1955entry: 1956 %icmp = icmp ule i16 %y, %x 1957 br i1 %icmp, label %label1, label %label2 1958label1: 1959 ret i16 1 1960label2: 1961 ret i16 0 1962} 1963 1964define i16 @brRI_i16_ule(i16 %x) { 1965; CHECK-LABEL: brRI_i16_ule: 1966; CHECK: # %bb.0: # %entry 1967; CHECK-NEXT: zexth16 a0, a0 1968; CHECK-NEXT: movi16 a1, 10 1969; CHECK-NEXT: cmphs16 a1, a0 1970; CHECK-NEXT: bf32 .LBB72_2 1971; CHECK-NEXT: # %bb.1: # %label1 1972; CHECK-NEXT: movi16 a0, 1 1973; CHECK-NEXT: rts16 1974; CHECK-NEXT: .LBB72_2: # %label2 1975; CHECK-NEXT: movi16 a0, 0 1976; CHECK-NEXT: rts16 1977; CHECK-UGTXT: icmpu32 a0, a1, a0 1978; CHECK-UGTXT: rts16 1979entry: 1980 %icmp = icmp ule i16 %x, 10 1981 br i1 %icmp, label %label1, label %label2 1982label1: 1983 ret i16 1 1984label2: 1985 ret i16 0 1986} 1987 1988define i16 @brR0_i16_ule(i16 %x) { 1989; CHECK-LABEL: brR0_i16_ule: 1990; CHECK: # %bb.0: # %entry 1991; CHECK-NEXT: zexth16 a0, a0 1992; CHECK-NEXT: bnez32 a0, .LBB73_2 1993; CHECK-NEXT: # %bb.1: # %label1 1994; CHECK-NEXT: movi16 a0, 1 1995; CHECK-NEXT: rts16 1996; CHECK-NEXT: .LBB73_2: # %label2 1997; CHECK-NEXT: movi16 a0, 0 1998; CHECK-NEXT: rts16 1999; CHECK-UGTXT: icmpu32 a0, a1, a0 2000; CHECK-UGTXT: rts16 2001entry: 2002 %icmp = icmp ule i16 %x, 0 2003 br i1 %icmp, label %label1, label %label2 2004label1: 2005 ret i16 1 2006label2: 2007 ret i16 0 2008} 2009 2010;SGT 2011define i16 @brRR_i16_sgt(i16 %x, i16 %y) { 2012; CHECK-LABEL: brRR_i16_sgt: 2013; CHECK: # %bb.0: # %entry 2014; CHECK-NEXT: sexth16 a1, a1 2015; CHECK-NEXT: sexth16 a0, a0 2016; CHECK-NEXT: cmplt16 a0, a1 2017; CHECK-NEXT: bf32 .LBB74_2 2018; CHECK-NEXT: # %bb.1: # %label1 2019; CHECK-NEXT: movi16 a0, 1 2020; CHECK-NEXT: rts16 2021; CHECK-NEXT: .LBB74_2: # %label2 2022; CHECK-NEXT: movi16 a0, 0 2023; CHECK-NEXT: rts16 2024; CHECK-UGTXT: icmpu32 a0, a1, a0 2025; CHECK-UGTXT: rts16 2026entry: 2027 %icmp = icmp sgt i16 %y, %x 2028 br i1 %icmp, label %label1, label %label2 2029label1: 2030 ret i16 1 2031label2: 2032 ret i16 0 2033} 2034 2035define i16 @brRI_i16_sgt(i16 %x) { 2036; CHECK-LABEL: brRI_i16_sgt: 2037; CHECK: # %bb.0: # %entry 2038; CHECK-NEXT: sexth16 a0, a0 2039; CHECK-NEXT: cmplti16 a0, 11 2040; CHECK-NEXT: bt32 .LBB75_2 2041; CHECK-NEXT: # %bb.1: # %label1 2042; CHECK-NEXT: movi16 a0, 1 2043; CHECK-NEXT: rts16 2044; CHECK-NEXT: .LBB75_2: # %label2 2045; CHECK-NEXT: movi16 a0, 0 2046; CHECK-NEXT: rts16 2047; CHECK-UGTXT: icmpu32 a0, a1, a0 2048; CHECK-UGTXT: rts16 2049entry: 2050 %icmp = icmp sgt i16 %x, 10 2051 br i1 %icmp, label %label1, label %label2 2052label1: 2053 ret i16 1 2054label2: 2055 ret i16 0 2056} 2057 2058define i16 @brR0_i16_sgt(i16 %x) { 2059; CHECK-LABEL: brR0_i16_sgt: 2060; CHECK: # %bb.0: # %entry 2061; CHECK-NEXT: sexth16 a0, a0 2062; CHECK-NEXT: cmplti16 a0, 1 2063; CHECK-NEXT: bt32 .LBB76_2 2064; CHECK-NEXT: # %bb.1: # %label1 2065; CHECK-NEXT: movi16 a0, 1 2066; CHECK-NEXT: rts16 2067; CHECK-NEXT: .LBB76_2: # %label2 2068; CHECK-NEXT: movi16 a0, 0 2069; CHECK-NEXT: rts16 2070; CHECK-UGTXT: icmpu32 a0, a1, a0 2071; CHECK-UGTXT: rts16 2072entry: 2073 %icmp = icmp sgt i16 %x, 0 2074 br i1 %icmp, label %label1, label %label2 2075label1: 2076 ret i16 1 2077label2: 2078 ret i16 0 2079} 2080 2081;SGE 2082define i16 @brRR_i16_sge(i16 %x, i16 %y) { 2083; CHECK-LABEL: brRR_i16_sge: 2084; CHECK: # %bb.0: # %entry 2085; CHECK-NEXT: sexth16 a0, a0 2086; CHECK-NEXT: sexth16 a1, a1 2087; CHECK-NEXT: cmplt16 a1, a0 2088; CHECK-NEXT: bt32 .LBB77_2 2089; CHECK-NEXT: # %bb.1: # %label1 2090; CHECK-NEXT: movi16 a0, 1 2091; CHECK-NEXT: rts16 2092; CHECK-NEXT: .LBB77_2: # %label2 2093; CHECK-NEXT: movi16 a0, 0 2094; CHECK-NEXT: rts16 2095; CHECK-UGTXT: icmpu32 a0, a1, a0 2096; CHECK-UGTXT: rts16 2097entry: 2098 %icmp = icmp sge i16 %y, %x 2099 br i1 %icmp, label %label1, label %label2 2100label1: 2101 ret i16 1 2102label2: 2103 ret i16 0 2104} 2105 2106define i16 @brRI_i16_sge(i16 %x) { 2107; CHECK-LABEL: brRI_i16_sge: 2108; CHECK: # %bb.0: # %entry 2109; CHECK-NEXT: sexth16 a0, a0 2110; CHECK-NEXT: cmplti16 a0, 10 2111; CHECK-NEXT: bt32 .LBB78_2 2112; CHECK-NEXT: # %bb.1: # %label1 2113; CHECK-NEXT: movi16 a0, 1 2114; CHECK-NEXT: rts16 2115; CHECK-NEXT: .LBB78_2: # %label2 2116; CHECK-NEXT: movi16 a0, 0 2117; CHECK-NEXT: rts16 2118; CHECK-UGTXT: icmpu32 a0, a1, a0 2119; CHECK-UGTXT: rts16 2120entry: 2121 %icmp = icmp sge i16 %x, 10 2122 br i1 %icmp, label %label1, label %label2 2123label1: 2124 ret i16 1 2125label2: 2126 ret i16 0 2127} 2128 2129define i16 @brR0_i16_sge(i16 %x) { 2130; CHECK-LABEL: brR0_i16_sge: 2131; CHECK: # %bb.0: # %entry 2132; CHECK-NEXT: sexth16 a0, a0 2133; CHECK-NEXT: blz32 a0, .LBB79_2 2134; CHECK-NEXT: # %bb.1: # %label1 2135; CHECK-NEXT: movi16 a0, 1 2136; CHECK-NEXT: rts16 2137; CHECK-NEXT: .LBB79_2: # %label2 2138; CHECK-NEXT: movi16 a0, 0 2139; CHECK-NEXT: rts16 2140; CHECK-UGTXT: icmpu32 a0, a1, a0 2141; CHECK-UGTXT: rts16 2142entry: 2143 %icmp = icmp sge i16 %x, 0 2144 br i1 %icmp, label %label1, label %label2 2145label1: 2146 ret i16 1 2147label2: 2148 ret i16 0 2149} 2150 2151;SLT 2152define i16 @brRR_i16_slt(i16 %x, i16 %y) { 2153; CHECK-LABEL: brRR_i16_slt: 2154; CHECK: # %bb.0: # %entry 2155; CHECK-NEXT: sexth16 a0, a0 2156; CHECK-NEXT: sexth16 a1, a1 2157; CHECK-NEXT: cmplt16 a1, a0 2158; CHECK-NEXT: bf32 .LBB80_2 2159; CHECK-NEXT: # %bb.1: # %label1 2160; CHECK-NEXT: movi16 a0, 1 2161; CHECK-NEXT: rts16 2162; CHECK-NEXT: .LBB80_2: # %label2 2163; CHECK-NEXT: movi16 a0, 0 2164; CHECK-NEXT: rts16 2165; CHECK-UGTXT: icmpu32 a0, a1, a0 2166; CHECK-UGTXT: rts16 2167entry: 2168 %icmp = icmp slt i16 %y, %x 2169 br i1 %icmp, label %label1, label %label2 2170label1: 2171 ret i16 1 2172label2: 2173 ret i16 0 2174} 2175 2176define i16 @brRI_i16_slt(i16 %x) { 2177; CHECK-LABEL: brRI_i16_slt: 2178; CHECK: # %bb.0: # %entry 2179; CHECK-NEXT: sexth16 a0, a0 2180; CHECK-NEXT: movi16 a1, 9 2181; CHECK-NEXT: cmplt16 a1, a0 2182; CHECK-NEXT: bt32 .LBB81_2 2183; CHECK-NEXT: # %bb.1: # %label1 2184; CHECK-NEXT: movi16 a0, 1 2185; CHECK-NEXT: rts16 2186; CHECK-NEXT: .LBB81_2: # %label2 2187; CHECK-NEXT: movi16 a0, 0 2188; CHECK-NEXT: rts16 2189; CHECK-UGTXT: icmpu32 a0, a1, a0 2190; CHECK-UGTXT: rts16 2191entry: 2192 %icmp = icmp slt i16 %x, 10 2193 br i1 %icmp, label %label1, label %label2 2194label1: 2195 ret i16 1 2196label2: 2197 ret i16 0 2198} 2199 2200define i16 @brR0_i16_slt(i16 %x) { 2201; CHECK-LABEL: brR0_i16_slt: 2202; CHECK: # %bb.0: # %entry 2203; CHECK-NEXT: sexth16 a0, a0 2204; CHECK-NEXT: movih32 a1, 65535 2205; CHECK-NEXT: ori32 a1, a1, 65535 2206; CHECK-NEXT: cmplt16 a1, a0 2207; CHECK-NEXT: bf32 .LBB82_2 2208; CHECK-NEXT: # %bb.1: # %label2 2209; CHECK-NEXT: movi16 a0, 0 2210; CHECK-NEXT: rts16 2211; CHECK-NEXT: .LBB82_2: # %label1 2212; CHECK-NEXT: movi16 a0, 1 2213; CHECK-NEXT: rts16 2214; CHECK-UGTXT: icmpu32 a0, a1, a0 2215; CHECK-UGTXT: rts16 2216entry: 2217 %icmp = icmp slt i16 %x, 0 2218 br i1 %icmp, label %label1, label %label2 2219label1: 2220 ret i16 1 2221label2: 2222 ret i16 0 2223} 2224 2225;SLE 2226define i16 @brRR_i16_sle(i16 %x, i16 %y) { 2227; CHECK-LABEL: brRR_i16_sle: 2228; CHECK: # %bb.0: # %entry 2229; CHECK-NEXT: sexth16 a1, a1 2230; CHECK-NEXT: sexth16 a0, a0 2231; CHECK-NEXT: cmplt16 a0, a1 2232; CHECK-NEXT: bt32 .LBB83_2 2233; CHECK-NEXT: # %bb.1: # %label1 2234; CHECK-NEXT: movi16 a0, 1 2235; CHECK-NEXT: rts16 2236; CHECK-NEXT: .LBB83_2: # %label2 2237; CHECK-NEXT: movi16 a0, 0 2238; CHECK-NEXT: rts16 2239; CHECK-UGTXT: icmpu32 a0, a1, a0 2240; CHECK-UGTXT: rts16 2241entry: 2242 %icmp = icmp sle i16 %y, %x 2243 br i1 %icmp, label %label1, label %label2 2244label1: 2245 ret i16 1 2246label2: 2247 ret i16 0 2248} 2249 2250define i16 @brRI_i16_sle(i16 %x) { 2251; CHECK-LABEL: brRI_i16_sle: 2252; CHECK: # %bb.0: # %entry 2253; CHECK-NEXT: sexth16 a0, a0 2254; CHECK-NEXT: movi16 a1, 10 2255; CHECK-NEXT: cmplt16 a1, a0 2256; CHECK-NEXT: bt32 .LBB84_2 2257; CHECK-NEXT: # %bb.1: # %label1 2258; CHECK-NEXT: movi16 a0, 1 2259; CHECK-NEXT: rts16 2260; CHECK-NEXT: .LBB84_2: # %label2 2261; CHECK-NEXT: movi16 a0, 0 2262; CHECK-NEXT: rts16 2263; CHECK-UGTXT: icmpu32 a0, a1, a0 2264; CHECK-UGTXT: rts16 2265entry: 2266 %icmp = icmp sle i16 %x, 10 2267 br i1 %icmp, label %label1, label %label2 2268label1: 2269 ret i16 1 2270label2: 2271 ret i16 0 2272} 2273 2274define i16 @brR0_i16_sle(i16 %x) { 2275; CHECK-LABEL: brR0_i16_sle: 2276; CHECK: # %bb.0: # %entry 2277; CHECK-NEXT: sexth16 a0, a0 2278; CHECK-NEXT: bhz32 a0, .LBB85_2 2279; CHECK-NEXT: # %bb.1: # %label1 2280; CHECK-NEXT: movi16 a0, 1 2281; CHECK-NEXT: rts16 2282; CHECK-NEXT: .LBB85_2: # %label2 2283; CHECK-NEXT: movi16 a0, 0 2284; CHECK-NEXT: rts16 2285; CHECK-UGTXT: icmpu32 a0, a1, a0 2286; CHECK-UGTXT: rts16 2287entry: 2288 %icmp = icmp sle i16 %x, 0 2289 br i1 %icmp, label %label1, label %label2 2290label1: 2291 ret i16 1 2292label2: 2293 ret i16 0 2294} 2295 2296 2297define i16 @brCBit_i16(i1 %c) { 2298; CHECK-LABEL: brCBit_i16: 2299; CHECK: # %bb.0: # %entry 2300; CHECK-NEXT: andi32 a0, a0, 1 2301; CHECK-NEXT: bez32 a0, .LBB86_2 2302; CHECK-NEXT: # %bb.1: # %label1 2303; CHECK-NEXT: movi16 a0, 1 2304; CHECK-NEXT: rts16 2305; CHECK-NEXT: .LBB86_2: # %label2 2306; CHECK-NEXT: movi16 a0, 0 2307; CHECK-NEXT: rts16 2308entry: 2309 br i1 %c, label %label1, label %label2 2310label1: 2311 ret i16 1 2312label2: 2313 ret i16 0 2314} 2315 2316 2317;EQ 2318define i8 @brRR_i8_eq(i8 %x, i8 %y) { 2319; CHECK-LABEL: brRR_i8_eq: 2320; CHECK: # %bb.0: # %entry 2321; CHECK-NEXT: zextb16 a0, a0 2322; CHECK-NEXT: zextb16 a1, a1 2323; CHECK-NEXT: cmpne16 a1, a0 2324; CHECK-NEXT: bt32 .LBB87_2 2325; CHECK-NEXT: # %bb.1: # %label1 2326; CHECK-NEXT: movi16 a0, 1 2327; CHECK-NEXT: rts16 2328; CHECK-NEXT: .LBB87_2: # %label2 2329; CHECK-NEXT: movi16 a0, 0 2330; CHECK-NEXT: rts16 2331entry: 2332 %icmp = icmp eq i8 %y, %x 2333 br i1 %icmp, label %label1, label %label2 2334label1: 2335 ret i8 1 2336label2: 2337 ret i8 0 2338} 2339 2340define i8 @brRI_i8_eq(i8 %x) { 2341; CHECK-LABEL: brRI_i8_eq: 2342; CHECK: # %bb.0: # %entry 2343; CHECK-NEXT: zextb16 a0, a0 2344; CHECK-NEXT: cmpnei16 a0, 10 2345; CHECK-NEXT: bt32 .LBB88_2 2346; CHECK-NEXT: # %bb.1: # %label1 2347; CHECK-NEXT: movi16 a0, 1 2348; CHECK-NEXT: rts16 2349; CHECK-NEXT: .LBB88_2: # %label2 2350; CHECK-NEXT: movi16 a0, 0 2351; CHECK-NEXT: rts16 2352entry: 2353 %icmp = icmp eq i8 %x, 10 2354 br i1 %icmp, label %label1, label %label2 2355label1: 2356 ret i8 1 2357label2: 2358 ret i8 0 2359} 2360 2361define i8 @brR0_i8_eq(i8 %x) { 2362; CHECK-LABEL: brR0_i8_eq: 2363; CHECK: # %bb.0: # %entry 2364; CHECK-NEXT: zextb16 a0, a0 2365; CHECK-NEXT: bez32 a0, .LBB89_2 2366; CHECK-NEXT: # %bb.1: # %label2 2367; CHECK-NEXT: movi16 a0, 0 2368; CHECK-NEXT: rts16 2369; CHECK-NEXT: .LBB89_2: # %label1 2370; CHECK-NEXT: movi16 a0, 1 2371; CHECK-NEXT: rts16 2372entry: 2373 %icmp = icmp eq i8 %x, 0 2374 br i1 %icmp, label %label1, label %label2 2375label1: 2376 ret i8 1 2377label2: 2378 ret i8 0 2379} 2380 2381;NE 2382define i8 @brRR_i8_ne(i8 %x, i8 %y) { 2383; CHECK-LABEL: brRR_i8_ne: 2384; CHECK: # %bb.0: # %entry 2385; CHECK-NEXT: zextb16 a0, a0 2386; CHECK-NEXT: zextb16 a1, a1 2387; CHECK-NEXT: cmpne16 a1, a0 2388; CHECK-NEXT: bf32 .LBB90_2 2389; CHECK-NEXT: # %bb.1: # %label1 2390; CHECK-NEXT: movi16 a0, 1 2391; CHECK-NEXT: rts16 2392; CHECK-NEXT: .LBB90_2: # %label2 2393; CHECK-NEXT: movi16 a0, 0 2394; CHECK-NEXT: rts16 2395entry: 2396 %icmp = icmp ne i8 %y, %x 2397 br i1 %icmp, label %label1, label %label2 2398label1: 2399 ret i8 1 2400label2: 2401 ret i8 0 2402} 2403 2404define i8 @brRI_i8_ne(i8 %x) { 2405; CHECK-LABEL: brRI_i8_ne: 2406; CHECK: # %bb.0: # %entry 2407; CHECK-NEXT: zextb16 a0, a0 2408; CHECK-NEXT: cmpnei16 a0, 10 2409; CHECK-NEXT: bf32 .LBB91_2 2410; CHECK-NEXT: # %bb.1: # %label1 2411; CHECK-NEXT: movi16 a0, 1 2412; CHECK-NEXT: rts16 2413; CHECK-NEXT: .LBB91_2: # %label2 2414; CHECK-NEXT: movi16 a0, 0 2415; CHECK-NEXT: rts16 2416entry: 2417 %icmp = icmp ne i8 %x, 10 2418 br i1 %icmp, label %label1, label %label2 2419label1: 2420 ret i8 1 2421label2: 2422 ret i8 0 2423} 2424 2425define i8 @brR0_i8_ne(i8 %x) { 2426; CHECK-LABEL: brR0_i8_ne: 2427; CHECK: # %bb.0: # %entry 2428; CHECK-NEXT: zextb16 a0, a0 2429; CHECK-NEXT: bez32 a0, .LBB92_2 2430; CHECK-NEXT: # %bb.1: # %label1 2431; CHECK-NEXT: movi16 a0, 1 2432; CHECK-NEXT: rts16 2433; CHECK-NEXT: .LBB92_2: # %label2 2434; CHECK-NEXT: movi16 a0, 0 2435; CHECK-NEXT: rts16 2436entry: 2437 %icmp = icmp ne i8 %x, 0 2438 br i1 %icmp, label %label1, label %label2 2439label1: 2440 ret i8 1 2441label2: 2442 ret i8 0 2443} 2444 2445;UGT 2446define i8 @brRR_i8_ugt(i8 %x, i8 %y) { 2447; CHECK-LABEL: brRR_i8_ugt: 2448; CHECK: # %bb.0: # %entry 2449; CHECK-NEXT: zextb16 a1, a1 2450; CHECK-NEXT: zextb16 a0, a0 2451; CHECK-NEXT: cmphs16 a0, a1 2452; CHECK-NEXT: bt32 .LBB93_2 2453; CHECK-NEXT: # %bb.1: # %label1 2454; CHECK-NEXT: movi16 a0, 1 2455; CHECK-NEXT: rts16 2456; CHECK-NEXT: .LBB93_2: # %label2 2457; CHECK-NEXT: movi16 a0, 0 2458; CHECK-NEXT: rts16 2459; CHECK-UGTXT: icmpu32 a0, a1, a0 2460; CHECK-UGTXT: rts16 2461entry: 2462 %icmp = icmp ugt i8 %y, %x 2463 br i1 %icmp, label %label1, label %label2 2464label1: 2465 ret i8 1 2466label2: 2467 ret i8 0 2468} 2469 2470define i8 @brRI_i8_ugt(i8 %x) { 2471; CHECK-LABEL: brRI_i8_ugt: 2472; CHECK: # %bb.0: # %entry 2473; CHECK-NEXT: zextb16 a0, a0 2474; CHECK-NEXT: cmphsi16 a0, 11 2475; CHECK-NEXT: bf32 .LBB94_2 2476; CHECK-NEXT: # %bb.1: # %label1 2477; CHECK-NEXT: movi16 a0, 1 2478; CHECK-NEXT: rts16 2479; CHECK-NEXT: .LBB94_2: # %label2 2480; CHECK-NEXT: movi16 a0, 0 2481; CHECK-NEXT: rts16 2482; CHECK-UGTXT: icmpu32 a0, a1, a0 2483; CHECK-UGTXT: rts16 2484entry: 2485 %icmp = icmp ugt i8 %x, 10 2486 br i1 %icmp, label %label1, label %label2 2487label1: 2488 ret i8 1 2489label2: 2490 ret i8 0 2491} 2492 2493define i8 @brR0_i8_ugt(i8 %x) { 2494; CHECK-LABEL: brR0_i8_ugt: 2495; CHECK: # %bb.0: # %entry 2496; CHECK-NEXT: zextb16 a0, a0 2497; CHECK-NEXT: bez32 a0, .LBB95_2 2498; CHECK-NEXT: # %bb.1: # %label1 2499; CHECK-NEXT: movi16 a0, 1 2500; CHECK-NEXT: rts16 2501; CHECK-NEXT: .LBB95_2: # %label2 2502; CHECK-NEXT: movi16 a0, 0 2503; CHECK-NEXT: rts16 2504; CHECK-UGTXT: icmpu32 a0, a1, a0 2505; CHECK-UGTXT: rts16 2506entry: 2507 %icmp = icmp ugt i8 %x, 0 2508 br i1 %icmp, label %label1, label %label2 2509label1: 2510 ret i8 1 2511label2: 2512 ret i8 0 2513} 2514 2515;UGE 2516define i8 @brRR_i8_uge(i8 %x, i8 %y) { 2517; CHECK-LABEL: brRR_i8_uge: 2518; CHECK: # %bb.0: # %entry 2519; CHECK-NEXT: zextb16 a0, a0 2520; CHECK-NEXT: zextb16 a1, a1 2521; CHECK-NEXT: cmphs16 a1, a0 2522; CHECK-NEXT: bf32 .LBB96_2 2523; CHECK-NEXT: # %bb.1: # %label1 2524; CHECK-NEXT: movi16 a0, 1 2525; CHECK-NEXT: rts16 2526; CHECK-NEXT: .LBB96_2: # %label2 2527; CHECK-NEXT: movi16 a0, 0 2528; CHECK-NEXT: rts16 2529; CHECK-UGTXT: icmpu32 a0, a1, a0 2530; CHECK-UGTXT: rts16 2531entry: 2532 %icmp = icmp uge i8 %y, %x 2533 br i1 %icmp, label %label1, label %label2 2534label1: 2535 ret i8 1 2536label2: 2537 ret i8 0 2538} 2539 2540define i8 @brRI_i8_uge(i8 %x) { 2541; CHECK-LABEL: brRI_i8_uge: 2542; CHECK: # %bb.0: # %entry 2543; CHECK-NEXT: zextb16 a0, a0 2544; CHECK-NEXT: cmphsi16 a0, 10 2545; CHECK-NEXT: bf32 .LBB97_2 2546; CHECK-NEXT: # %bb.1: # %label1 2547; CHECK-NEXT: movi16 a0, 1 2548; CHECK-NEXT: rts16 2549; CHECK-NEXT: .LBB97_2: # %label2 2550; CHECK-NEXT: movi16 a0, 0 2551; CHECK-NEXT: rts16 2552; CHECK-UGTXT: icmpu32 a0, a1, a0 2553; CHECK-UGTXT: rts16 2554entry: 2555 %icmp = icmp uge i8 %x, 10 2556 br i1 %icmp, label %label1, label %label2 2557label1: 2558 ret i8 1 2559label2: 2560 ret i8 0 2561} 2562 2563;ULT 2564define i8 @brRR_i8_ult(i8 %x, i8 %y) { 2565; CHECK-LABEL: brRR_i8_ult: 2566; CHECK: # %bb.0: # %entry 2567; CHECK-NEXT: zextb16 a0, a0 2568; CHECK-NEXT: zextb16 a1, a1 2569; CHECK-NEXT: cmphs16 a1, a0 2570; CHECK-NEXT: bt32 .LBB98_2 2571; CHECK-NEXT: # %bb.1: # %label1 2572; CHECK-NEXT: movi16 a0, 1 2573; CHECK-NEXT: rts16 2574; CHECK-NEXT: .LBB98_2: # %label2 2575; CHECK-NEXT: movi16 a0, 0 2576; CHECK-NEXT: rts16 2577; CHECK-UGTXT: icmpu32 a0, a1, a0 2578; CHECK-UGTXT: rts16 2579entry: 2580 %icmp = icmp ult i8 %y, %x 2581 br i1 %icmp, label %label1, label %label2 2582label1: 2583 ret i8 1 2584label2: 2585 ret i8 0 2586} 2587 2588define i8 @brRI_i8_ult(i8 %x) { 2589; CHECK-LABEL: brRI_i8_ult: 2590; CHECK: # %bb.0: # %entry 2591; CHECK-NEXT: zextb16 a0, a0 2592; CHECK-NEXT: movi16 a1, 9 2593; CHECK-NEXT: cmphs16 a1, a0 2594; CHECK-NEXT: bf32 .LBB99_2 2595; CHECK-NEXT: # %bb.1: # %label1 2596; CHECK-NEXT: movi16 a0, 1 2597; CHECK-NEXT: rts16 2598; CHECK-NEXT: .LBB99_2: # %label2 2599; CHECK-NEXT: movi16 a0, 0 2600; CHECK-NEXT: rts16 2601; CHECK-UGTXT: icmpu32 a0, a1, a0 2602; CHECK-UGTXT: rts16 2603entry: 2604 %icmp = icmp ult i8 %x, 10 2605 br i1 %icmp, label %label1, label %label2 2606label1: 2607 ret i8 1 2608label2: 2609 ret i8 0 2610} 2611 2612 2613;ULE 2614define i8 @brRR_i8_ule(i8 %x, i8 %y) { 2615; CHECK-LABEL: brRR_i8_ule: 2616; CHECK: # %bb.0: # %entry 2617; CHECK-NEXT: zextb16 a1, a1 2618; CHECK-NEXT: zextb16 a0, a0 2619; CHECK-NEXT: cmphs16 a0, a1 2620; CHECK-NEXT: bf32 .LBB100_2 2621; CHECK-NEXT: # %bb.1: # %label1 2622; CHECK-NEXT: movi16 a0, 1 2623; CHECK-NEXT: rts16 2624; CHECK-NEXT: .LBB100_2: # %label2 2625; CHECK-NEXT: movi16 a0, 0 2626; CHECK-NEXT: rts16 2627; CHECK-UGTXT: icmpu32 a0, a1, a0 2628; CHECK-UGTXT: rts16 2629entry: 2630 %icmp = icmp ule i8 %y, %x 2631 br i1 %icmp, label %label1, label %label2 2632label1: 2633 ret i8 1 2634label2: 2635 ret i8 0 2636} 2637 2638define i8 @brRI_i8_ule(i8 %x) { 2639; CHECK-LABEL: brRI_i8_ule: 2640; CHECK: # %bb.0: # %entry 2641; CHECK-NEXT: zextb16 a0, a0 2642; CHECK-NEXT: movi16 a1, 10 2643; CHECK-NEXT: cmphs16 a1, a0 2644; CHECK-NEXT: bf32 .LBB101_2 2645; CHECK-NEXT: # %bb.1: # %label1 2646; CHECK-NEXT: movi16 a0, 1 2647; CHECK-NEXT: rts16 2648; CHECK-NEXT: .LBB101_2: # %label2 2649; CHECK-NEXT: movi16 a0, 0 2650; CHECK-NEXT: rts16 2651; CHECK-UGTXT: icmpu32 a0, a1, a0 2652; CHECK-UGTXT: rts16 2653entry: 2654 %icmp = icmp ule i8 %x, 10 2655 br i1 %icmp, label %label1, label %label2 2656label1: 2657 ret i8 1 2658label2: 2659 ret i8 0 2660} 2661 2662define i8 @brR0_i8_ule(i8 %x) { 2663; CHECK-LABEL: brR0_i8_ule: 2664; CHECK: # %bb.0: # %entry 2665; CHECK-NEXT: zextb16 a0, a0 2666; CHECK-NEXT: bnez32 a0, .LBB102_2 2667; CHECK-NEXT: # %bb.1: # %label1 2668; CHECK-NEXT: movi16 a0, 1 2669; CHECK-NEXT: rts16 2670; CHECK-NEXT: .LBB102_2: # %label2 2671; CHECK-NEXT: movi16 a0, 0 2672; CHECK-NEXT: rts16 2673; CHECK-UGTXT: icmpu32 a0, a1, a0 2674; CHECK-UGTXT: rts16 2675entry: 2676 %icmp = icmp ule i8 %x, 0 2677 br i1 %icmp, label %label1, label %label2 2678label1: 2679 ret i8 1 2680label2: 2681 ret i8 0 2682} 2683 2684;SGT 2685define i8 @brRR_i8_sgt(i8 %x, i8 %y) { 2686; CHECK-LABEL: brRR_i8_sgt: 2687; CHECK: # %bb.0: # %entry 2688; CHECK-NEXT: sextb16 a1, a1 2689; CHECK-NEXT: sextb16 a0, a0 2690; CHECK-NEXT: cmplt16 a0, a1 2691; CHECK-NEXT: bf32 .LBB103_2 2692; CHECK-NEXT: # %bb.1: # %label1 2693; CHECK-NEXT: movi16 a0, 1 2694; CHECK-NEXT: rts16 2695; CHECK-NEXT: .LBB103_2: # %label2 2696; CHECK-NEXT: movi16 a0, 0 2697; CHECK-NEXT: rts16 2698; CHECK-UGTXT: icmpu32 a0, a1, a0 2699; CHECK-UGTXT: rts16 2700entry: 2701 %icmp = icmp sgt i8 %y, %x 2702 br i1 %icmp, label %label1, label %label2 2703label1: 2704 ret i8 1 2705label2: 2706 ret i8 0 2707} 2708 2709define i8 @brRI_i8_sgt(i8 %x) { 2710; CHECK-LABEL: brRI_i8_sgt: 2711; CHECK: # %bb.0: # %entry 2712; CHECK-NEXT: sextb16 a0, a0 2713; CHECK-NEXT: cmplti16 a0, 11 2714; CHECK-NEXT: bt32 .LBB104_2 2715; CHECK-NEXT: # %bb.1: # %label1 2716; CHECK-NEXT: movi16 a0, 1 2717; CHECK-NEXT: rts16 2718; CHECK-NEXT: .LBB104_2: # %label2 2719; CHECK-NEXT: movi16 a0, 0 2720; CHECK-NEXT: rts16 2721; CHECK-UGTXT: icmpu32 a0, a1, a0 2722; CHECK-UGTXT: rts16 2723entry: 2724 %icmp = icmp sgt i8 %x, 10 2725 br i1 %icmp, label %label1, label %label2 2726label1: 2727 ret i8 1 2728label2: 2729 ret i8 0 2730} 2731 2732define i8 @brR0_i8_sgt(i8 %x) { 2733; CHECK-LABEL: brR0_i8_sgt: 2734; CHECK: # %bb.0: # %entry 2735; CHECK-NEXT: sextb16 a0, a0 2736; CHECK-NEXT: cmplti16 a0, 1 2737; CHECK-NEXT: bt32 .LBB105_2 2738; CHECK-NEXT: # %bb.1: # %label1 2739; CHECK-NEXT: movi16 a0, 1 2740; CHECK-NEXT: rts16 2741; CHECK-NEXT: .LBB105_2: # %label2 2742; CHECK-NEXT: movi16 a0, 0 2743; CHECK-NEXT: rts16 2744; CHECK-UGTXT: icmpu32 a0, a1, a0 2745; CHECK-UGTXT: rts16 2746entry: 2747 %icmp = icmp sgt i8 %x, 0 2748 br i1 %icmp, label %label1, label %label2 2749label1: 2750 ret i8 1 2751label2: 2752 ret i8 0 2753} 2754 2755;SGE 2756define i8 @brRR_i8_sge(i8 %x, i8 %y) { 2757; CHECK-LABEL: brRR_i8_sge: 2758; CHECK: # %bb.0: # %entry 2759; CHECK-NEXT: sextb16 a0, a0 2760; CHECK-NEXT: sextb16 a1, a1 2761; CHECK-NEXT: cmplt16 a1, a0 2762; CHECK-NEXT: bt32 .LBB106_2 2763; CHECK-NEXT: # %bb.1: # %label1 2764; CHECK-NEXT: movi16 a0, 1 2765; CHECK-NEXT: rts16 2766; CHECK-NEXT: .LBB106_2: # %label2 2767; CHECK-NEXT: movi16 a0, 0 2768; CHECK-NEXT: rts16 2769; CHECK-UGTXT: icmpu32 a0, a1, a0 2770; CHECK-UGTXT: rts16 2771entry: 2772 %icmp = icmp sge i8 %y, %x 2773 br i1 %icmp, label %label1, label %label2 2774label1: 2775 ret i8 1 2776label2: 2777 ret i8 0 2778} 2779 2780define i8 @brRI_i8_sge(i8 %x) { 2781; CHECK-LABEL: brRI_i8_sge: 2782; CHECK: # %bb.0: # %entry 2783; CHECK-NEXT: sextb16 a0, a0 2784; CHECK-NEXT: cmplti16 a0, 10 2785; CHECK-NEXT: bt32 .LBB107_2 2786; CHECK-NEXT: # %bb.1: # %label1 2787; CHECK-NEXT: movi16 a0, 1 2788; CHECK-NEXT: rts16 2789; CHECK-NEXT: .LBB107_2: # %label2 2790; CHECK-NEXT: movi16 a0, 0 2791; CHECK-NEXT: rts16 2792; CHECK-UGTXT: icmpu32 a0, a1, a0 2793; CHECK-UGTXT: rts16 2794entry: 2795 %icmp = icmp sge i8 %x, 10 2796 br i1 %icmp, label %label1, label %label2 2797label1: 2798 ret i8 1 2799label2: 2800 ret i8 0 2801} 2802 2803define i8 @brR0_i8_sge(i8 %x) { 2804; CHECK-LABEL: brR0_i8_sge: 2805; CHECK: # %bb.0: # %entry 2806; CHECK-NEXT: sextb16 a0, a0 2807; CHECK-NEXT: blz32 a0, .LBB108_2 2808; CHECK-NEXT: # %bb.1: # %label1 2809; CHECK-NEXT: movi16 a0, 1 2810; CHECK-NEXT: rts16 2811; CHECK-NEXT: .LBB108_2: # %label2 2812; CHECK-NEXT: movi16 a0, 0 2813; CHECK-NEXT: rts16 2814; CHECK-UGTXT: icmpu32 a0, a1, a0 2815; CHECK-UGTXT: rts16 2816entry: 2817 %icmp = icmp sge i8 %x, 0 2818 br i1 %icmp, label %label1, label %label2 2819label1: 2820 ret i8 1 2821label2: 2822 ret i8 0 2823} 2824 2825;SLT 2826define i8 @brRR_i8_slt(i8 %x, i8 %y) { 2827; CHECK-LABEL: brRR_i8_slt: 2828; CHECK: # %bb.0: # %entry 2829; CHECK-NEXT: sextb16 a0, a0 2830; CHECK-NEXT: sextb16 a1, a1 2831; CHECK-NEXT: cmplt16 a1, a0 2832; CHECK-NEXT: bf32 .LBB109_2 2833; CHECK-NEXT: # %bb.1: # %label1 2834; CHECK-NEXT: movi16 a0, 1 2835; CHECK-NEXT: rts16 2836; CHECK-NEXT: .LBB109_2: # %label2 2837; CHECK-NEXT: movi16 a0, 0 2838; CHECK-NEXT: rts16 2839; CHECK-UGTXT: icmpu32 a0, a1, a0 2840; CHECK-UGTXT: rts16 2841entry: 2842 %icmp = icmp slt i8 %y, %x 2843 br i1 %icmp, label %label1, label %label2 2844label1: 2845 ret i8 1 2846label2: 2847 ret i8 0 2848} 2849 2850define i8 @brRI_i8_slt(i8 %x) { 2851; CHECK-LABEL: brRI_i8_slt: 2852; CHECK: # %bb.0: # %entry 2853; CHECK-NEXT: sextb16 a0, a0 2854; CHECK-NEXT: movi16 a1, 9 2855; CHECK-NEXT: cmplt16 a1, a0 2856; CHECK-NEXT: bt32 .LBB110_2 2857; CHECK-NEXT: # %bb.1: # %label1 2858; CHECK-NEXT: movi16 a0, 1 2859; CHECK-NEXT: rts16 2860; CHECK-NEXT: .LBB110_2: # %label2 2861; CHECK-NEXT: movi16 a0, 0 2862; CHECK-NEXT: rts16 2863; CHECK-UGTXT: icmpu32 a0, a1, a0 2864; CHECK-UGTXT: rts16 2865entry: 2866 %icmp = icmp slt i8 %x, 10 2867 br i1 %icmp, label %label1, label %label2 2868label1: 2869 ret i8 1 2870label2: 2871 ret i8 0 2872} 2873 2874define i8 @brR0_i8_slt(i8 %x) { 2875; CHECK-LABEL: brR0_i8_slt: 2876; CHECK: # %bb.0: # %entry 2877; CHECK-NEXT: sextb16 a0, a0 2878; CHECK-NEXT: movih32 a1, 65535 2879; CHECK-NEXT: ori32 a1, a1, 65535 2880; CHECK-NEXT: cmplt16 a1, a0 2881; CHECK-NEXT: bf32 .LBB111_2 2882; CHECK-NEXT: # %bb.1: # %label2 2883; CHECK-NEXT: movi16 a0, 0 2884; CHECK-NEXT: rts16 2885; CHECK-NEXT: .LBB111_2: # %label1 2886; CHECK-NEXT: movi16 a0, 1 2887; CHECK-NEXT: rts16 2888; CHECK-UGTXT: icmpu32 a0, a1, a0 2889; CHECK-UGTXT: rts16 2890entry: 2891 %icmp = icmp slt i8 %x, 0 2892 br i1 %icmp, label %label1, label %label2 2893label1: 2894 ret i8 1 2895label2: 2896 ret i8 0 2897} 2898 2899;SLE 2900define i8 @brRR_i8_sle(i8 %x, i8 %y) { 2901; CHECK-LABEL: brRR_i8_sle: 2902; CHECK: # %bb.0: # %entry 2903; CHECK-NEXT: sextb16 a1, a1 2904; CHECK-NEXT: sextb16 a0, a0 2905; CHECK-NEXT: cmplt16 a0, a1 2906; CHECK-NEXT: bt32 .LBB112_2 2907; CHECK-NEXT: # %bb.1: # %label1 2908; CHECK-NEXT: movi16 a0, 1 2909; CHECK-NEXT: rts16 2910; CHECK-NEXT: .LBB112_2: # %label2 2911; CHECK-NEXT: movi16 a0, 0 2912; CHECK-NEXT: rts16 2913; CHECK-UGTXT: icmpu32 a0, a1, a0 2914; CHECK-UGTXT: rts16 2915entry: 2916 %icmp = icmp sle i8 %y, %x 2917 br i1 %icmp, label %label1, label %label2 2918label1: 2919 ret i8 1 2920label2: 2921 ret i8 0 2922} 2923 2924define i8 @brRI_i8_sle(i8 %x) { 2925; CHECK-LABEL: brRI_i8_sle: 2926; CHECK: # %bb.0: # %entry 2927; CHECK-NEXT: sextb16 a0, a0 2928; CHECK-NEXT: movi16 a1, 10 2929; CHECK-NEXT: cmplt16 a1, a0 2930; CHECK-NEXT: bt32 .LBB113_2 2931; CHECK-NEXT: # %bb.1: # %label1 2932; CHECK-NEXT: movi16 a0, 1 2933; CHECK-NEXT: rts16 2934; CHECK-NEXT: .LBB113_2: # %label2 2935; CHECK-NEXT: movi16 a0, 0 2936; CHECK-NEXT: rts16 2937; CHECK-UGTXT: icmpu32 a0, a1, a0 2938; CHECK-UGTXT: rts16 2939entry: 2940 %icmp = icmp sle i8 %x, 10 2941 br i1 %icmp, label %label1, label %label2 2942label1: 2943 ret i8 1 2944label2: 2945 ret i8 0 2946} 2947 2948define i8 @brR0_i8_sle(i8 %x) { 2949; CHECK-LABEL: brR0_i8_sle: 2950; CHECK: # %bb.0: # %entry 2951; CHECK-NEXT: sextb16 a0, a0 2952; CHECK-NEXT: bhz32 a0, .LBB114_2 2953; CHECK-NEXT: # %bb.1: # %label1 2954; CHECK-NEXT: movi16 a0, 1 2955; CHECK-NEXT: rts16 2956; CHECK-NEXT: .LBB114_2: # %label2 2957; CHECK-NEXT: movi16 a0, 0 2958; CHECK-NEXT: rts16 2959; CHECK-UGTXT: icmpu32 a0, a1, a0 2960; CHECK-UGTXT: rts16 2961entry: 2962 %icmp = icmp sle i8 %x, 0 2963 br i1 %icmp, label %label1, label %label2 2964label1: 2965 ret i8 1 2966label2: 2967 ret i8 0 2968} 2969 2970 2971define i8 @brCBit_i8(i1 %c) { 2972; CHECK-LABEL: brCBit_i8: 2973; CHECK: # %bb.0: # %entry 2974; CHECK-NEXT: andi32 a0, a0, 1 2975; CHECK-NEXT: bez32 a0, .LBB115_2 2976; CHECK-NEXT: # %bb.1: # %label1 2977; CHECK-NEXT: movi16 a0, 1 2978; CHECK-NEXT: rts16 2979; CHECK-NEXT: .LBB115_2: # %label2 2980; CHECK-NEXT: movi16 a0, 0 2981; CHECK-NEXT: rts16 2982entry: 2983 br i1 %c, label %label1, label %label2 2984label1: 2985 ret i8 1 2986label2: 2987 ret i8 0 2988} 2989 2990 2991;EQ 2992define i1 @brRR_i1_eq(i1 %x, i1 %y) { 2993; CHECK-LABEL: brRR_i1_eq: 2994; CHECK: # %bb.0: # %entry 2995; CHECK-NEXT: andi32 a0, a0, 1 2996; CHECK-NEXT: andi32 a1, a1, 1 2997; CHECK-NEXT: cmpne16 a1, a0 2998; CHECK-NEXT: bt32 .LBB116_2 2999; CHECK-NEXT: # %bb.1: # %label1 3000; CHECK-NEXT: movi16 a0, 1 3001; CHECK-NEXT: rts16 3002; CHECK-NEXT: .LBB116_2: # %label2 3003; CHECK-NEXT: movi16 a0, 0 3004; CHECK-NEXT: rts16 3005entry: 3006 %icmp = icmp eq i1 %y, %x 3007 br i1 %icmp, label %label1, label %label2 3008label1: 3009 ret i1 1 3010label2: 3011 ret i1 0 3012} 3013 3014define i1 @brRI_i1_eq(i1 %x) { 3015; CHECK-LABEL: brRI_i1_eq: 3016; CHECK: # %bb.0: # %entry 3017; CHECK-NEXT: andi32 a0, a0, 1 3018; CHECK-NEXT: bez32 a0, .LBB117_2 3019; CHECK-NEXT: # %bb.1: # %label2 3020; CHECK-NEXT: movi16 a0, 0 3021; CHECK-NEXT: rts16 3022; CHECK-NEXT: .LBB117_2: # %label1 3023; CHECK-NEXT: movi16 a0, 1 3024; CHECK-NEXT: rts16 3025entry: 3026 %icmp = icmp eq i1 %x, 10 3027 br i1 %icmp, label %label1, label %label2 3028label1: 3029 ret i1 1 3030label2: 3031 ret i1 0 3032} 3033 3034define i1 @brR0_i1_eq(i1 %x) { 3035; CHECK-LABEL: brR0_i1_eq: 3036; CHECK: # %bb.0: # %entry 3037; CHECK-NEXT: andi32 a0, a0, 1 3038; CHECK-NEXT: bez32 a0, .LBB118_2 3039; CHECK-NEXT: # %bb.1: # %label2 3040; CHECK-NEXT: movi16 a0, 0 3041; CHECK-NEXT: rts16 3042; CHECK-NEXT: .LBB118_2: # %label1 3043; CHECK-NEXT: movi16 a0, 1 3044; CHECK-NEXT: rts16 3045entry: 3046 %icmp = icmp eq i1 %x, 0 3047 br i1 %icmp, label %label1, label %label2 3048label1: 3049 ret i1 1 3050label2: 3051 ret i1 0 3052} 3053 3054;NE 3055define i1 @brRR_i1_ne(i1 %x, i1 %y) { 3056; CHECK-LABEL: brRR_i1_ne: 3057; CHECK: # %bb.0: # %entry 3058; CHECK-NEXT: andi32 a0, a0, 1 3059; CHECK-NEXT: andi32 a1, a1, 1 3060; CHECK-NEXT: cmpne16 a1, a0 3061; CHECK-NEXT: bf32 .LBB119_2 3062; CHECK-NEXT: # %bb.1: # %label1 3063; CHECK-NEXT: movi16 a0, 1 3064; CHECK-NEXT: rts16 3065; CHECK-NEXT: .LBB119_2: # %label2 3066; CHECK-NEXT: movi16 a0, 0 3067; CHECK-NEXT: rts16 3068entry: 3069 %icmp = icmp ne i1 %y, %x 3070 br i1 %icmp, label %label1, label %label2 3071label1: 3072 ret i1 1 3073label2: 3074 ret i1 0 3075} 3076 3077define i1 @brRI_i1_ne(i1 %x) { 3078; CHECK-LABEL: brRI_i1_ne: 3079; CHECK: # %bb.0: # %entry 3080; CHECK-NEXT: andi32 a0, a0, 1 3081; CHECK-NEXT: bez32 a0, .LBB120_2 3082; CHECK-NEXT: # %bb.1: # %label1 3083; CHECK-NEXT: movi16 a0, 1 3084; CHECK-NEXT: rts16 3085; CHECK-NEXT: .LBB120_2: # %label2 3086; CHECK-NEXT: movi16 a0, 0 3087; CHECK-NEXT: rts16 3088entry: 3089 %icmp = icmp ne i1 %x, 10 3090 br i1 %icmp, label %label1, label %label2 3091label1: 3092 ret i1 1 3093label2: 3094 ret i1 0 3095} 3096 3097define i1 @brR0_i1_ne(i1 %x) { 3098; CHECK-LABEL: brR0_i1_ne: 3099; CHECK: # %bb.0: # %entry 3100; CHECK-NEXT: andi32 a0, a0, 1 3101; CHECK-NEXT: bez32 a0, .LBB121_2 3102; CHECK-NEXT: # %bb.1: # %label1 3103; CHECK-NEXT: movi16 a0, 1 3104; CHECK-NEXT: rts16 3105; CHECK-NEXT: .LBB121_2: # %label2 3106; CHECK-NEXT: movi16 a0, 0 3107; CHECK-NEXT: rts16 3108entry: 3109 %icmp = icmp ne i1 %x, 0 3110 br i1 %icmp, label %label1, label %label2 3111label1: 3112 ret i1 1 3113label2: 3114 ret i1 0 3115} 3116 3117;UGT 3118define i1 @brRR_i1_ugt(i1 %x, i1 %y) { 3119; CHECK-LABEL: brRR_i1_ugt: 3120; CHECK: # %bb.0: # %entry 3121; CHECK-NEXT: andi32 a1, a1, 1 3122; CHECK-NEXT: andi32 a0, a0, 1 3123; CHECK-NEXT: cmphs16 a0, a1 3124; CHECK-NEXT: bt32 .LBB122_2 3125; CHECK-NEXT: # %bb.1: # %label1 3126; CHECK-NEXT: movi16 a0, 1 3127; CHECK-NEXT: rts16 3128; CHECK-NEXT: .LBB122_2: # %label2 3129; CHECK-NEXT: movi16 a0, 0 3130; CHECK-NEXT: rts16 3131; CHECK-UGTXT: icmpu32 a0, a1, a0 3132; CHECK-UGTXT: rts16 3133entry: 3134 %icmp = icmp ugt i1 %y, %x 3135 br i1 %icmp, label %label1, label %label2 3136label1: 3137 ret i1 1 3138label2: 3139 ret i1 0 3140} 3141 3142define i1 @brRI_i1_ugt(i1 %x) { 3143; CHECK-LABEL: brRI_i1_ugt: 3144; CHECK: # %bb.0: # %entry 3145; CHECK-NEXT: andi32 a0, a0, 1 3146; CHECK-NEXT: bez32 a0, .LBB123_2 3147; CHECK-NEXT: # %bb.1: # %label1 3148; CHECK-NEXT: movi16 a0, 1 3149; CHECK-NEXT: rts16 3150; CHECK-NEXT: .LBB123_2: # %label2 3151; CHECK-NEXT: movi16 a0, 0 3152; CHECK-NEXT: rts16 3153; CHECK-UGTXT: icmpu32 a0, a1, a0 3154; CHECK-UGTXT: rts16 3155entry: 3156 %icmp = icmp ugt i1 %x, 10 3157 br i1 %icmp, label %label1, label %label2 3158label1: 3159 ret i1 1 3160label2: 3161 ret i1 0 3162} 3163 3164define i1 @brR0_i1_ugt(i1 %x) { 3165; CHECK-LABEL: brR0_i1_ugt: 3166; CHECK: # %bb.0: # %entry 3167; CHECK-NEXT: andi32 a0, a0, 1 3168; CHECK-NEXT: bez32 a0, .LBB124_2 3169; CHECK-NEXT: # %bb.1: # %label1 3170; CHECK-NEXT: movi16 a0, 1 3171; CHECK-NEXT: rts16 3172; CHECK-NEXT: .LBB124_2: # %label2 3173; CHECK-NEXT: movi16 a0, 0 3174; CHECK-NEXT: rts16 3175; CHECK-UGTXT: icmpu32 a0, a1, a0 3176; CHECK-UGTXT: rts16 3177entry: 3178 %icmp = icmp ugt i1 %x, 0 3179 br i1 %icmp, label %label1, label %label2 3180label1: 3181 ret i1 1 3182label2: 3183 ret i1 0 3184} 3185 3186;UGE 3187define i1 @brRR_i1_uge(i1 %x, i1 %y) { 3188; CHECK-LABEL: brRR_i1_uge: 3189; CHECK: # %bb.0: # %entry 3190; CHECK-NEXT: andi32 a0, a0, 1 3191; CHECK-NEXT: andi32 a1, a1, 1 3192; CHECK-NEXT: cmphs16 a1, a0 3193; CHECK-NEXT: bf32 .LBB125_2 3194; CHECK-NEXT: # %bb.1: # %label1 3195; CHECK-NEXT: movi16 a0, 1 3196; CHECK-NEXT: rts16 3197; CHECK-NEXT: .LBB125_2: # %label2 3198; CHECK-NEXT: movi16 a0, 0 3199; CHECK-NEXT: rts16 3200; CHECK-UGTXT: icmpu32 a0, a1, a0 3201; CHECK-UGTXT: rts16 3202entry: 3203 %icmp = icmp uge i1 %y, %x 3204 br i1 %icmp, label %label1, label %label2 3205label1: 3206 ret i1 1 3207label2: 3208 ret i1 0 3209} 3210 3211define i1 @brRI_i1_uge(i1 %x) { 3212; CHECK-LABEL: brRI_i1_uge: 3213; CHECK: # %bb.0: # %entry 3214; CHECK-NEXT: movi16 a0, 0 3215; CHECK-NEXT: btsti32 a0, 0 3216; CHECK-NEXT: bt32 .LBB126_2 3217; CHECK-NEXT: # %bb.1: # %label1 3218; CHECK-NEXT: movi16 a0, 1 3219; CHECK-NEXT: rts16 3220; CHECK-NEXT: .LBB126_2: # %label2 3221; CHECK-NEXT: movi16 a0, 0 3222; CHECK-NEXT: rts16 3223; CHECK-UGTXT: icmpu32 a0, a1, a0 3224; CHECK-UGTXT: rts16 3225entry: 3226 %icmp = icmp uge i1 %x, 10 3227 br i1 %icmp, label %label1, label %label2 3228label1: 3229 ret i1 1 3230label2: 3231 ret i1 0 3232} 3233 3234;ULT 3235define i1 @brRR_i1_ult(i1 %x, i1 %y) { 3236; CHECK-LABEL: brRR_i1_ult: 3237; CHECK: # %bb.0: # %entry 3238; CHECK-NEXT: andi32 a0, a0, 1 3239; CHECK-NEXT: andi32 a1, a1, 1 3240; CHECK-NEXT: cmphs16 a1, a0 3241; CHECK-NEXT: bt32 .LBB127_2 3242; CHECK-NEXT: # %bb.1: # %label1 3243; CHECK-NEXT: movi16 a0, 1 3244; CHECK-NEXT: rts16 3245; CHECK-NEXT: .LBB127_2: # %label2 3246; CHECK-NEXT: movi16 a0, 0 3247; CHECK-NEXT: rts16 3248; CHECK-UGTXT: icmpu32 a0, a1, a0 3249; CHECK-UGTXT: rts16 3250entry: 3251 %icmp = icmp ult i1 %y, %x 3252 br i1 %icmp, label %label1, label %label2 3253label1: 3254 ret i1 1 3255label2: 3256 ret i1 0 3257} 3258 3259define i1 @brRI_i1_ult(i1 %x) { 3260; CHECK-LABEL: brRI_i1_ult: 3261; CHECK: # %bb.0: # %entry 3262; CHECK-NEXT: movi16 a0, 1 3263; CHECK-NEXT: btsti32 a0, 0 3264; CHECK-NEXT: bt32 .LBB128_2 3265; CHECK-NEXT: # %bb.1: # %label1 3266; CHECK-NEXT: movi16 a0, 1 3267; CHECK-NEXT: rts16 3268; CHECK-NEXT: .LBB128_2: # %label2 3269; CHECK-NEXT: movi16 a0, 0 3270; CHECK-NEXT: rts16 3271; CHECK-UGTXT: icmpu32 a0, a1, a0 3272; CHECK-UGTXT: rts16 3273entry: 3274 %icmp = icmp ult i1 %x, 10 3275 br i1 %icmp, label %label1, label %label2 3276label1: 3277 ret i1 1 3278label2: 3279 ret i1 0 3280} 3281 3282 3283;ULE 3284define i1 @brRR_i1_ule(i1 %x, i1 %y) { 3285; CHECK-LABEL: brRR_i1_ule: 3286; CHECK: # %bb.0: # %entry 3287; CHECK-NEXT: andi32 a1, a1, 1 3288; CHECK-NEXT: andi32 a0, a0, 1 3289; CHECK-NEXT: cmphs16 a0, a1 3290; CHECK-NEXT: bf32 .LBB129_2 3291; CHECK-NEXT: # %bb.1: # %label1 3292; CHECK-NEXT: movi16 a0, 1 3293; CHECK-NEXT: rts16 3294; CHECK-NEXT: .LBB129_2: # %label2 3295; CHECK-NEXT: movi16 a0, 0 3296; CHECK-NEXT: rts16 3297; CHECK-UGTXT: icmpu32 a0, a1, a0 3298; CHECK-UGTXT: rts16 3299entry: 3300 %icmp = icmp ule i1 %y, %x 3301 br i1 %icmp, label %label1, label %label2 3302label1: 3303 ret i1 1 3304label2: 3305 ret i1 0 3306} 3307 3308define i1 @brRI_i1_ule(i1 %x) { 3309; CHECK-LABEL: brRI_i1_ule: 3310; CHECK: # %bb.0: # %entry 3311; CHECK-NEXT: andi32 a0, a0, 1 3312; CHECK-NEXT: bnez32 a0, .LBB130_2 3313; CHECK-NEXT: # %bb.1: # %label1 3314; CHECK-NEXT: movi16 a0, 1 3315; CHECK-NEXT: rts16 3316; CHECK-NEXT: .LBB130_2: # %label2 3317; CHECK-NEXT: movi16 a0, 0 3318; CHECK-NEXT: rts16 3319; CHECK-UGTXT: icmpu32 a0, a1, a0 3320; CHECK-UGTXT: rts16 3321entry: 3322 %icmp = icmp ule i1 %x, 10 3323 br i1 %icmp, label %label1, label %label2 3324label1: 3325 ret i1 1 3326label2: 3327 ret i1 0 3328} 3329 3330define i1 @brR0_i1_ule(i1 %x) { 3331; CHECK-LABEL: brR0_i1_ule: 3332; CHECK: # %bb.0: # %entry 3333; CHECK-NEXT: andi32 a0, a0, 1 3334; CHECK-NEXT: bnez32 a0, .LBB131_2 3335; CHECK-NEXT: # %bb.1: # %label1 3336; CHECK-NEXT: movi16 a0, 1 3337; CHECK-NEXT: rts16 3338; CHECK-NEXT: .LBB131_2: # %label2 3339; CHECK-NEXT: movi16 a0, 0 3340; CHECK-NEXT: rts16 3341; CHECK-UGTXT: icmpu32 a0, a1, a0 3342; CHECK-UGTXT: rts16 3343entry: 3344 %icmp = icmp ule i1 %x, 0 3345 br i1 %icmp, label %label1, label %label2 3346label1: 3347 ret i1 1 3348label2: 3349 ret i1 0 3350} 3351 3352;SGT 3353define i1 @brRR_i1_sgt(i1 %x, i1 %y) { 3354; CHECK-LABEL: brRR_i1_sgt: 3355; CHECK: # %bb.0: # %entry 3356; CHECK-NEXT: sext32 a1, a1, 0, 0 3357; CHECK-NEXT: sext32 a0, a0, 0, 0 3358; CHECK-NEXT: cmplt16 a0, a1 3359; CHECK-NEXT: bf32 .LBB132_2 3360; CHECK-NEXT: # %bb.1: # %label1 3361; CHECK-NEXT: movi16 a0, 1 3362; CHECK-NEXT: rts16 3363; CHECK-NEXT: .LBB132_2: # %label2 3364; CHECK-NEXT: movi16 a0, 0 3365; CHECK-NEXT: rts16 3366; CHECK-UGTXT: icmpu32 a0, a1, a0 3367; CHECK-UGTXT: rts16 3368entry: 3369 %icmp = icmp sgt i1 %y, %x 3370 br i1 %icmp, label %label1, label %label2 3371label1: 3372 ret i1 1 3373label2: 3374 ret i1 0 3375} 3376 3377define i1 @brRI_i1_sgt(i1 %x) { 3378; CHECK-LABEL: brRI_i1_sgt: 3379; CHECK: # %bb.0: # %entry 3380; CHECK-NEXT: movi16 a0, 1 3381; CHECK-NEXT: btsti32 a0, 0 3382; CHECK-NEXT: bt32 .LBB133_2 3383; CHECK-NEXT: # %bb.1: # %label1 3384; CHECK-NEXT: movi16 a0, 1 3385; CHECK-NEXT: rts16 3386; CHECK-NEXT: .LBB133_2: # %label2 3387; CHECK-NEXT: movi16 a0, 0 3388; CHECK-NEXT: rts16 3389; CHECK-UGTXT: icmpu32 a0, a1, a0 3390; CHECK-UGTXT: rts16 3391entry: 3392 %icmp = icmp sgt i1 %x, 10 3393 br i1 %icmp, label %label1, label %label2 3394label1: 3395 ret i1 1 3396label2: 3397 ret i1 0 3398} 3399 3400define i1 @brR0_i1_sgt(i1 %x) { 3401; CHECK-LABEL: brR0_i1_sgt: 3402; CHECK: # %bb.0: # %entry 3403; CHECK-NEXT: movi16 a0, 1 3404; CHECK-NEXT: btsti32 a0, 0 3405; CHECK-NEXT: bt32 .LBB134_2 3406; CHECK-NEXT: # %bb.1: # %label1 3407; CHECK-NEXT: movi16 a0, 1 3408; CHECK-NEXT: rts16 3409; CHECK-NEXT: .LBB134_2: # %label2 3410; CHECK-NEXT: movi16 a0, 0 3411; CHECK-NEXT: rts16 3412; CHECK-UGTXT: icmpu32 a0, a1, a0 3413; CHECK-UGTXT: rts16 3414entry: 3415 %icmp = icmp sgt i1 %x, 0 3416 br i1 %icmp, label %label1, label %label2 3417label1: 3418 ret i1 1 3419label2: 3420 ret i1 0 3421} 3422 3423;SGE 3424define i1 @brRR_i1_sge(i1 %x, i1 %y) { 3425; CHECK-LABEL: brRR_i1_sge: 3426; CHECK: # %bb.0: # %entry 3427; CHECK-NEXT: sext32 a0, a0, 0, 0 3428; CHECK-NEXT: sext32 a1, a1, 0, 0 3429; CHECK-NEXT: cmplt16 a1, a0 3430; CHECK-NEXT: bt32 .LBB135_2 3431; CHECK-NEXT: # %bb.1: # %label1 3432; CHECK-NEXT: movi16 a0, 1 3433; CHECK-NEXT: rts16 3434; CHECK-NEXT: .LBB135_2: # %label2 3435; CHECK-NEXT: movi16 a0, 0 3436; CHECK-NEXT: rts16 3437; CHECK-UGTXT: icmpu32 a0, a1, a0 3438; CHECK-UGTXT: rts16 3439entry: 3440 %icmp = icmp sge i1 %y, %x 3441 br i1 %icmp, label %label1, label %label2 3442label1: 3443 ret i1 1 3444label2: 3445 ret i1 0 3446} 3447 3448define i1 @brRI_i1_sge(i1 %x) { 3449; CHECK-LABEL: brRI_i1_sge: 3450; CHECK: # %bb.0: # %entry 3451; CHECK-NEXT: andi32 a0, a0, 1 3452; CHECK-NEXT: bnez32 a0, .LBB136_2 3453; CHECK-NEXT: # %bb.1: # %label1 3454; CHECK-NEXT: movi16 a0, 1 3455; CHECK-NEXT: rts16 3456; CHECK-NEXT: .LBB136_2: # %label2 3457; CHECK-NEXT: movi16 a0, 0 3458; CHECK-NEXT: rts16 3459; CHECK-UGTXT: icmpu32 a0, a1, a0 3460; CHECK-UGTXT: rts16 3461entry: 3462 %icmp = icmp sge i1 %x, 10 3463 br i1 %icmp, label %label1, label %label2 3464label1: 3465 ret i1 1 3466label2: 3467 ret i1 0 3468} 3469 3470define i1 @brR0_i1_sge(i1 %x) { 3471; CHECK-LABEL: brR0_i1_sge: 3472; CHECK: # %bb.0: # %entry 3473; CHECK-NEXT: andi32 a0, a0, 1 3474; CHECK-NEXT: bnez32 a0, .LBB137_2 3475; CHECK-NEXT: # %bb.1: # %label1 3476; CHECK-NEXT: movi16 a0, 1 3477; CHECK-NEXT: rts16 3478; CHECK-NEXT: .LBB137_2: # %label2 3479; CHECK-NEXT: movi16 a0, 0 3480; CHECK-NEXT: rts16 3481; CHECK-UGTXT: icmpu32 a0, a1, a0 3482; CHECK-UGTXT: rts16 3483entry: 3484 %icmp = icmp sge i1 %x, 0 3485 br i1 %icmp, label %label1, label %label2 3486label1: 3487 ret i1 1 3488label2: 3489 ret i1 0 3490} 3491 3492;SLT 3493define i1 @brRR_i1_slt(i1 %x, i1 %y) { 3494; CHECK-LABEL: brRR_i1_slt: 3495; CHECK: # %bb.0: # %entry 3496; CHECK-NEXT: sext32 a0, a0, 0, 0 3497; CHECK-NEXT: sext32 a1, a1, 0, 0 3498; CHECK-NEXT: cmplt16 a1, a0 3499; CHECK-NEXT: bf32 .LBB138_2 3500; CHECK-NEXT: # %bb.1: # %label1 3501; CHECK-NEXT: movi16 a0, 1 3502; CHECK-NEXT: rts16 3503; CHECK-NEXT: .LBB138_2: # %label2 3504; CHECK-NEXT: movi16 a0, 0 3505; CHECK-NEXT: rts16 3506; CHECK-UGTXT: icmpu32 a0, a1, a0 3507; CHECK-UGTXT: rts16 3508entry: 3509 %icmp = icmp slt i1 %y, %x 3510 br i1 %icmp, label %label1, label %label2 3511label1: 3512 ret i1 1 3513label2: 3514 ret i1 0 3515} 3516 3517define i1 @brRI_i1_slt(i1 %x) { 3518; CHECK-LABEL: brRI_i1_slt: 3519; CHECK: # %bb.0: # %entry 3520; CHECK-NEXT: andi32 a0, a0, 1 3521; CHECK-NEXT: bnez32 a0, .LBB139_2 3522; CHECK-NEXT: # %bb.1: # %label2 3523; CHECK-NEXT: movi16 a0, 0 3524; CHECK-NEXT: rts16 3525; CHECK-NEXT: .LBB139_2: # %label1 3526; CHECK-NEXT: movi16 a0, 1 3527; CHECK-NEXT: rts16 3528; CHECK-UGTXT: icmpu32 a0, a1, a0 3529; CHECK-UGTXT: rts16 3530entry: 3531 %icmp = icmp slt i1 %x, 10 3532 br i1 %icmp, label %label1, label %label2 3533label1: 3534 ret i1 1 3535label2: 3536 ret i1 0 3537} 3538 3539define i1 @brR0_i1_slt(i1 %x) { 3540; CHECK-LABEL: brR0_i1_slt: 3541; CHECK: # %bb.0: # %entry 3542; CHECK-NEXT: andi32 a0, a0, 1 3543; CHECK-NEXT: bnez32 a0, .LBB140_2 3544; CHECK-NEXT: # %bb.1: # %label2 3545; CHECK-NEXT: movi16 a0, 0 3546; CHECK-NEXT: rts16 3547; CHECK-NEXT: .LBB140_2: # %label1 3548; CHECK-NEXT: movi16 a0, 1 3549; CHECK-NEXT: rts16 3550; CHECK-UGTXT: icmpu32 a0, a1, a0 3551; CHECK-UGTXT: rts16 3552entry: 3553 %icmp = icmp slt i1 %x, 0 3554 br i1 %icmp, label %label1, label %label2 3555label1: 3556 ret i1 1 3557label2: 3558 ret i1 0 3559} 3560 3561;SLE 3562define i1 @brRR_i1_sle(i1 %x, i1 %y) { 3563; CHECK-LABEL: brRR_i1_sle: 3564; CHECK: # %bb.0: # %entry 3565; CHECK-NEXT: sext32 a1, a1, 0, 0 3566; CHECK-NEXT: sext32 a0, a0, 0, 0 3567; CHECK-NEXT: cmplt16 a0, a1 3568; CHECK-NEXT: bt32 .LBB141_2 3569; CHECK-NEXT: # %bb.1: # %label1 3570; CHECK-NEXT: movi16 a0, 1 3571; CHECK-NEXT: rts16 3572; CHECK-NEXT: .LBB141_2: # %label2 3573; CHECK-NEXT: movi16 a0, 0 3574; CHECK-NEXT: rts16 3575; CHECK-UGTXT: icmpu32 a0, a1, a0 3576; CHECK-UGTXT: rts16 3577entry: 3578 %icmp = icmp sle i1 %y, %x 3579 br i1 %icmp, label %label1, label %label2 3580label1: 3581 ret i1 1 3582label2: 3583 ret i1 0 3584} 3585 3586define i1 @brRI_i1_sle(i1 %x) { 3587; CHECK-LABEL: brRI_i1_sle: 3588; CHECK: # %bb.0: # %entry 3589; CHECK-NEXT: movi16 a0, 0 3590; CHECK-NEXT: btsti32 a0, 0 3591; CHECK-NEXT: bt32 .LBB142_2 3592; CHECK-NEXT: # %bb.1: # %label1 3593; CHECK-NEXT: movi16 a0, 1 3594; CHECK-NEXT: rts16 3595; CHECK-NEXT: .LBB142_2: # %label2 3596; CHECK-NEXT: movi16 a0, 0 3597; CHECK-NEXT: rts16 3598; CHECK-UGTXT: icmpu32 a0, a1, a0 3599; CHECK-UGTXT: rts16 3600entry: 3601 %icmp = icmp sle i1 %x, 10 3602 br i1 %icmp, label %label1, label %label2 3603label1: 3604 ret i1 1 3605label2: 3606 ret i1 0 3607} 3608 3609define i1 @brR0_i1_sle(i1 %x) { 3610; CHECK-LABEL: brR0_i1_sle: 3611; CHECK: # %bb.0: # %entry 3612; CHECK-NEXT: movi16 a0, 0 3613; CHECK-NEXT: btsti32 a0, 0 3614; CHECK-NEXT: bt32 .LBB143_2 3615; CHECK-NEXT: # %bb.1: # %label1 3616; CHECK-NEXT: movi16 a0, 1 3617; CHECK-NEXT: rts16 3618; CHECK-NEXT: .LBB143_2: # %label2 3619; CHECK-NEXT: movi16 a0, 0 3620; CHECK-NEXT: rts16 3621; CHECK-UGTXT: icmpu32 a0, a1, a0 3622; CHECK-UGTXT: rts16 3623entry: 3624 %icmp = icmp sle i1 %x, 0 3625 br i1 %icmp, label %label1, label %label2 3626label1: 3627 ret i1 1 3628label2: 3629 ret i1 0 3630} 3631 3632 3633define i1 @brCBit_i1(i1 %c) { 3634; CHECK-LABEL: brCBit_i1: 3635; CHECK: # %bb.0: # %entry 3636; CHECK-NEXT: andi32 a0, a0, 1 3637; CHECK-NEXT: bez32 a0, .LBB144_2 3638; CHECK-NEXT: # %bb.1: # %label1 3639; CHECK-NEXT: movi16 a0, 1 3640; CHECK-NEXT: rts16 3641; CHECK-NEXT: .LBB144_2: # %label2 3642; CHECK-NEXT: movi16 a0, 0 3643; CHECK-NEXT: rts16 3644entry: 3645 br i1 %c, label %label1, label %label2 3646label1: 3647 ret i1 1 3648label2: 3649 ret i1 0 3650} 3651