1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -csky-no-aliases -mattr=+e2 -mattr=+2e3 < %s -mtriple=csky | FileCheck %s 3 4define i32 @addRR(i32 %x, i32 %y) { 5; CHECK-LABEL: addRR: 6; CHECK: # %bb.0: # %entry 7; CHECK-NEXT: addu16 a0, a1 8; CHECK-NEXT: rts16 9entry: 10 %add = add nsw i32 %y, %x 11 ret i32 %add 12} 13 14define i32 @addRI(i32 %x) { 15; CHECK-LABEL: addRI: 16; CHECK: # %bb.0: # %entry 17; CHECK-NEXT: addi16 a0, 10 18; CHECK-NEXT: rts16 19entry: 20 %add = add nsw i32 %x, 10 21 ret i32 %add 22} 23 24define i32 @addRI_X(i32 %x) { 25; CHECK-LABEL: addRI_X: 26; CHECK: # %bb.0: # %entry 27; CHECK-NEXT: movi32 a1, 4097 28; CHECK-NEXT: addu16 a0, a1 29; CHECK-NEXT: rts16 30entry: 31 %add = add nsw i32 %x, 4097 32 ret i32 %add 33} 34 35define i64 @ADD_LONG(i64 %x, i64 %y) { 36; CHECK-LABEL: ADD_LONG: 37; CHECK: # %bb.0: # %entry 38; CHECK-NEXT: clrc32 39; CHECK-NEXT: addc32 a0, a2, a0 40; CHECK-NEXT: addc32 a1, a3, a1 41; CHECK-NEXT: rts16 42entry: 43 %add = add nsw i64 %y, %x 44 ret i64 %add 45} 46 47define i64 @ADD_LONG_I(i64 %x) { 48; CHECK-LABEL: ADD_LONG_I: 49; CHECK: # %bb.0: # %entry 50; CHECK-NEXT: clrc32 51; CHECK-NEXT: movi16 a2, 1 52; CHECK-NEXT: addc16 a0, a2 53; CHECK-NEXT: movi16 a2, 0 54; CHECK-NEXT: addc16 a1, a2 55; CHECK-NEXT: rts16 56entry: 57 %add = add nsw i64 %x, 1 58 ret i64 %add 59} 60 61define i16 @ADD_SHORT(i16 %x, i16 %y) { 62; CHECK-LABEL: ADD_SHORT: 63; CHECK: # %bb.0: # %entry 64; CHECK-NEXT: addu16 a0, a1 65; CHECK-NEXT: rts16 66entry: 67 %add = add nsw i16 %y, %x 68 ret i16 %add 69} 70 71define i16 @ADD_SHORT_I(i16 %x) { 72; CHECK-LABEL: ADD_SHORT_I: 73; CHECK: # %bb.0: # %entry 74; CHECK-NEXT: addi16 a0, a0, 1 75; CHECK-NEXT: rts16 76entry: 77 %add = add nsw i16 %x, 1 78 ret i16 %add 79} 80 81define i8 @ADD_CHAR(i8 %x, i8 %y) { 82; CHECK-LABEL: ADD_CHAR: 83; CHECK: # %bb.0: # %entry 84; CHECK-NEXT: addu16 a0, a1 85; CHECK-NEXT: rts16 86entry: 87 %add = add nsw i8 %y, %x 88 ret i8 %add 89} 90 91define i8 @ADD_CHAR_I(i8 %x) { 92; CHECK-LABEL: ADD_CHAR_I: 93; CHECK: # %bb.0: # %entry 94; CHECK-NEXT: addi16 a0, a0, 1 95; CHECK-NEXT: rts16 96entry: 97 %add = add nsw i8 %x, 1 98 ret i8 %add 99} 100 101 102define i32 @subRR(i32 %x, i32 %y) { 103; CHECK-LABEL: subRR: 104; CHECK: # %bb.0: # %entry 105; CHECK-NEXT: subu16 a0, a1, a0 106; CHECK-NEXT: rts16 107entry: 108 %sub = sub nsw i32 %y, %x 109 ret i32 %sub 110} 111 112define i32 @subRI(i32 %x) { 113; CHECK-LABEL: subRI: 114; CHECK: # %bb.0: # %entry 115; CHECK-NEXT: movih32 a1, 65535 116; CHECK-NEXT: ori32 a1, a1, 65526 117; CHECK-NEXT: addu16 a0, a1 118; CHECK-NEXT: rts16 119entry: 120 %sub = sub nsw i32 %x, 10 121 ret i32 %sub 122} 123 124define i32 @subRI_X(i32 %x) { 125; CHECK-LABEL: subRI_X: 126; CHECK: # %bb.0: # %entry 127; CHECK-NEXT: movih32 a1, 65535 128; CHECK-NEXT: ori32 a1, a1, 61439 129; CHECK-NEXT: addu16 a0, a1 130; CHECK-NEXT: rts16 131entry: 132 %sub = sub nsw i32 %x, 4097 133 ret i32 %sub 134} 135 136define i64 @SUB_LONG(i64 %x, i64 %y) { 137; CHECK-LABEL: SUB_LONG: 138; CHECK: # %bb.0: # %entry 139; CHECK-NEXT: setc32 140; CHECK-NEXT: subc32 a0, a2, a0 141; CHECK-NEXT: mvcv16 a2 142; CHECK-NEXT: btsti32 a2, 0 143; CHECK-NEXT: mvcv16 a2 144; CHECK-NEXT: btsti32 a2, 0 145; CHECK-NEXT: subc32 a1, a3, a1 146; CHECK-NEXT: rts16 147entry: 148 %sub = sub nsw i64 %y, %x 149 ret i64 %sub 150} 151 152define i64 @SUB_LONG_I(i64 %x) { 153; CHECK-LABEL: SUB_LONG_I: 154; CHECK: # %bb.0: # %entry 155; CHECK-NEXT: clrc32 156; CHECK-NEXT: movih32 a2, 65535 157; CHECK-NEXT: ori32 a2, a2, 65535 158; CHECK-NEXT: addc16 a0, a2 159; CHECK-NEXT: addc16 a1, a2 160; CHECK-NEXT: rts16 161entry: 162 %sub = sub nsw i64 %x, 1 163 ret i64 %sub 164} 165 166define i16 @SUB_SHORT(i16 %x, i16 %y) { 167; CHECK-LABEL: SUB_SHORT: 168; CHECK: # %bb.0: # %entry 169; CHECK-NEXT: subu16 a0, a1, a0 170; CHECK-NEXT: rts16 171entry: 172 %sub = sub nsw i16 %y, %x 173 ret i16 %sub 174} 175 176define i16 @SUB_SHORT_I(i16 %x) { 177; CHECK-LABEL: SUB_SHORT_I: 178; CHECK: # %bb.0: # %entry 179; CHECK-NEXT: movih32 a1, 65535 180; CHECK-NEXT: ori32 a1, a1, 65535 181; CHECK-NEXT: addu16 a0, a1 182; CHECK-NEXT: rts16 183entry: 184 %sub = sub nsw i16 %x, 1 185 ret i16 %sub 186} 187 188define i8 @SUB_CHAR(i8 %x, i8 %y) { 189; CHECK-LABEL: SUB_CHAR: 190; CHECK: # %bb.0: # %entry 191; CHECK-NEXT: subu16 a0, a1, a0 192; CHECK-NEXT: rts16 193entry: 194 %sub = sub nsw i8 %y, %x 195 ret i8 %sub 196} 197 198define i8 @SUB_CHAR_I(i8 %x) { 199; CHECK-LABEL: SUB_CHAR_I: 200; CHECK: # %bb.0: # %entry 201; CHECK-NEXT: movih32 a1, 65535 202; CHECK-NEXT: ori32 a1, a1, 65535 203; CHECK-NEXT: addu16 a0, a1 204; CHECK-NEXT: rts16 205entry: 206 %sub = sub nsw i8 %x, 1 207 ret i8 %sub 208} 209 210define i32 @mulRR(i32 %x, i32 %y) { 211; CHECK-LABEL: mulRR: 212; CHECK: # %bb.0: # %entry 213; CHECK-NEXT: mult16 a0, a1 214; CHECK-NEXT: rts16 215entry: 216 %mul = mul nsw i32 %y, %x 217 ret i32 %mul 218} 219 220define i32 @mulRI(i32 %x) { 221; CHECK-LABEL: mulRI: 222; CHECK: # %bb.0: # %entry 223; CHECK-NEXT: movi16 a1, 10 224; CHECK-NEXT: mult16 a0, a1 225; CHECK-NEXT: rts16 226entry: 227 %mul = mul nsw i32 %x, 10 228 ret i32 %mul 229} 230 231define i32 @mulRI_X(i32 %x) { 232; CHECK-LABEL: mulRI_X: 233; CHECK: # %bb.0: # %entry 234; CHECK-NEXT: movi32 a1, 4097 235; CHECK-NEXT: mult16 a0, a1 236; CHECK-NEXT: rts16 237entry: 238 %mul = mul nsw i32 %x, 4097 239 ret i32 %mul 240} 241 242define i16 @MUL_SHORT(i16 %x, i16 %y) { 243; CHECK-LABEL: MUL_SHORT: 244; CHECK: # %bb.0: # %entry 245; CHECK-NEXT: mult16 a0, a1 246; CHECK-NEXT: rts16 247entry: 248 %mul = mul nsw i16 %y, %x 249 ret i16 %mul 250} 251 252define i16 @MUL_SHORT_I(i16 %x) { 253; CHECK-LABEL: MUL_SHORT_I: 254; CHECK: # %bb.0: # %entry 255; CHECK-NEXT: movi16 a1, 3 256; CHECK-NEXT: mult16 a0, a1 257; CHECK-NEXT: rts16 258entry: 259 %mul = mul nsw i16 %x, 3 260 ret i16 %mul 261} 262 263define i8 @MUL_CHAR(i8 %x, i8 %y) { 264; CHECK-LABEL: MUL_CHAR: 265; CHECK: # %bb.0: # %entry 266; CHECK-NEXT: mult16 a0, a1 267; CHECK-NEXT: rts16 268entry: 269 %mul = mul nsw i8 %y, %x 270 ret i8 %mul 271} 272 273define i8 @MUL_CHAR_I(i8 %x) { 274; CHECK-LABEL: MUL_CHAR_I: 275; CHECK: # %bb.0: # %entry 276; CHECK-NEXT: movih32 a1, 65535 277; CHECK-NEXT: ori32 a1, a1, 65533 278; CHECK-NEXT: mult16 a0, a1 279; CHECK-NEXT: rts16 280entry: 281 %mul = mul nsw i8 %x, -3 282 ret i8 %mul 283} 284 285define i32 @udivRR(i32 %x, i32 %y) { 286; CHECK-LABEL: udivRR: 287; CHECK: # %bb.0: # %entry 288; CHECK-NEXT: divu32 a0, a1, a0 289; CHECK-NEXT: rts16 290entry: 291 %udiv = udiv i32 %y, %x 292 ret i32 %udiv 293} 294 295define i32 @udivRI(i32 %x) { 296; CHECK-LABEL: udivRI: 297; CHECK: # %bb.0: # %entry 298; CHECK-NEXT: movi16 a1, 10 299; CHECK-NEXT: divu32 a0, a0, a1 300; CHECK-NEXT: rts16 301entry: 302 %udiv = udiv i32 %x, 10 303 ret i32 %udiv 304} 305 306define i32 @udivRI_X(i32 %x) { 307; CHECK-LABEL: udivRI_X: 308; CHECK: # %bb.0: # %entry 309; CHECK-NEXT: movi32 a1, 4097 310; CHECK-NEXT: divu32 a0, a0, a1 311; CHECK-NEXT: rts16 312entry: 313 %udiv = udiv i32 %x, 4097 314 ret i32 %udiv 315} 316 317define i16 @UDIV_SHORT(i16 %x, i16 %y) { 318; CHECK-LABEL: UDIV_SHORT: 319; CHECK: # %bb.0: # %entry 320; CHECK-NEXT: zexth16 a0, a0 321; CHECK-NEXT: zexth16 a1, a1 322; CHECK-NEXT: divu32 a0, a1, a0 323; CHECK-NEXT: rts16 324entry: 325 %udiv = udiv i16 %y, %x 326 ret i16 %udiv 327} 328 329define i16 @UDIV_SHORT_I(i16 %x) { 330; CHECK-LABEL: UDIV_SHORT_I: 331; CHECK: # %bb.0: # %entry 332; CHECK-NEXT: zexth16 a0, a0 333; CHECK-NEXT: movi32 a1, 43691 334; CHECK-NEXT: mult16 a0, a1 335; CHECK-NEXT: lsri16 a0, a0, 17 336; CHECK-NEXT: rts16 337entry: 338 %udiv = udiv i16 %x, 3 339 ret i16 %udiv 340} 341 342define i8 @UDIV_CHAR(i8 %x, i8 %y) { 343; CHECK-LABEL: UDIV_CHAR: 344; CHECK: # %bb.0: # %entry 345; CHECK-NEXT: zextb16 a0, a0 346; CHECK-NEXT: zextb16 a1, a1 347; CHECK-NEXT: divu32 a0, a1, a0 348; CHECK-NEXT: rts16 349entry: 350 %udiv = udiv i8 %y, %x 351 ret i8 %udiv 352} 353 354define i8 @UDIV_CHAR_I(i8 %x) { 355; CHECK-LABEL: UDIV_CHAR_I: 356; CHECK: # %bb.0: # %entry 357; CHECK-NEXT: zextb16 a0, a0 358; CHECK-NEXT: movi16 a1, 171 359; CHECK-NEXT: mult16 a0, a1 360; CHECK-NEXT: lsri16 a0, a0, 9 361; CHECK-NEXT: rts16 362entry: 363 %udiv = udiv i8 %x, 3 364 ret i8 %udiv 365} 366 367define i32 @sdivRR(i32 %x, i32 %y) { 368; CHECK-LABEL: sdivRR: 369; CHECK: # %bb.0: # %entry 370; CHECK-NEXT: divs32 a0, a1, a0 371; CHECK-NEXT: rts16 372entry: 373 %sdiv = sdiv i32 %y, %x 374 ret i32 %sdiv 375} 376 377define i32 @sdivRI(i32 %x) { 378; CHECK-LABEL: sdivRI: 379; CHECK: # %bb.0: # %entry 380; CHECK-NEXT: movi16 a1, 10 381; CHECK-NEXT: divs32 a0, a0, a1 382; CHECK-NEXT: rts16 383entry: 384 %sdiv = sdiv i32 %x, 10 385 ret i32 %sdiv 386} 387 388define i32 @sdivRI_X(i32 %x) { 389; CHECK-LABEL: sdivRI_X: 390; CHECK: # %bb.0: # %entry 391; CHECK-NEXT: movi32 a1, 4097 392; CHECK-NEXT: divs32 a0, a0, a1 393; CHECK-NEXT: rts16 394entry: 395 %sdiv = sdiv i32 %x, 4097 396 ret i32 %sdiv 397} 398 399define i16 @SDIV_SHORT(i16 %x, i16 %y) { 400; CHECK-LABEL: SDIV_SHORT: 401; CHECK: # %bb.0: # %entry 402; CHECK-NEXT: sexth16 a0, a0 403; CHECK-NEXT: sexth16 a1, a1 404; CHECK-NEXT: divs32 a0, a1, a0 405; CHECK-NEXT: rts16 406entry: 407 %sdiv = sdiv i16 %y, %x 408 ret i16 %sdiv 409} 410 411define i16 @SDIV_SHORT_I(i16 %x) { 412; CHECK-LABEL: SDIV_SHORT_I: 413; CHECK: # %bb.0: # %entry 414; CHECK-NEXT: sexth16 a0, a0 415; CHECK-NEXT: movi32 a1, 21846 416; CHECK-NEXT: mult16 a0, a1 417; CHECK-NEXT: lsri16 a1, a0, 31 418; CHECK-NEXT: lsri16 a0, a0, 16 419; CHECK-NEXT: addu16 a0, a1 420; CHECK-NEXT: rts16 421entry: 422 %sdiv = sdiv i16 %x, 3 423 ret i16 %sdiv 424} 425 426define i8 @SDIV_CHAR(i8 %x, i8 %y) { 427; CHECK-LABEL: SDIV_CHAR: 428; CHECK: # %bb.0: # %entry 429; CHECK-NEXT: sextb16 a0, a0 430; CHECK-NEXT: sextb16 a1, a1 431; CHECK-NEXT: divs32 a0, a1, a0 432; CHECK-NEXT: rts16 433entry: 434 %sdiv = sdiv i8 %y, %x 435 ret i8 %sdiv 436} 437 438define i8 @SDIV_CHAR_I(i8 %x) { 439; CHECK-LABEL: SDIV_CHAR_I: 440; CHECK: # %bb.0: # %entry 441; CHECK-NEXT: sextb16 a1, a0 442; CHECK-NEXT: movi16 a2, 85 443; CHECK-NEXT: mult16 a1, a2 444; CHECK-NEXT: lsri16 a1, a1, 8 445; CHECK-NEXT: subu16 a0, a1, a0 446; CHECK-NEXT: andi32 a1, a0, 128 447; CHECK-NEXT: lsri16 a1, a1, 7 448; CHECK-NEXT: sextb16 a0, a0 449; CHECK-NEXT: asri16 a0, a0, 1 450; CHECK-NEXT: addu16 a0, a1 451; CHECK-NEXT: rts16 452entry: 453 %sdiv = sdiv i8 %x, -3 454 ret i8 %sdiv 455} 456 457define i32 @shlRR(i32 %x, i32 %y) { 458; CHECK-LABEL: shlRR: 459; CHECK: # %bb.0: # %entry 460; CHECK-NEXT: lsl32 a0, a1, a0 461; CHECK-NEXT: rts16 462entry: 463 %shl = shl nsw i32 %y, %x 464 ret i32 %shl 465} 466 467define i32 @shlRI(i32 %x) { 468; CHECK-LABEL: shlRI: 469; CHECK: # %bb.0: # %entry 470; CHECK-NEXT: lsli16 a0, a0, 10 471; CHECK-NEXT: rts16 472entry: 473 %shl = shl nsw i32 %x, 10 474 ret i32 %shl 475} 476 477 478define i64 @SHL_LONG_I(i64 %x) { 479; CHECK-LABEL: SHL_LONG_I: 480; CHECK: # %bb.0: # %entry 481; CHECK-NEXT: lsri16 a2, a0, 25 482; CHECK-NEXT: lsli16 a1, a1, 7 483; CHECK-NEXT: or16 a1, a2 484; CHECK-NEXT: lsli16 a0, a0, 7 485; CHECK-NEXT: rts16 486entry: 487 %shl = shl nsw i64 %x, 7 488 ret i64 %shl 489} 490 491define i16 @SHL_SHORT(i16 %x, i16 %y) { 492; CHECK-LABEL: SHL_SHORT: 493; CHECK: # %bb.0: # %entry 494; CHECK-NEXT: zexth16 a0, a0 495; CHECK-NEXT: lsl32 a0, a1, a0 496; CHECK-NEXT: rts16 497entry: 498 %shl = shl nsw i16 %y, %x 499 ret i16 %shl 500} 501 502define i16 @SHL_SHORT_I(i16 %x) { 503; CHECK-LABEL: SHL_SHORT_I: 504; CHECK: # %bb.0: # %entry 505; CHECK-NEXT: lsli16 a0, a0, 1 506; CHECK-NEXT: rts16 507entry: 508 %shl = shl nsw i16 %x, 1 509 ret i16 %shl 510} 511 512define i8 @SHL_CHAR(i8 %x, i8 %y) { 513; CHECK-LABEL: SHL_CHAR: 514; CHECK: # %bb.0: # %entry 515; CHECK-NEXT: zextb16 a0, a0 516; CHECK-NEXT: lsl32 a0, a1, a0 517; CHECK-NEXT: rts16 518entry: 519 %shl = shl nsw i8 %y, %x 520 ret i8 %shl 521} 522 523define i8 @SHL_CHAR_I(i8 %x) { 524; CHECK-LABEL: SHL_CHAR_I: 525; CHECK: # %bb.0: # %entry 526; CHECK-NEXT: lsli16 a0, a0, 1 527; CHECK-NEXT: rts16 528entry: 529 %shl = shl nsw i8 %x, 1 530 ret i8 %shl 531} 532 533define i32 @andRR(i32 %x, i32 %y) { 534; CHECK-LABEL: andRR: 535; CHECK: # %bb.0: # %entry 536; CHECK-NEXT: and16 a0, a1 537; CHECK-NEXT: rts16 538entry: 539 %and = and i32 %y, %x 540 ret i32 %and 541} 542 543define i32 @andRI(i32 %x) { 544; CHECK-LABEL: andRI: 545; CHECK: # %bb.0: # %entry 546; CHECK-NEXT: andi32 a0, a0, 10 547; CHECK-NEXT: rts16 548entry: 549 %and = and i32 %x, 10 550 ret i32 %and 551} 552 553define i32 @andRI_X(i32 %x) { 554; CHECK-LABEL: andRI_X: 555; CHECK: # %bb.0: # %entry 556; CHECK-NEXT: movi32 a1, 4097 557; CHECK-NEXT: and16 a0, a1 558; CHECK-NEXT: rts16 559entry: 560 %and = and i32 %x, 4097 561 ret i32 %and 562} 563 564define i64 @AND_LONG(i64 %x, i64 %y) { 565; CHECK-LABEL: AND_LONG: 566; CHECK: # %bb.0: # %entry 567; CHECK-NEXT: and16 a0, a2 568; CHECK-NEXT: and16 a1, a3 569; CHECK-NEXT: rts16 570entry: 571 %and = and i64 %y, %x 572 ret i64 %and 573} 574 575define i64 @AND_LONG_I(i64 %x) { 576; CHECK-LABEL: AND_LONG_I: 577; CHECK: # %bb.0: # %entry 578; CHECK-NEXT: andi32 a0, a0, 1 579; CHECK-NEXT: movi16 a1, 0 580; CHECK-NEXT: rts16 581entry: 582 %and = and i64 %x, 1 583 ret i64 %and 584} 585 586define i16 @AND_SHORT(i16 %x, i16 %y) { 587; CHECK-LABEL: AND_SHORT: 588; CHECK: # %bb.0: # %entry 589; CHECK-NEXT: and16 a0, a1 590; CHECK-NEXT: rts16 591entry: 592 %and = and i16 %y, %x 593 ret i16 %and 594} 595 596define i16 @AND_SHORT_I(i16 %x) { 597; CHECK-LABEL: AND_SHORT_I: 598; CHECK: # %bb.0: # %entry 599; CHECK-NEXT: andi32 a0, a0, 1 600; CHECK-NEXT: rts16 601entry: 602 %and = and i16 %x, 1 603 ret i16 %and 604} 605 606define i8 @AND_CHAR(i8 %x, i8 %y) { 607; CHECK-LABEL: AND_CHAR: 608; CHECK: # %bb.0: # %entry 609; CHECK-NEXT: and16 a0, a1 610; CHECK-NEXT: rts16 611entry: 612 %and = and i8 %y, %x 613 ret i8 %and 614} 615 616define i8 @AND_CHAR_I(i8 %x) { 617; CHECK-LABEL: AND_CHAR_I: 618; CHECK: # %bb.0: # %entry 619; CHECK-NEXT: andi32 a0, a0, 1 620; CHECK-NEXT: rts16 621entry: 622 %and = and i8 %x, 1 623 ret i8 %and 624} 625 626define i32 @ashrRR(i32 %x, i32 %y) { 627; CHECK-LABEL: ashrRR: 628; CHECK: # %bb.0: # %entry 629; CHECK-NEXT: asr32 a0, a1, a0 630; CHECK-NEXT: rts16 631entry: 632 %ashr = ashr i32 %y, %x 633 ret i32 %ashr 634} 635 636define i32 @ashrRI(i32 %x) { 637; CHECK-LABEL: ashrRI: 638; CHECK: # %bb.0: # %entry 639; CHECK-NEXT: asri16 a0, a0, 10 640; CHECK-NEXT: rts16 641entry: 642 %ashr = ashr i32 %x, 10 643 ret i32 %ashr 644} 645 646 647define i64 @ASHR_LONG_I(i64 %x) { 648; CHECK-LABEL: ASHR_LONG_I: 649; CHECK: # %bb.0: # %entry 650; CHECK-NEXT: lsli16 a2, a1, 25 651; CHECK-NEXT: lsri16 a0, a0, 7 652; CHECK-NEXT: or16 a0, a2 653; CHECK-NEXT: asri16 a1, a1, 7 654; CHECK-NEXT: rts16 655entry: 656 %ashr = ashr i64 %x, 7 657 ret i64 %ashr 658} 659 660define i16 @ASHR_SHORT(i16 %x, i16 %y) { 661; CHECK-LABEL: ASHR_SHORT: 662; CHECK: # %bb.0: # %entry 663; CHECK-NEXT: sexth16 a1, a1 664; CHECK-NEXT: zexth16 a0, a0 665; CHECK-NEXT: asr32 a0, a1, a0 666; CHECK-NEXT: rts16 667entry: 668 %ashr = ashr i16 %y, %x 669 ret i16 %ashr 670} 671 672define i16 @ASHR_SHORT_I(i16 %x) { 673; CHECK-LABEL: ASHR_SHORT_I: 674; CHECK: # %bb.0: # %entry 675; CHECK-NEXT: sexth16 a0, a0 676; CHECK-NEXT: asri16 a0, a0, 1 677; CHECK-NEXT: rts16 678entry: 679 %ashr = ashr i16 %x, 1 680 ret i16 %ashr 681} 682 683define i8 @ASHR_CHAR(i8 %x, i8 %y) { 684; CHECK-LABEL: ASHR_CHAR: 685; CHECK: # %bb.0: # %entry 686; CHECK-NEXT: sextb16 a1, a1 687; CHECK-NEXT: zextb16 a0, a0 688; CHECK-NEXT: asr32 a0, a1, a0 689; CHECK-NEXT: rts16 690entry: 691 %ashr = ashr i8 %y, %x 692 ret i8 %ashr 693} 694 695define i8 @ASHR_CHAR_I(i8 %x) { 696; CHECK-LABEL: ASHR_CHAR_I: 697; CHECK: # %bb.0: # %entry 698; CHECK-NEXT: sextb16 a0, a0 699; CHECK-NEXT: asri16 a0, a0, 1 700; CHECK-NEXT: rts16 701entry: 702 %ashr = ashr i8 %x, 1 703 ret i8 %ashr 704} 705 706 707define i32 @lshrRR(i32 %x, i32 %y) { 708; CHECK-LABEL: lshrRR: 709; CHECK: # %bb.0: # %entry 710; CHECK-NEXT: lsr32 a0, a1, a0 711; CHECK-NEXT: rts16 712entry: 713 %lshr = lshr i32 %y, %x 714 ret i32 %lshr 715} 716 717define i32 @lshrRI(i32 %x) { 718; CHECK-LABEL: lshrRI: 719; CHECK: # %bb.0: # %entry 720; CHECK-NEXT: lsri16 a0, a0, 10 721; CHECK-NEXT: rts16 722entry: 723 %lshr = lshr i32 %x, 10 724 ret i32 %lshr 725} 726 727define i64 @LSHR_LONG_I(i64 %x) { 728; CHECK-LABEL: LSHR_LONG_I: 729; CHECK: # %bb.0: # %entry 730; CHECK-NEXT: lsli16 a2, a1, 25 731; CHECK-NEXT: lsri16 a0, a0, 7 732; CHECK-NEXT: or16 a0, a2 733; CHECK-NEXT: lsri16 a1, a1, 7 734; CHECK-NEXT: rts16 735entry: 736 %lshr = lshr i64 %x, 7 737 ret i64 %lshr 738} 739 740define i16 @LSHR_SHORT(i16 %x, i16 %y) { 741; CHECK-LABEL: LSHR_SHORT: 742; CHECK: # %bb.0: # %entry 743; CHECK-NEXT: zexth16 a1, a1 744; CHECK-NEXT: zexth16 a0, a0 745; CHECK-NEXT: lsr32 a0, a1, a0 746; CHECK-NEXT: rts16 747entry: 748 %lshr = lshr i16 %y, %x 749 ret i16 %lshr 750} 751 752define i16 @LSHR_SHORT_I(i16 %x) { 753; CHECK-LABEL: LSHR_SHORT_I: 754; CHECK: # %bb.0: # %entry 755; CHECK-NEXT: movi32 a1, 65534 756; CHECK-NEXT: and16 a0, a1 757; CHECK-NEXT: lsri16 a0, a0, 1 758; CHECK-NEXT: rts16 759entry: 760 %lshr = lshr i16 %x, 1 761 ret i16 %lshr 762} 763 764define i8 @LSHR_CHAR(i8 %x, i8 %y) { 765; CHECK-LABEL: LSHR_CHAR: 766; CHECK: # %bb.0: # %entry 767; CHECK-NEXT: zextb16 a1, a1 768; CHECK-NEXT: zextb16 a0, a0 769; CHECK-NEXT: lsr32 a0, a1, a0 770; CHECK-NEXT: rts16 771entry: 772 %lshr = lshr i8 %y, %x 773 ret i8 %lshr 774} 775 776define i8 @LSHR_CHAR_I(i8 %x) { 777; CHECK-LABEL: LSHR_CHAR_I: 778; CHECK: # %bb.0: # %entry 779; CHECK-NEXT: andi32 a0, a0, 254 780; CHECK-NEXT: lsri16 a0, a0, 1 781; CHECK-NEXT: rts16 782entry: 783 %lshr = lshr i8 %x, 1 784 ret i8 %lshr 785} 786 787define i1 @LSHR_BIT(i1 %x, i1 %y) { 788; CHECK-LABEL: LSHR_BIT: 789; CHECK: # %bb.0: # %entry 790; CHECK-NEXT: mov16 a0, a1 791; CHECK-NEXT: rts16 792entry: 793 %lshr = lshr i1 %y, %x 794 ret i1 %lshr 795} 796 797define i1 @LSHR_BIT_I(i1 %x) { 798; CHECK-LABEL: LSHR_BIT_I: 799; CHECK: # %bb.0: # %entry 800; CHECK-NEXT: rts16 801entry: 802 %lshr = lshr i1 %x, 1 803 ret i1 %lshr 804} 805 806define i32 @orRR(i32 %x, i32 %y) { 807; CHECK-LABEL: orRR: 808; CHECK: # %bb.0: # %entry 809; CHECK-NEXT: or16 a0, a1 810; CHECK-NEXT: rts16 811entry: 812 %or = or i32 %y, %x 813 ret i32 %or 814} 815 816define i32 @orRI(i32 %x) { 817; CHECK-LABEL: orRI: 818; CHECK: # %bb.0: # %entry 819; CHECK-NEXT: ori32 a0, a0, 10 820; CHECK-NEXT: rts16 821entry: 822 %or = or i32 %x, 10 823 ret i32 %or 824} 825 826define i32 @orRI_X(i32 %x) { 827; CHECK-LABEL: orRI_X: 828; CHECK: # %bb.0: # %entry 829; CHECK-NEXT: ori32 a0, a0, 4097 830; CHECK-NEXT: rts16 831entry: 832 %or = or i32 %x, 4097 833 ret i32 %or 834} 835 836define i64 @OR_LONG(i64 %x, i64 %y) { 837; CHECK-LABEL: OR_LONG: 838; CHECK: # %bb.0: # %entry 839; CHECK-NEXT: or16 a0, a2 840; CHECK-NEXT: or16 a1, a3 841; CHECK-NEXT: rts16 842entry: 843 %or = or i64 %y, %x 844 ret i64 %or 845} 846 847define i64 @OR_LONG_I(i64 %x) { 848; CHECK-LABEL: OR_LONG_I: 849; CHECK: # %bb.0: # %entry 850; CHECK-NEXT: ori32 a0, a0, 1 851; CHECK-NEXT: rts16 852entry: 853 %or = or i64 %x, 1 854 ret i64 %or 855} 856 857define i16 @OR_SHORT(i16 %x, i16 %y) { 858; CHECK-LABEL: OR_SHORT: 859; CHECK: # %bb.0: # %entry 860; CHECK-NEXT: or16 a0, a1 861; CHECK-NEXT: rts16 862entry: 863 %or = or i16 %y, %x 864 ret i16 %or 865} 866 867define i16 @OR_SHORT_I(i16 %x) { 868; CHECK-LABEL: OR_SHORT_I: 869; CHECK: # %bb.0: # %entry 870; CHECK-NEXT: ori32 a0, a0, 1 871; CHECK-NEXT: rts16 872entry: 873 %or = or i16 %x, 1 874 ret i16 %or 875} 876 877define i8 @OR_CHAR(i8 %x, i8 %y) { 878; CHECK-LABEL: OR_CHAR: 879; CHECK: # %bb.0: # %entry 880; CHECK-NEXT: or16 a0, a1 881; CHECK-NEXT: rts16 882entry: 883 %or = or i8 %y, %x 884 ret i8 %or 885} 886 887define i8 @OR_CHAR_I(i8 %x) { 888; CHECK-LABEL: OR_CHAR_I: 889; CHECK: # %bb.0: # %entry 890; CHECK-NEXT: ori32 a0, a0, 1 891; CHECK-NEXT: rts16 892entry: 893 %or = or i8 %x, 1 894 ret i8 %or 895} 896 897 898define i32 @xorRR(i32 %x, i32 %y) { 899; CHECK-LABEL: xorRR: 900; CHECK: # %bb.0: # %entry 901; CHECK-NEXT: xor16 a0, a1 902; CHECK-NEXT: rts16 903entry: 904 %xor = xor i32 %y, %x 905 ret i32 %xor 906} 907 908define i32 @xorRI(i32 %x) { 909; CHECK-LABEL: xorRI: 910; CHECK: # %bb.0: # %entry 911; CHECK-NEXT: xori32 a0, a0, 10 912; CHECK-NEXT: rts16 913entry: 914 %xor = xor i32 %x, 10 915 ret i32 %xor 916} 917 918define i32 @xorRI_X(i32 %x) { 919; CHECK-LABEL: xorRI_X: 920; CHECK: # %bb.0: # %entry 921; CHECK-NEXT: movi32 a1, 4097 922; CHECK-NEXT: xor16 a0, a1 923; CHECK-NEXT: rts16 924entry: 925 %xor = xor i32 %x, 4097 926 ret i32 %xor 927} 928 929define i64 @XOR_LONG(i64 %x, i64 %y) { 930; CHECK-LABEL: XOR_LONG: 931; CHECK: # %bb.0: # %entry 932; CHECK-NEXT: xor16 a0, a2 933; CHECK-NEXT: xor16 a1, a3 934; CHECK-NEXT: rts16 935entry: 936 %xor = xor i64 %y, %x 937 ret i64 %xor 938} 939 940define i64 @XOR_LONG_I(i64 %x) { 941; CHECK-LABEL: XOR_LONG_I: 942; CHECK: # %bb.0: # %entry 943; CHECK-NEXT: xori32 a0, a0, 1 944; CHECK-NEXT: rts16 945entry: 946 %xor = xor i64 %x, 1 947 ret i64 %xor 948} 949 950define i16 @XOR_SHORT(i16 %x, i16 %y) { 951; CHECK-LABEL: XOR_SHORT: 952; CHECK: # %bb.0: # %entry 953; CHECK-NEXT: xor16 a0, a1 954; CHECK-NEXT: rts16 955entry: 956 %xor = xor i16 %y, %x 957 ret i16 %xor 958} 959 960define i16 @XOR_SHORT_I(i16 %x) { 961; CHECK-LABEL: XOR_SHORT_I: 962; CHECK: # %bb.0: # %entry 963; CHECK-NEXT: xori32 a0, a0, 1 964; CHECK-NEXT: rts16 965entry: 966 %xor = xor i16 %x, 1 967 ret i16 %xor 968} 969 970define i8 @XOR_CHAR(i8 %x, i8 %y) { 971; CHECK-LABEL: XOR_CHAR: 972; CHECK: # %bb.0: # %entry 973; CHECK-NEXT: xor16 a0, a1 974; CHECK-NEXT: rts16 975entry: 976 %xor = xor i8 %y, %x 977 ret i8 %xor 978} 979 980define i8 @XOR_CHAR_I(i8 %x) { 981; CHECK-LABEL: XOR_CHAR_I: 982; CHECK: # %bb.0: # %entry 983; CHECK-NEXT: xori32 a0, a0, 1 984; CHECK-NEXT: rts16 985entry: 986 %xor = xor i8 %x, 1 987 ret i8 %xor 988} 989 990; i64 --> i32/i16/i8/i1 991define i32 @truncR_i64_0(i64 %x) { 992; CHECK-LABEL: truncR_i64_0: 993; CHECK: # %bb.0: # %entry 994; CHECK-NEXT: rts16 995entry: 996 %trunc = trunc i64 %x to i32 997 ret i32 %trunc 998} 999 1000define i16 @truncR_i64_1(i64 %x) { 1001; CHECK-LABEL: truncR_i64_1: 1002; CHECK: # %bb.0: # %entry 1003; CHECK-NEXT: rts16 1004entry: 1005 %trunc = trunc i64 %x to i16 1006 ret i16 %trunc 1007} 1008 1009define i8 @truncR_i64_2(i64 %x) { 1010; CHECK-LABEL: truncR_i64_2: 1011; CHECK: # %bb.0: # %entry 1012; CHECK-NEXT: rts16 1013entry: 1014 %trunc = trunc i64 %x to i8 1015 ret i8 %trunc 1016} 1017 1018define i1 @truncR_i64_3(i64 %x) { 1019; CHECK-LABEL: truncR_i64_3: 1020; CHECK: # %bb.0: # %entry 1021; CHECK-NEXT: rts16 1022entry: 1023 %trunc = trunc i64 %x to i1 1024 ret i1 %trunc 1025} 1026 1027 1028; i32 --> i16/i8/i1 1029define i16 @truncR_i32_1(i32 %x) { 1030; CHECK-LABEL: truncR_i32_1: 1031; CHECK: # %bb.0: # %entry 1032; CHECK-NEXT: rts16 1033entry: 1034 %trunc = trunc i32 %x to i16 1035 ret i16 %trunc 1036} 1037 1038define i8 @truncR_i32_2(i32 %x) { 1039; CHECK-LABEL: truncR_i32_2: 1040; CHECK: # %bb.0: # %entry 1041; CHECK-NEXT: rts16 1042entry: 1043 %trunc = trunc i32 %x to i8 1044 ret i8 %trunc 1045} 1046 1047define i1 @truncR_i32_3(i32 %x) { 1048; CHECK-LABEL: truncR_i32_3: 1049; CHECK: # %bb.0: # %entry 1050; CHECK-NEXT: rts16 1051entry: 1052 %trunc = trunc i32 %x to i1 1053 ret i1 %trunc 1054} 1055 1056; i16 --> i8/i1 1057define i8 @truncR_i16_2(i16 %x) { 1058; CHECK-LABEL: truncR_i16_2: 1059; CHECK: # %bb.0: # %entry 1060; CHECK-NEXT: rts16 1061entry: 1062 %trunc = trunc i16 %x to i8 1063 ret i8 %trunc 1064} 1065 1066define i1 @truncR_i16_3(i16 %x) { 1067; CHECK-LABEL: truncR_i16_3: 1068; CHECK: # %bb.0: # %entry 1069; CHECK-NEXT: rts16 1070entry: 1071 %trunc = trunc i16 %x to i1 1072 ret i1 %trunc 1073} 1074 1075 1076;i8 --> i1 1077define i1 @truncR_i8_3(i8 %x) { 1078; CHECK-LABEL: truncR_i8_3: 1079; CHECK: # %bb.0: # %entry 1080; CHECK-NEXT: rts16 1081entry: 1082 %trunc = trunc i8 %x to i1 1083 ret i1 %trunc 1084} 1085