1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=avr --mcpu=atmega328 -O0 -verify-machineinstrs \ 3; RUN: | FileCheck -check-prefix=CHECK-O0 %s 4; RUN: llc < %s -mtriple=avr --mcpu=atmega328 -O3 -verify-machineinstrs \ 5; RUN: | FileCheck -check-prefix=CHECK-O3 %s 6 7@arr0 = addrspace(1) constant [4 x i16] [i16 123, i16 234, i16 456, i16 67], align 1 8@arr1 = addrspace(1) constant [4 x i8] c"ABCD", align 1 9 10define i16 @foo0(i16 %a) addrspace(1) { 11; CHECK-O0-LABEL: foo0: 12; CHECK-O0: ; %bb.0: ; %entry 13; CHECK-O0-NEXT: push r28 14; CHECK-O0-NEXT: push r29 15; CHECK-O0-NEXT: in r28, 61 16; CHECK-O0-NEXT: in r29, 62 17; CHECK-O0-NEXT: sbiw r28, 2 18; CHECK-O0-NEXT: in r0, 63 19; CHECK-O0-NEXT: cli 20; CHECK-O0-NEXT: out 62, r29 21; CHECK-O0-NEXT: out 63, r0 22; CHECK-O0-NEXT: out 61, r28 23; CHECK-O0-NEXT: std Y+1, r24 24; CHECK-O0-NEXT: std Y+2, r25 25; CHECK-O0-NEXT: ldd r24, Y+1 26; CHECK-O0-NEXT: ldd r25, Y+2 27; CHECK-O0-NEXT: lsl r24 28; CHECK-O0-NEXT: rol r25 29; CHECK-O0-NEXT: subi r24, -lo8(arr0) 30; CHECK-O0-NEXT: sbci r25, -hi8(arr0) 31; CHECK-O0-NEXT: movw r30, r24 32; CHECK-O0-NEXT: lpm r24, Z+ 33; CHECK-O0-NEXT: lpm r25, Z 34; CHECK-O0-NEXT: adiw r28, 2 35; CHECK-O0-NEXT: in r0, 63 36; CHECK-O0-NEXT: cli 37; CHECK-O0-NEXT: out 62, r29 38; CHECK-O0-NEXT: out 63, r0 39; CHECK-O0-NEXT: out 61, r28 40; CHECK-O0-NEXT: pop r29 41; CHECK-O0-NEXT: pop r28 42; CHECK-O0-NEXT: ret 43; 44; CHECK-O3-LABEL: foo0: 45; CHECK-O3: ; %bb.0: ; %entry 46; CHECK-O3-NEXT: push r28 47; CHECK-O3-NEXT: push r29 48; CHECK-O3-NEXT: in r28, 61 49; CHECK-O3-NEXT: in r29, 62 50; CHECK-O3-NEXT: sbiw r28, 2 51; CHECK-O3-NEXT: in r0, 63 52; CHECK-O3-NEXT: cli 53; CHECK-O3-NEXT: out 62, r29 54; CHECK-O3-NEXT: out 63, r0 55; CHECK-O3-NEXT: out 61, r28 56; CHECK-O3-NEXT: std Y+1, r24 57; CHECK-O3-NEXT: std Y+2, r25 58; CHECK-O3-NEXT: lsl r24 59; CHECK-O3-NEXT: rol r25 60; CHECK-O3-NEXT: subi r24, -lo8(arr0) 61; CHECK-O3-NEXT: sbci r25, -hi8(arr0) 62; CHECK-O3-NEXT: movw r30, r24 63; CHECK-O3-NEXT: lpm r24, Z+ 64; CHECK-O3-NEXT: lpm r25, Z 65; CHECK-O3-NEXT: adiw r28, 2 66; CHECK-O3-NEXT: in r0, 63 67; CHECK-O3-NEXT: cli 68; CHECK-O3-NEXT: out 62, r29 69; CHECK-O3-NEXT: out 63, r0 70; CHECK-O3-NEXT: out 61, r28 71; CHECK-O3-NEXT: pop r29 72; CHECK-O3-NEXT: pop r28 73; CHECK-O3-NEXT: ret 74entry: 75 %a.addr = alloca i16, align 1 76 store i16 %a, i16* %a.addr, align 1 77 %0 = load i16, i16* %a.addr, align 1 78 %arrayidx = getelementptr inbounds [4 x i16], [4 x i16] addrspace(1)* @arr0, i16 0, i16 %0 79 %1 = load i16, i16 addrspace(1)* %arrayidx, align 1 80 ret i16 %1 81} 82 83define i8 @foo1(i16 %a) addrspace(1) { 84; CHECK-O0-LABEL: foo1: 85; CHECK-O0: ; %bb.0: ; %entry 86; CHECK-O0-NEXT: push r28 87; CHECK-O0-NEXT: push r29 88; CHECK-O0-NEXT: in r28, 61 89; CHECK-O0-NEXT: in r29, 62 90; CHECK-O0-NEXT: sbiw r28, 2 91; CHECK-O0-NEXT: in r0, 63 92; CHECK-O0-NEXT: cli 93; CHECK-O0-NEXT: out 62, r29 94; CHECK-O0-NEXT: out 63, r0 95; CHECK-O0-NEXT: out 61, r28 96; CHECK-O0-NEXT: std Y+1, r24 97; CHECK-O0-NEXT: std Y+2, r25 98; CHECK-O0-NEXT: ldd r24, Y+1 99; CHECK-O0-NEXT: ldd r25, Y+2 100; CHECK-O0-NEXT: subi r24, -lo8(arr1) 101; CHECK-O0-NEXT: sbci r25, -hi8(arr1) 102; CHECK-O0-NEXT: movw r30, r24 103; CHECK-O0-NEXT: lpm r24, Z 104; CHECK-O0-NEXT: adiw r28, 2 105; CHECK-O0-NEXT: in r0, 63 106; CHECK-O0-NEXT: cli 107; CHECK-O0-NEXT: out 62, r29 108; CHECK-O0-NEXT: out 63, r0 109; CHECK-O0-NEXT: out 61, r28 110; CHECK-O0-NEXT: pop r29 111; CHECK-O0-NEXT: pop r28 112; CHECK-O0-NEXT: ret 113; 114; CHECK-O3-LABEL: foo1: 115; CHECK-O3: ; %bb.0: ; %entry 116; CHECK-O3-NEXT: push r28 117; CHECK-O3-NEXT: push r29 118; CHECK-O3-NEXT: in r28, 61 119; CHECK-O3-NEXT: in r29, 62 120; CHECK-O3-NEXT: sbiw r28, 2 121; CHECK-O3-NEXT: in r0, 63 122; CHECK-O3-NEXT: cli 123; CHECK-O3-NEXT: out 62, r29 124; CHECK-O3-NEXT: out 63, r0 125; CHECK-O3-NEXT: out 61, r28 126; CHECK-O3-NEXT: std Y+1, r24 127; CHECK-O3-NEXT: std Y+2, r25 128; CHECK-O3-NEXT: subi r24, -lo8(arr1) 129; CHECK-O3-NEXT: sbci r25, -hi8(arr1) 130; CHECK-O3-NEXT: movw r30, r24 131; CHECK-O3-NEXT: lpm r24, Z 132; CHECK-O3-NEXT: adiw r28, 2 133; CHECK-O3-NEXT: in r0, 63 134; CHECK-O3-NEXT: cli 135; CHECK-O3-NEXT: out 62, r29 136; CHECK-O3-NEXT: out 63, r0 137; CHECK-O3-NEXT: out 61, r28 138; CHECK-O3-NEXT: pop r29 139; CHECK-O3-NEXT: pop r28 140; CHECK-O3-NEXT: ret 141entry: 142 %a.addr = alloca i16, align 1 143 store i16 %a, i16* %a.addr, align 1 144 %0 = load i16, i16* %a.addr, align 1 145 %arrayidx = getelementptr inbounds [4 x i8], [4 x i8] addrspace(1)* @arr1, i16 0, i16 %0 146 %1 = load i8, i8 addrspace(1)* %arrayidx, align 1 147 ret i8 %1 148} 149