1; RUN: llc -mattr=addsubiw < %s -march=avr | FileCheck %s
2
3define i8 @add8_reg_reg(i8 %a, i8 %b) {
4; CHECK-LABEL: add8_reg_reg:
5; CHECK: add r24, r22
6    %result = add i8 %a, %b
7    ret i8 %result
8}
9
10define i8 @add8_reg_imm(i8 %a) {
11; CHECK-LABEL: add8_reg_imm:
12; CHECK: subi r24, -5
13    %result = add i8 %a, 5
14    ret i8 %result
15}
16
17define i8 @add8_reg_increment(i8 %a) {
18; CHECK-LABEL: add8_reg_increment:
19; CHECK: inc r24
20    %result = add i8 %a, 1
21    ret i8 %result
22}
23
24
25define i16 @add16_reg_reg(i16 %a, i16 %b) {
26; CHECK-LABEL: add16_reg_reg:
27; CHECK: add r24, r22
28; CHECK: adc r25, r23
29    %result = add i16 %a, %b
30    ret i16 %result
31}
32
33define i16 @add16_reg_imm(i16 %a) {
34; CHECK-LABEL: add16_reg_imm:
35; CHECK: adiw r24, 63
36    %result = add i16 %a, 63
37    ret i16 %result
38}
39
40define i16 @add16_reg_imm_subi(i16 %a) {
41; CHECK-LABEL: add16_reg_imm_subi:
42; CHECK: subi r24, 133
43; CHECK: sbci r25, 255
44    %result = add i16 %a, 123
45    ret i16 %result
46}
47
48define i32 @add32_reg_reg(i32 %a, i32 %b) {
49; CHECK-LABEL: add32_reg_reg:
50; CHECK: add r22, r18
51; CHECK: adc r23, r19
52; CHECK: adc r24, r20
53; CHECK: adc r25, r21
54    %result = add i32 %a, %b
55    ret i32 %result
56}
57
58define i32 @add32_reg_imm(i32 %a) {
59; CHECK-LABEL: add32_reg_imm:
60; CHECK: subi r22, 251
61; CHECK: sbci r23, 255
62; CHECK: sbci r24, 255
63; CHECK: sbci r25, 255
64    %result = add i32 %a, 5
65    ret i32 %result
66}
67
68define i64 @add64_reg_reg(i64 %a, i64 %b) {
69; CHECK-LABEL: add64_reg_reg:
70; CHECK: add r18, r10
71; CHECK: adc r20, r12
72; CHECK: adc r21, r13
73; CHECK: adc r22, r14
74; CHECK: adc r23, r15
75; CHECK: adc r24, r16
76; CHECK: adc r25, r17
77    %result = add i64 %a, %b
78    ret i64 %result
79}
80
81define i64 @add64_reg_imm(i64 %a) {
82; CHECK-LABEL: add64_reg_imm:
83; CHECK: subi r18, 251
84; CHECK: sbci r19, 255
85; CHECK: sbci r20, 255
86; CHECK: sbci r21, 255
87; CHECK: sbci r22, 255
88; CHECK: sbci r23, 255
89; CHECK: sbci r24, 255
90; CHECK: sbci r25, 255
91    %result = add i64 %a, 5
92    ret i64 %result
93}
94