1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=thumbv7em-arm-none-eabi < %s | FileCheck %s
3
4target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
5target triple = "thumbv7em-arm-none-eabi"
6
7@a = hidden global i32 0, align 4
8
9define hidden void @fn1() nounwind #0 {
10; CHECK-LABEL: fn1:
11; CHECK:       @ %bb.0: @ %entry
12; CHECK-NEXT:    .save {r7, lr}
13; CHECK-NEXT:    push {r7, lr}
14; CHECK-NEXT:    vldr d0, .LCPI0_0
15; CHECK-NEXT:    vmov r0, r1, d0
16; CHECK-NEXT:    mov r2, r0
17; CHECK-NEXT:    mov r3, r1
18; CHECK-NEXT:    bl __aeabi_dcmpeq
19; CHECK-NEXT:    cbnz r0, .LBB0_2
20; CHECK-NEXT:    b .LBB0_1
21; CHECK-NEXT:  .LBB0_1: @ %land.rhs
22; CHECK-NEXT:    b .LBB0_2
23; CHECK-NEXT:  .LBB0_2: @ %land.end
24; CHECK-NEXT:    pop {r7, pc}
25; CHECK-NEXT:    .p2align 3
26; CHECK-NEXT:  @ %bb.3:
27; CHECK-NEXT:  .LCPI0_0:
28; CHECK-NEXT:    .long 0 @ double 0
29; CHECK-NEXT:    .long 0
30entry:
31  %0 = load i32, i32* @a, align 4
32  %conv = sitofp i32 %0 to double
33  %mul = fmul nnan ninf nsz double 0.000000e+00, %conv
34  %tobool = fcmp nnan ninf nsz une double %mul, 0.000000e+00
35  br i1 %tobool, label %land.rhs, label %land.end
36
37land.rhs:                                         ; preds = %entry
38  br label %land.end
39
40land.end:                                         ; preds = %land.rhs, %entry
41  %1 = phi i1 [ false, %entry ], [ false, %land.rhs ]
42  %land.ext = zext i1 %1 to i32
43  ret void
44}
45
46attributes #0 = { noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "denormal-fp-math"="preserve-sign" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="true" "no-jump-tables"="false" "no-nans-fp-math"="true" "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-m4" "target-features"="+armv7e-m,+dsp,+fp16,+hwdiv,+thumb-mode,+vfp2sp,+vfp3d16sp,+vfp4d16sp,-aes,-crc,-crypto,-dotprod,-fp16fml,-fullfp16,-hwdiv-arm,-lob,-mve,-mve.fp,-ras,-sb,-sha2" "unsafe-fp-math"="false" "use-soft-float"="false" }
47