1; RUN: llvm-as < %s | llc -march=arm -asm-verbose | \
2; RUN:   grep -- {-2147483648} | count 3
3; RUN: llvm-as < %s | llc -march=arm | grep mvn | count 3
4; RUN: llvm-as < %s | llc -march=arm | grep adds | count 1
5; RUN: llvm-as < %s | llc -march=arm | grep adc | count 1
6; RUN: llvm-as < %s | llc -march=arm | grep {subs } | count 1
7; RUN: llvm-as < %s | llc -march=arm | grep sbc | count 1
8; RUN: llvm-as < %s | llc -march=arm | \
9; RUN:   grep smull | count 1
10; RUN: llvm-as < %s | llc -march=arm | \
11; RUN:   grep umull | count 1
12
13define i64 @f1() {
14entry:
15        ret i64 0
16}
17
18define i64 @f2() {
19entry:
20        ret i64 1
21}
22
23define i64 @f3() {
24entry:
25        ret i64 2147483647
26}
27
28define i64 @f4() {
29entry:
30        ret i64 2147483648
31}
32
33define i64 @f5() {
34entry:
35        ret i64 9223372036854775807
36}
37
38define i64 @f6(i64 %x, i64 %y) {
39entry:
40        %tmp1 = add i64 %y, 1           ; <i64> [#uses=1]
41        ret i64 %tmp1
42}
43
44define void @f7() {
45entry:
46        %tmp = call i64 @f8( )          ; <i64> [#uses=0]
47        ret void
48}
49
50declare i64 @f8()
51
52define i64 @f9(i64 %a, i64 %b) {
53entry:
54        %tmp = sub i64 %a, %b           ; <i64> [#uses=1]
55        ret i64 %tmp
56}
57
58define i64 @f(i32 %a, i32 %b) {
59entry:
60        %tmp = sext i32 %a to i64               ; <i64> [#uses=1]
61        %tmp1 = sext i32 %b to i64              ; <i64> [#uses=1]
62        %tmp2 = mul i64 %tmp1, %tmp             ; <i64> [#uses=1]
63        ret i64 %tmp2
64}
65
66define i64 @g(i32 %a, i32 %b) {
67entry:
68        %tmp = zext i32 %a to i64               ; <i64> [#uses=1]
69        %tmp1 = zext i32 %b to i64              ; <i64> [#uses=1]
70        %tmp2 = mul i64 %tmp1, %tmp             ; <i64> [#uses=1]
71        ret i64 %tmp2
72}
73
74define i64 @f10() {
75entry:
76        %a = alloca i64, align 8                ; <i64*> [#uses=1]
77        %retval = load i64* %a          ; <i64> [#uses=1]
78        ret i64 %retval
79}
80
81