1; Disable shrink-wrapping on the first test otherwise we wouldn't 2; exerce the path for PR18136. 3; RUN: llc -mtriple=thumbv7-apple-none-macho < %s -enable-shrink-wrap=false -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-FNSTART,CHECK 4; RUN: llc -mtriple=thumbv6m-apple-none-macho -frame-pointer=all < %s -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-FNSTART,CHECK-T1 5; RUN: llc -mtriple=thumbv6m-apple-none-macho < %s -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-FNSTART,CHECK-T1-NOFP 6; RUN: llc -mtriple=thumbv7-apple-darwin-ios -frame-pointer=all < %s -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-FNSTART,CHECK-IOS 7; RUN: llc -mtriple=thumbv7--linux-gnueabi -frame-pointer=all < %s -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK-FNSTART,CHECK-LINUX 8 9declare void @bar(i8*) 10 11%bigVec = type [2 x double] 12 13@var = global %bigVec zeroinitializer 14 15define void @check_simple() minsize { 16; CHECK-FNSTART-LABEL: check_simple: 17; CHECK: push {r3, r4, r5, r6, r7, lr} 18; CHECK-NOT: sub sp, sp, 19; ... 20; CHECK-NOT: add sp, sp, 21; CHECK: pop {r0, r1, r2, r3, r7, pc} 22 23; CHECK-T1: push {r3, r4, r5, r6, r7, lr} 24; CHECK-T1: add r7, sp, #16 25; CHECK-T1-NOT: sub sp, sp, 26; ... 27; CHECK-T1-NOT: add sp, sp, 28; CHECK-T1: pop {r0, r1, r2, r3, r7, pc} 29 30 ; iOS always has a frame pointer and messing with the push affects 31 ; how it's set in the prologue. Make sure we get that right. 32; CHECK-IOS: push {r3, r4, r5, r6, r7, lr} 33; CHECK-NOT: sub sp, 34; CHECK-IOS: add r7, sp, #16 35; CHECK-NOT: sub sp, 36; ... 37; CHECK-NOT: add sp, 38; CHEC: pop {r3, r4, r5, r6, r7, pc} 39 40 %var = alloca i8, i32 16 41 call void @bar(i8* %var) 42 ret void 43} 44 45define void @check_simple_too_big() minsize { 46; CHECK-FNSTART-LABEL: check_simple_too_big: 47; CHECK: push {r7, lr} 48; CHECK: sub sp, 49; ... 50; CHECK: add sp, 51; CHECK: pop {r7, pc} 52 %var = alloca i8, i32 64 53 call void @bar(i8* %var) 54 ret void 55} 56 57define void @check_vfp_fold() minsize { 58; CHECK-FNSTART-LABEL: check_vfp_fold: 59; CHECK: push {r[[GLOBREG:[0-9]+]], lr} 60; CHECK: vpush {d6, d7, d8, d9} 61; CHECK-NOT: sub sp, 62; ... 63; CHECK-NOT: add sp, 64; CHECK: vpop {d6, d7, d8, d9} 65; CHECK: pop {r[[GLOBREG]], pc} 66 67 ; iOS uses aligned NEON stores here, which is convenient since we 68 ; want to make sure that works too. 69; CHECK-IOS: push {r4, r7, lr} 70; CHECK-IOS: sub.w r4, sp, #16 71; CHECK-IOS: bfc r4, #0, #4 72; CHECK-IOS: mov sp, r4 73; CHECK-IOS: vst1.64 {d8, d9}, [r4:128] 74; CHECK-IOS: sub sp, #16 75; ... 76; CHECK-IOS: add r4, sp, #16 77; CHECK-IOS: vld1.64 {d8, d9}, [r4:128] 78; CHECK-IOS: mov sp, r4 79; CHECK-IOS: pop {r4, r7, pc} 80 81 %var = alloca i8, i32 16 82 83 call void asm "", "r,~{d8},~{d9}"(i8* %var) 84 call void @bar(i8* %var) 85 86 ret void 87} 88 89; This function should use just enough space that the "add sp, sp, ..." could be 90; folded in except that doing so would clobber the value being returned. 91define i64 @check_no_return_clobber() minsize { 92; CHECK-FNSTART-LABEL: check_no_return_clobber: 93; CHECK: push {r1, r2, r3, r4, r5, r6, r7, lr} 94; CHECK-NOT: sub sp, 95; ... 96; CHECK: add sp, #24 97; CHECK: pop {r7, pc} 98 99 %var = alloca i8, i32 20 100 call void @bar(i8* %var) 101 ret i64 0 102} 103 104define arm_aapcs_vfpcc double @check_vfp_no_return_clobber() minsize { 105; CHECK-FNSTART-LABEL: check_vfp_no_return_clobber: 106; CHECK: push {r[[GLOBREG:[0-9]+]], lr} 107; CHECK: vpush {d0, d1, d2, d3, d4, d5, d6, d7, d8, d9} 108; CHECK-NOT: sub sp, 109; ... 110; CHECK: add sp, #64 111; CHECK: vpop {d8, d9} 112; CHECK: pop {r[[GLOBREG]], pc} 113 114 %var = alloca i8, i32 64 115 116 %tmp = load %bigVec, %bigVec* @var 117 call void @bar(i8* %var) 118 store %bigVec %tmp, %bigVec* @var 119 120 ret double 1.0 121} 122 123@dbl = global double 0.0 124 125; PR18136: there was a bug determining where the first eligible pop in a 126; basic-block was when the entire block was epilogue code. 127define void @test_fold_point(i1 %tst) minsize { 128; CHECK-FNSTART-LABEL: test_fold_point: 129 130 ; Important to check for beginning of basic block, because if it gets 131 ; if-converted the test is probably no longer checking what it should. 132; CHECK: %end 133; CHECK-NEXT: vpop {d7, d8} 134; CHECK-NEXT: pop {r4, pc} 135 136 ; With a guaranteed frame-pointer, we want to make sure that its offset in the 137 ; push block is correct, even if a few registers have been tacked onto a later 138 ; vpush (PR18160). 139; CHECK-IOS: push {r4, r7, lr} 140; CHECK-IOS-NEXT: add r7, sp, #4 141; CHECK-IOS-NEXT: vpush {d7, d8} 142 143 ; We want some memory so there's a stack adjustment to fold... 144 %var = alloca i8, i32 8 145 146 ; We want a long-lived floating register so that a callee-saved dN is used and 147 ; there's both a vpop and a pop. 148 %live_val = load double, double* @dbl 149 br i1 %tst, label %true, label %end 150true: 151 call void @bar(i8* %var) 152 store double %live_val, double* @dbl 153 br label %end 154end: 155 ; We want the epilogue to be the only thing in a basic block so that we hit 156 ; the correct edge-case (first inst in block is correct one to adjust). 157 ret void 158} 159 160define void @test_varsize(...) minsize { 161; CHECK-FNSTART-LABEL: test_varsize: 162; CHECK-T1: sub sp, #16 163; CHECK-T1: push {r5, r6, r7, lr} 164; ... 165; CHECK-T1: pop {r2, r3, r7} 166; CHECK-T1: pop {[[POP_REG:r[0-3]]]} 167; CHECK-T1: add sp, #16 168; CHECK-T1: bx [[POP_REG]] 169 170; CHECK: sub sp, #16 171; CHECK: push {r5, r6, r7, lr} 172; ... 173; CHECK: pop.w {r2, r3, r7, lr} 174; CHECK: add sp, #16 175; CHECK: bx lr 176 177 %var = alloca i8, i32 8 178 call void @llvm.va_start(i8* %var) 179 call void @bar(i8* %var) 180 ret void 181} 182 183%"MyClass" = type { i8*, i32, i32, float, float, float, [2 x i8], i32, i32* } 184 185declare float @foo() 186 187declare void @bar3() 188 189declare %"MyClass"* @bar2(%"MyClass"* returned, i16*, i32, float, float, i32, i32, i1 zeroext, i1 zeroext, i32) 190 191define fastcc float @check_vfp_no_return_clobber2(i16* %r, i16* %chars, i32 %length, i1 zeroext %flag) minsize { 192entry: 193; CHECK-FNSTART-LABEL: check_vfp_no_return_clobber2 194; CHECK-LINUX: vpush {d0, d1, d2, d3, d4, d5, d6, d7, d8} 195; CHECK-NOT: sub sp, 196; ... 197; CHECK-LINUX: add sp 198; CHECK-LINUX: vpop {d8} 199 %run = alloca %"MyClass", align 4 200 %call = call %"MyClass"* @bar2(%"MyClass"* %run, i16* %chars, i32 %length, float 0.000000e+00, float 0.000000e+00, i32 1, i32 1, i1 zeroext false, i1 zeroext true, i32 3) 201 %call1 = call float @foo() 202 %cmp = icmp eq %"MyClass"* %run, null 203 br i1 %cmp, label %exit, label %if.then 204 205if.then: ; preds = %entry 206 call void @bar3() 207 br label %exit 208 209exit: ; preds = %if.then, %entry 210 ret float %call1 211} 212 213declare void @use_arr(i32*) 214define void @test_fold_reuse() minsize { 215; CHECK-FNSTART-LABEL: test_fold_reuse: 216; CHECK: push.w {r4, r7, r8, lr} 217; CHECK: sub sp, #24 218; [...] 219; CHECK: add sp, #24 220; CHECK: pop.w {r4, r7, r8, pc} 221 %arr = alloca i8, i32 24 222 call void asm sideeffect "", "~{r8},~{r4}"() 223 call void @bar(i8* %arr) 224 ret void 225} 226 227; It doesn't matter what registers this pushes and pops; just make sure 228; it doesn't try to push/pop an illegal register on Thumb1. 229define void @test_long_fn() minsize nounwind optsize { 230; CHECK-FNSTART-LABEL: test_long_fn: 231; CHECK-T1-NOFP: push {r7, lr} 232; CHECK-T1-NOFP: pop {r3, pc} 233entry: 234 %z = alloca i32, align 4 235 call void asm sideeffect ".space 3000", "r"(i32* nonnull %z) 236 ret void 237} 238 239declare void @llvm.va_start(i8*) nounwind 240