1; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
2; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0
3; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8
4; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CORTEXA8U
5; RUN: llc < %s -mtriple=arm-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8U
6; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9
7
8define float @test1(float* %a) {
9entry:
10	%0 = load float* %a, align 4		; <float> [#uses=2]
11	%1 = fsub float -0.000000e+00, %0		; <float> [#uses=2]
12	%2 = fpext float %1 to double		; <double> [#uses=1]
13	%3 = fcmp olt double %2, 1.234000e+00		; <i1> [#uses=1]
14	%retval = select i1 %3, float %1, float %0		; <float> [#uses=1]
15	ret float %retval
16}
17; VFP2: test1:
18; VFP2: 	vneg.f32	s{{.*}}, s{{.*}}
19
20; NFP1: test1:
21; NFP1: 	vneg.f32	d{{.*}}, d{{.*}}
22
23; NFP0: test1:
24; NFP0: 	vneg.f32	s{{.*}}, s{{.*}}
25
26; CORTEXA8: test1:
27; CORTEXA8: 	vneg.f32	s{{.*}}, s{{.*}}
28
29; CORTEXA8U: test1:
30; CORTEXA8U: 	vneg.f32	d{{.*}}, d{{.*}}
31
32; CORTEXA9: test1:
33; CORTEXA9: 	vneg.f32	s{{.*}}, s{{.*}}
34
35define float @test2(float* %a) {
36entry:
37	%0 = load float* %a, align 4		; <float> [#uses=2]
38	%1 = fmul float -1.000000e+00, %0		; <float> [#uses=2]
39	%2 = fpext float %1 to double		; <double> [#uses=1]
40	%3 = fcmp olt double %2, 1.234000e+00		; <i1> [#uses=1]
41	%retval = select i1 %3, float %1, float %0		; <float> [#uses=1]
42	ret float %retval
43}
44; VFP2: test2:
45; VFP2: 	vneg.f32	s{{.*}}, s{{.*}}
46
47; NFP1: test2:
48; NFP1: 	vneg.f32	d{{.*}}, d{{.*}}
49
50; NFP0: test2:
51; NFP0: 	vneg.f32	s{{.*}}, s{{.*}}
52
53; CORTEXA8: test2:
54; CORTEXA8: 	vneg.f32	s{{.*}}, s{{.*}}
55
56; CORTEXA8U: test2:
57; CORTEXA8U: 	vneg.f32	d{{.*}}, d{{.*}}
58
59; CORTEXA9: test2:
60; CORTEXA9: 	vneg.f32	s{{.*}}, s{{.*}}
61
62