1; This tests that MC/asm header conversion is smooth and that the
2; build attributes are correct
3
4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE
5; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6
6; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST
7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S
13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast  | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST
17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
20; RUN: llc < %s -mtriple=armv7-linux-gnueabi  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST
21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
22; RUN: llc < %s -mtriple=armv8-linux-gnueabi  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST
23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
30; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE
31; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE
32; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP
33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-SOFT-FAST
41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A8-HARD
42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-HARD-FAST
43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
54; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
57; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST
58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
60; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST
61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
62; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
63
64; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-no-trapping-fp-math | FileCheck %s --check-prefix=NO-TRAPPING-MATH
65; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=ieee | FileCheck %s --check-prefix=DENORMAL-IEEE
66; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=preserve-sign | FileCheck %s --check-prefix=DENORMAL-PRESERVE-SIGN
67; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=positive-zero | FileCheck %s --check-prefix=DENORMAL-POSITIVE-ZERO
68
69; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16
70; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16
71; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD
72; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16
73; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16
74
75; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
76; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0
77; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
78; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
79; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus | FileCheck %s --check-prefix=CORTEX-M0PLUS
80; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
81; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
82; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 | FileCheck %s --check-prefix=CORTEX-M1
83; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
84; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
85; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000
86; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
87; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
88; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
89; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
90; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
91; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
92; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
93; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
94; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
95; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
96; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
97; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
98; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
99; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
100; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
101; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
102; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
103; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
104; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
105; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=CORTEX-M23
106; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=CORTEX-M33
107; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M33-FAST
108; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
109
110; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m35p | FileCheck %s --check-prefix=CORTEX-M35P
111; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m35p -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
112
113; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
114; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
115; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
116; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
117; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
118; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
119; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
120; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
121; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8
122; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST
123; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
124; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=CORTEX-A32
125; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A32-FAST
126; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
127; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35
128; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST
129; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
130; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
131; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
132; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
133; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
134; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST
135; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
136; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
137; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
138; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
139; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a73 | FileCheck %s --check-prefix=CORTEX-A73
140; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
141; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=EXYNOS-M1
142; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
143; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
144; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2 | FileCheck %s --check-prefix=EXYNOS-M2
145; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
146; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
147; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=EXYNOS-M3
148; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
149; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
150; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 | FileCheck %s --check-prefix=EXYNOS-M4
151; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
152; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
153; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5 | FileCheck %s --check-prefix=EXYNOS-M5
154; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
155; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
156; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
157; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
158; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s  --check-prefix=CORTEX-A7-CHECK
159; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s  --check-prefix=CORTEX-A7-CHECK-FAST
160; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
161; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
162; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
163; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
164; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
165; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
166; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
167; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
168; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
169; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER
170; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE
171; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE
172; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi | FileCheck %s --check-prefix=RELOC-ROPI
173; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=rwpi | FileCheck %s --check-prefix=RELOC-RWPI
174; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi-rwpi | FileCheck %s --check-prefix=RELOC-ROPI-RWPI
175
176; ARMv8.1a (AArch32)
177; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
178; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
179; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
180; ARMv8a (AArch32)
181; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
182; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
183; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
184; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
185; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
186; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
187; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
188; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
189; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
190; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
191; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m2 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
192; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m2 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
193; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
194; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
195; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m4 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
196; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m4 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
197; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
198; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
199
200; ARMv7a
201; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
202; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
203; ARMv7ve
204; RUN: llc < %s -mtriple=armv7ve-none-linux-gnueabi | FileCheck %s --check-prefix=V7VE
205; ARMv7r
206; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
207; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
208; ARMv7em
209; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
210; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
211; ARMv7m
212; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
213; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
214; ARMv6
215; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
216; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
217; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
218; ARMv6k
219; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s 2> %t | FileCheck %s --check-prefix=NO-STRICT-ALIGN
220; RUN: FileCheck %s < %t --allow-empty --check-prefix=CPU-SUPPORTED
221; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
222; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
223; ARMv6m
224; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
225; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
226; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
227; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
228; ARMv5
229; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN
230; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
231
232; ARMv8-R
233; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-vfp2,-fp16 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NOFPU
234; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-neon,+fp-only-sp,+d16 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-SP
235; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NEON
236
237; ARMv8-M
238; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=STRICT-ALIGN
239; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
240; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
241; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p | FileCheck %s --check-prefix=NO-STRICT-ALIGN
242; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
243
244; CPU-SUPPORTED-NOT: is not a recognized processor for this target
245
246; XSCALE:      .eabi_attribute 6, 5
247; XSCALE:      .eabi_attribute 8, 1
248; XSCALE:      .eabi_attribute 9, 1
249
250; DYN-ROUNDING: .eabi_attribute 19, 1
251
252; V6:   .eabi_attribute 6, 6
253; V6:   .eabi_attribute 8, 1
254;; We assume round-to-nearest by default (matches GCC)
255; V6-NOT:   .eabi_attribute 27
256; V6-NOT:    .eabi_attribute 36
257; V6-NOT:    .eabi_attribute 42
258; V6-NOT:  .eabi_attribute 44
259; V6-NOT:    .eabi_attribute 68
260; V6-NOT:   .eabi_attribute 19
261;; The default choice made by llc is for a V6 CPU without an FPU.
262;; This is not an interesting detail, but for such CPUs, the default intention is to use
263;; software floating-point support. The choice is not important for targets without
264;; FPU support!
265; V6:   .eabi_attribute 20, 1
266; V6:   .eabi_attribute 21, 1
267; V6-NOT:   .eabi_attribute 22
268; V6:   .eabi_attribute 23, 3
269; V6:   .eabi_attribute 24, 1
270; V6:   .eabi_attribute 25, 1
271; V6-NOT:   .eabi_attribute 28
272; V6:    .eabi_attribute 38, 1
273
274; V6-FAST-NOT:   .eabi_attribute 19
275;; Despite the V6 CPU having no FPU by default, we chose to flush to
276;; positive zero here. There's no hardware support doing this, but the
277;; fast maths software library might.
278; V6-FAST-NOT:   .eabi_attribute 20
279; V6-FAST-NOT:   .eabi_attribute 21
280; V6-FAST-NOT:   .eabi_attribute 22
281; V6-FAST:   .eabi_attribute 23, 1
282
283;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for
284;; V6-M, however we don't model the OS extension so this is fine.
285; V6M:  .eabi_attribute 6, 12
286; V6M:  .eabi_attribute 7, 77
287; V6M:  .eabi_attribute 8, 0
288; V6M:  .eabi_attribute 9, 1
289; V6M-NOT:  .eabi_attribute 27
290; V6M-NOT:  .eabi_attribute 36
291; V6M-NOT:  .eabi_attribute 42
292; V6M-NOT:  .eabi_attribute 44
293; V6M-NOT:  .eabi_attribute 68
294; V6M-NOT:   .eabi_attribute 19
295;; The default choice made by llc is for a V6M CPU without an FPU.
296;; This is not an interesting detail, but for such CPUs, the default intention is to use
297;; software floating-point support. The choice is not important for targets without
298;; FPU support!
299; V6M:  .eabi_attribute 20, 1
300; V6M:   .eabi_attribute 21, 1
301; V6M-NOT:   .eabi_attribute 22
302; V6M:   .eabi_attribute 23, 3
303; V6M:  .eabi_attribute 24, 1
304; V6M:  .eabi_attribute 25, 1
305; V6M-NOT:  .eabi_attribute 28
306; V6M:  .eabi_attribute 38, 1
307
308; V6M-FAST-NOT:   .eabi_attribute 19
309;; Despite the V6M CPU having no FPU by default, we chose to flush to
310;; positive zero here. There's no hardware support doing this, but the
311;; fast maths software library might.
312; V6M-FAST-NOT:  .eabi_attribute 20
313; V6M-FAST-NOT:   .eabi_attribute 21
314; V6M-FAST-NOT:   .eabi_attribute 22
315; V6M-FAST:   .eabi_attribute 23, 1
316
317; ARM1156T2F-S: .cpu arm1156t2f-s
318; ARM1156T2F-S: .eabi_attribute 6, 8
319; ARM1156T2F-S: .eabi_attribute 8, 1
320; ARM1156T2F-S: .eabi_attribute 9, 2
321; ARM1156T2F-S: .fpu vfpv2
322; ARM1156T2F-S-NOT: .eabi_attribute 27
323; ARM1156T2F-S-NOT: .eabi_attribute 36
324; ARM1156T2F-S-NOT:    .eabi_attribute 42
325; ARM1156T2F-S-NOT:    .eabi_attribute 44
326; ARM1156T2F-S-NOT:    .eabi_attribute 68
327; ARM1156T2F-S-NOT:   .eabi_attribute 19
328;; We default to IEEE 754 compliance
329; ARM1156T2F-S: .eabi_attribute 20, 1
330; ARM1156T2F-S: .eabi_attribute 21, 1
331; ARM1156T2F-S-NOT: .eabi_attribute 22
332; ARM1156T2F-S: .eabi_attribute 23, 3
333; ARM1156T2F-S: .eabi_attribute 24, 1
334; ARM1156T2F-S: .eabi_attribute 25, 1
335; ARM1156T2F-S-NOT: .eabi_attribute 28
336; ARM1156T2F-S: .eabi_attribute 38, 1
337
338; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 19
339;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
340;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
341;; select. LLVM historically picks 0.
342; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
343; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 21
344; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 22
345; ARM1156T2F-S-FAST:   .eabi_attribute 23, 1
346
347; V7M:  .eabi_attribute 6, 10
348; V7M:  .eabi_attribute 7, 77
349; V7M:  .eabi_attribute 8, 0
350; V7M:  .eabi_attribute 9, 2
351; V7M-NOT:  .eabi_attribute 27
352; V7M-NOT:  .eabi_attribute 36
353; V7M-NOT:  .eabi_attribute 42
354; V7M-NOT:  .eabi_attribute 44
355; V7M-NOT:  .eabi_attribute 68
356; V7M-NOT:   .eabi_attribute 19
357;; The default choice made by llc is for a V7M CPU without an FPU.
358;; This is not an interesting detail, but for such CPUs, the default intention is to use
359;; software floating-point support. The choice is not important for targets without
360;; FPU support!
361; V7M:  .eabi_attribute 20, 1
362; V7M: .eabi_attribute 21, 1
363; V7M-NOT: .eabi_attribute 22
364; V7M: .eabi_attribute 23, 3
365; V7M:  .eabi_attribute 24, 1
366; V7M:  .eabi_attribute 25, 1
367; V7M-NOT:  .eabi_attribute 28
368; V7M:  .eabi_attribute 38, 1
369
370; V7M-FAST-NOT:   .eabi_attribute 19
371;; Despite the V7M CPU having no FPU by default, we chose to flush
372;; preserving sign. This matches what the hardware would do in the
373;; architecture revision were to exist on the current target.
374; V7M-FAST:  .eabi_attribute 20, 2
375; V7M-FAST-NOT:   .eabi_attribute 21
376; V7M-FAST-NOT:   .eabi_attribute 22
377; V7M-FAST:   .eabi_attribute 23, 1
378
379; V7:      .syntax unified
380; V7: .eabi_attribute 6, 10
381; V7-NOT: .eabi_attribute 27
382; V7-NOT: .eabi_attribute 36
383; V7-NOT:    .eabi_attribute 42
384; V7-NOT:    .eabi_attribute 44
385; V7-NOT:    .eabi_attribute 68
386; V7-NOT:   .eabi_attribute 19
387;; In safe-maths mode we default to an IEEE 754 compliant choice.
388; V7: .eabi_attribute 20, 1
389; V7: .eabi_attribute 21, 1
390; V7-NOT: .eabi_attribute 22
391; V7: .eabi_attribute 23, 3
392; V7: .eabi_attribute 24, 1
393; V7: .eabi_attribute 25, 1
394; V7-NOT: .eabi_attribute 28
395; V7: .eabi_attribute 38, 1
396
397; V7-FAST-NOT:   .eabi_attribute 19
398;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
399;; denormals to zero preserving the sign.
400; V7-FAST: .eabi_attribute 20, 2
401; V7-FAST-NOT:   .eabi_attribute 21
402; V7-FAST-NOT:   .eabi_attribute 22
403; V7-FAST:   .eabi_attribute 23, 1
404
405; V7VE:      .syntax unified
406; V7VE: .eabi_attribute 6, 10   @ Tag_CPU_arch
407; V7VE: .eabi_attribute 7, 65   @ Tag_CPU_arch_profile
408; V7VE: .eabi_attribute 8, 1    @ Tag_ARM_ISA_use
409; V7VE: .eabi_attribute 9, 2    @ Tag_THUMB_ISA_use
410; V7VE: .eabi_attribute 42, 1   @ Tag_MPextension_use
411; V7VE: .eabi_attribute 44, 2   @ Tag_DIV_use
412; V7VE: .eabi_attribute 68, 3   @ Tag_Virtualization_use
413; V7VE: .eabi_attribute 17, 1   @ Tag_ABI_PCS_GOT_use
414; V7VE: .eabi_attribute 20, 1   @ Tag_ABI_FP_denormal
415; V7VE: .eabi_attribute 21, 1   @ Tag_ABI_FP_exceptions
416; V7VE: .eabi_attribute 23, 3   @ Tag_ABI_FP_number_model
417; V7VE: .eabi_attribute 24, 1   @ Tag_ABI_align_needed
418; V7VE: .eabi_attribute 25, 1   @ Tag_ABI_align_preserved
419; V7VE: .eabi_attribute 38, 1   @ Tag_ABI_FP_16bit_format
420
421; V8:      .syntax unified
422; V8: .eabi_attribute 67, "2.09"
423; V8: .eabi_attribute 6, 14
424; V8-NOT: .eabi_attribute 44
425; V8-NOT:   .eabi_attribute 19
426; V8: .eabi_attribute 20, 1
427; V8: .eabi_attribute 21, 1
428; V8-NOT: .eabi_attribute 22
429; V8: .eabi_attribute 23, 3
430
431; V8-FAST-NOT:   .eabi_attribute 19
432;; The default does have an FPU, and for V8-A, it flushes preserving sign.
433; V8-FAST: .eabi_attribute 20, 2
434; V8-FAST-NOT: .eabi_attribute 21
435; V8-FAST-NOT: .eabi_attribute 22
436; V8-FAST: .eabi_attribute 23, 1
437
438; Vt8:     .syntax unified
439; Vt8: .eabi_attribute 6, 14
440; Vt8-NOT:   .eabi_attribute 19
441; Vt8: .eabi_attribute 20, 1
442; Vt8: .eabi_attribute 21, 1
443; Vt8-NOT: .eabi_attribute 22
444; Vt8: .eabi_attribute 23, 3
445
446; V8-FPARMv8:      .syntax unified
447; V8-FPARMv8: .eabi_attribute 6, 14
448; V8-FPARMv8: .fpu fp-armv8
449
450; V8-NEON:      .syntax unified
451; V8-NEON: .eabi_attribute 6, 14
452; V8-NEON: .fpu neon
453; V8-NEON: .eabi_attribute 12, 3
454
455; V8-FPARMv8-NEON:      .syntax unified
456; V8-FPARMv8-NEON: .eabi_attribute 6, 14
457; V8-FPARMv8-NEON: .fpu neon-fp-armv8
458; V8-FPARMv8-NEON: .eabi_attribute 12, 3
459
460; V8-FPARMv8-NEON-CRYPTO:      .syntax unified
461; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
462; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
463; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
464
465; V8MBASELINE: .syntax unified
466; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline
467; V8MBASELINE: .eabi_attribute 6, 16
468; '7' is Tag_CPU_arch_profile, '77' is 'M'
469; V8MBASELINE: .eabi_attribute 7, 77
470; '8' is Tag_ARM_ISA_use
471; V8MBASELINE: .eabi_attribute 8, 0
472; '9' is Tag_Thumb_ISA_use
473; V8MBASELINE: .eabi_attribute 9, 3
474
475; V8MMAINLINE: .syntax unified
476; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline
477; V8MMAINLINE: .eabi_attribute 6, 17
478; V8MMAINLINE: .eabi_attribute 7, 77
479; V8MMAINLINE: .eabi_attribute 8, 0
480; V8MMAINLINE: .eabi_attribute 9, 3
481; V8MMAINLINE_DSP-NOT: .eabi_attribute 46
482
483; V8MMAINLINE_DSP: .syntax unified
484; V8MBASELINE_DSP: .eabi_attribute 6, 17
485; V8MBASELINE_DSP: .eabi_attribute 7, 77
486; V8MMAINLINE_DSP: .eabi_attribute 8, 0
487; V8MMAINLINE_DSP: .eabi_attribute 9, 3
488; V8MMAINLINE_DSP: .eabi_attribute 46, 1
489
490; Tag_CPU_unaligned_access
491; NO-STRICT-ALIGN: .eabi_attribute 34, 1
492; STRICT-ALIGN: .eabi_attribute 34, 0
493
494; Tag_CPU_arch  'ARMv7'
495; CORTEX-A7-CHECK: .eabi_attribute      6, 10
496; CORTEX-A7-NOFPU: .eabi_attribute      6, 10
497
498; CORTEX-A7-FPUV4: .eabi_attribute      6, 10
499
500; Tag_CPU_arch_profile 'A'
501; CORTEX-A7-CHECK: .eabi_attribute      7, 65
502; CORTEX-A7-NOFPU: .eabi_attribute      7, 65
503; CORTEX-A7-FPUV4: .eabi_attribute      7, 65
504
505; Tag_ARM_ISA_use
506; CORTEX-A7-CHECK: .eabi_attribute      8, 1
507; CORTEX-A7-NOFPU: .eabi_attribute      8, 1
508; CORTEX-A7-FPUV4: .eabi_attribute      8, 1
509
510; Tag_THUMB_ISA_use
511; CORTEX-A7-CHECK: .eabi_attribute      9, 2
512; CORTEX-A7-NOFPU: .eabi_attribute      9, 2
513; CORTEX-A7-FPUV4: .eabi_attribute      9, 2
514
515; CORTEX-A7-CHECK: .fpu neon-vfpv4
516; CORTEX-A7-NOFPU-NOT: .fpu
517; CORTEX-A7-FPUV4: .fpu vfpv4
518
519; CORTEX-A7-CHECK-NOT:   .eabi_attribute 19
520
521; Tag_FP_HP_extension
522; CORTEX-A7-CHECK: .eabi_attribute      36, 1
523; CORTEX-A7-NOFPU-NOT: .eabi_attribute  36
524; CORTEX-A7-FPUV4: .eabi_attribute      36, 1
525
526; Tag_MPextension_use
527; CORTEX-A7-CHECK: .eabi_attribute      42, 1
528; CORTEX-A7-NOFPU: .eabi_attribute      42, 1
529; CORTEX-A7-FPUV4: .eabi_attribute      42, 1
530
531; Tag_DIV_use
532; CORTEX-A7-CHECK: .eabi_attribute      44, 2
533; CORTEX-A7-NOFPU: .eabi_attribute      44, 2
534; CORTEX-A7-FPUV4: .eabi_attribute      44, 2
535
536; Tag_DSP_extension
537; CORTEX-A7-CHECK-NOT: .eabi_attribute      46
538
539; Tag_Virtualization_use
540; CORTEX-A7-CHECK: .eabi_attribute      68, 3
541; CORTEX-A7-NOFPU: .eabi_attribute      68, 3
542; CORTEX-A7-FPUV4: .eabi_attribute      68, 3
543
544; Tag_ABI_FP_denormal
545;; We default to IEEE 754 compliance
546; CORTEX-A7-CHECK: .eabi_attribute      20, 1
547;; The A7 has VFPv3 support by default, so flush preserving sign.
548; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
549; CORTEX-A7-NOFPU: .eabi_attribute      20, 1
550;; Despite there being no FPU, we chose to flush to zero preserving
551;; sign. This matches what the hardware would do for this architecture
552;; revision.
553; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
554; CORTEX-A7-FPUV4: .eabi_attribute      20, 1
555;; The VFPv4 FPU flushes preserving sign.
556; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
557
558; Tag_ABI_FP_exceptions
559; CORTEX-A7-CHECK: .eabi_attribute      21, 1
560; CORTEX-A7-NOFPU: .eabi_attribute      21, 1
561; CORTEX-A7-FPUV4: .eabi_attribute      21, 1
562
563; Tag_ABI_FP_user_exceptions
564; CORTEX-A7-CHECK-NOT: .eabi_attribute      22
565; CORTEX-A7-NOFPU-NOT: .eabi_attribute      22
566; CORTEX-A7-FPUV4-NOT: .eabi_attribute      22
567
568; Tag_ABI_FP_number_model
569; CORTEX-A7-CHECK: .eabi_attribute      23, 3
570; CORTEX-A7-NOFPU: .eabi_attribute      23, 3
571; CORTEX-A7-FPUV4: .eabi_attribute      23, 3
572
573; Tag_ABI_align_needed
574; CORTEX-A7-CHECK: .eabi_attribute      24, 1
575; CORTEX-A7-NOFPU: .eabi_attribute      24, 1
576; CORTEX-A7-FPUV4: .eabi_attribute      24, 1
577
578; Tag_ABI_align_preserved
579; CORTEX-A7-CHECK: .eabi_attribute      25, 1
580; CORTEX-A7-NOFPU: .eabi_attribute      25, 1
581; CORTEX-A7-FPUV4: .eabi_attribute      25, 1
582
583; Tag_FP_16bit_format
584; CORTEX-A7-CHECK: .eabi_attribute      38, 1
585; CORTEX-A7-NOFPU: .eabi_attribute      38, 1
586; CORTEX-A7-FPUV4: .eabi_attribute      38, 1
587
588; CORTEX-A5-DEFAULT:        .cpu    cortex-a5
589; CORTEX-A5-DEFAULT:        .eabi_attribute 6, 10
590; CORTEX-A5-DEFAULT:        .eabi_attribute 7, 65
591; CORTEX-A5-DEFAULT:        .eabi_attribute 8, 1
592; CORTEX-A5-DEFAULT:        .eabi_attribute 9, 2
593; CORTEX-A5-DEFAULT:        .fpu    neon-vfpv4
594; CORTEX-A5-DEFAULT:        .eabi_attribute 42, 1
595; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 44
596; CORTEX-A5-DEFAULT:        .eabi_attribute 68, 1
597; CORTEX-A5-NOT:   .eabi_attribute 19
598;; We default to IEEE 754 compliance
599; CORTEX-A5-DEFAULT:        .eabi_attribute 20, 1
600; CORTEX-A5-DEFAULT:        .eabi_attribute 21, 1
601; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 22
602; CORTEX-A5-DEFAULT:        .eabi_attribute 23, 3
603; CORTEX-A5-DEFAULT:        .eabi_attribute 24, 1
604; CORTEX-A5-DEFAULT:        .eabi_attribute 25, 1
605
606; CORTEX-A5-DEFAULT-FAST-NOT:   .eabi_attribute 19
607;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math
608;; is given.
609; CORTEX-A5-DEFAULT-FAST:        .eabi_attribute 20, 2
610; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21
611; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22
612; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1
613
614; CORTEX-A5-NONEON:        .cpu    cortex-a5
615; CORTEX-A5-NONEON:        .eabi_attribute 6, 10
616; CORTEX-A5-NONEON:        .eabi_attribute 7, 65
617; CORTEX-A5-NONEON:        .eabi_attribute 8, 1
618; CORTEX-A5-NONEON:        .eabi_attribute 9, 2
619; CORTEX-A5-NONEON:        .fpu    vfpv4-d16
620; CORTEX-A5-NONEON:        .eabi_attribute 42, 1
621; CORTEX-A5-NONEON:        .eabi_attribute 68, 1
622;; We default to IEEE 754 compliance
623; CORTEX-A5-NONEON:        .eabi_attribute 20, 1
624; CORTEX-A5-NONEON:        .eabi_attribute 21, 1
625; CORTEX-A5-NONEON-NOT:    .eabi_attribute 22
626; CORTEX-A5-NONEON:        .eabi_attribute 23, 3
627; CORTEX-A5-NONEON:        .eabi_attribute 24, 1
628; CORTEX-A5-NONEON:        .eabi_attribute 25, 1
629
630; CORTEX-A5-NONEON-FAST-NOT:   .eabi_attribute 19
631;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
632;; is given.
633; CORTEX-A5-NONEON-FAST:        .eabi_attribute 20, 2
634; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21
635; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22
636; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1
637
638; CORTEX-A5-NOFPU:        .cpu    cortex-a5
639; CORTEX-A5-NOFPU:        .eabi_attribute 6, 10
640; CORTEX-A5-NOFPU:        .eabi_attribute 7, 65
641; CORTEX-A5-NOFPU:        .eabi_attribute 8, 1
642; CORTEX-A5-NOFPU:        .eabi_attribute 9, 2
643; CORTEX-A5-NOFPU-NOT:    .fpu
644; CORTEX-A5-NOFPU:        .eabi_attribute 42, 1
645; CORTEX-A5-NOFPU:        .eabi_attribute 68, 1
646; CORTEX-A5-NOFPU-NOT:   .eabi_attribute 19
647;; We default to IEEE 754 compliance
648; CORTEX-A5-NOFPU:        .eabi_attribute 20, 1
649; CORTEX-A5-NOFPU:        .eabi_attribute 21, 1
650; CORTEX-A5-NOFPU-NOT:    .eabi_attribute 22
651; CORTEX-A5-NOFPU:        .eabi_attribute 23, 3
652; CORTEX-A5-NOFPU:        .eabi_attribute 24, 1
653; CORTEX-A5-NOFPU:        .eabi_attribute 25, 1
654
655; CORTEX-A5-NOFPU-FAST-NOT:   .eabi_attribute 19
656;; Despite there being no FPU, we chose to flush to zero preserving
657;; sign. This matches what the hardware would do for this architecture
658;; revision.
659; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
660; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21
661; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22
662; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1
663
664; CORTEX-A8-SOFT:  .cpu cortex-a8
665; CORTEX-A8-SOFT:  .eabi_attribute 6, 10
666; CORTEX-A8-SOFT:  .eabi_attribute 7, 65
667; CORTEX-A8-SOFT:  .eabi_attribute 8, 1
668; CORTEX-A8-SOFT:  .eabi_attribute 9, 2
669; CORTEX-A8-SOFT:  .fpu neon
670; CORTEX-A8-SOFT-NOT:  .eabi_attribute 27
671; CORTEX-A8-SOFT-NOT:  .eabi_attribute 36, 1
672; CORTEX-A8-SOFT-NOT:  .eabi_attribute 42, 1
673; CORTEX-A8-SOFT-NOT:  .eabi_attribute 44
674; CORTEX-A8-SOFT:  .eabi_attribute 68, 1
675; CORTEX-A8-SOFT-NOT:   .eabi_attribute 19
676;; We default to IEEE 754 compliance
677; CORTEX-A8-SOFT:  .eabi_attribute 20, 1
678; CORTEX-A8-SOFT:  .eabi_attribute 21, 1
679; CORTEX-A8-SOFT-NOT:  .eabi_attribute 22
680; CORTEX-A8-SOFT:  .eabi_attribute 23, 3
681; CORTEX-A8-SOFT:  .eabi_attribute 24, 1
682; CORTEX-A8-SOFT:  .eabi_attribute 25, 1
683; CORTEX-A8-SOFT-NOT:  .eabi_attribute 28
684; CORTEX-A8-SOFT:  .eabi_attribute 38, 1
685
686; CORTEX-A9-SOFT:  .cpu cortex-a9
687; CORTEX-A9-SOFT:  .eabi_attribute 6, 10
688; CORTEX-A9-SOFT:  .eabi_attribute 7, 65
689; CORTEX-A9-SOFT:  .eabi_attribute 8, 1
690; CORTEX-A9-SOFT:  .eabi_attribute 9, 2
691; CORTEX-A9-SOFT:  .fpu neon
692; CORTEX-A9-SOFT-NOT:  .eabi_attribute 27
693; CORTEX-A9-SOFT:  .eabi_attribute 36, 1
694; CORTEX-A9-SOFT:  .eabi_attribute 42, 1
695; CORTEX-A9-SOFT-NOT:  .eabi_attribute 44
696; CORTEX-A9-SOFT:  .eabi_attribute 68, 1
697; CORTEX-A9-SOFT-NOT:   .eabi_attribute 19
698;; We default to IEEE 754 compliance
699; CORTEX-A9-SOFT:  .eabi_attribute 20, 1
700; CORTEX-A9-SOFT:  .eabi_attribute 21, 1
701; CORTEX-A9-SOFT-NOT:  .eabi_attribute 22
702; CORTEX-A9-SOFT:  .eabi_attribute 23, 3
703; CORTEX-A9-SOFT:  .eabi_attribute 24, 1
704; CORTEX-A9-SOFT:  .eabi_attribute 25, 1
705; CORTEX-A9-SOFT-NOT:  .eabi_attribute 28
706; CORTEX-A9-SOFT:  .eabi_attribute 38, 1
707
708; CORTEX-A8-SOFT-FAST-NOT:   .eabi_attribute 19
709; CORTEX-A9-SOFT-FAST-NOT:   .eabi_attribute 19
710;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
711;; -ffast-math is specified.
712; CORTEX-A8-SOFT-FAST:  .eabi_attribute 20, 2
713; CORTEX-A9-SOFT-FAST:  .eabi_attribute 20, 2
714; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21
715; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22
716; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1
717
718; CORTEX-A8-HARD:  .cpu cortex-a8
719; CORTEX-A8-HARD:  .eabi_attribute 6, 10
720; CORTEX-A8-HARD:  .eabi_attribute 7, 65
721; CORTEX-A8-HARD:  .eabi_attribute 8, 1
722; CORTEX-A8-HARD:  .eabi_attribute 9, 2
723; CORTEX-A8-HARD:  .fpu neon
724; CORTEX-A8-HARD-NOT:  .eabi_attribute 27
725; CORTEX-A8-HARD-NOT:  .eabi_attribute 36, 1
726; CORTEX-A8-HARD-NOT:  .eabi_attribute 42, 1
727; CORTEX-A8-HARD:  .eabi_attribute 68, 1
728; CORTEX-A8-HARD-NOT:   .eabi_attribute 19
729;; We default to IEEE 754 compliance
730; CORTEX-A8-HARD:  .eabi_attribute 20, 1
731; CORTEX-A8-HARD:  .eabi_attribute 21, 1
732; CORTEX-A8-HARD-NOT:  .eabi_attribute 22
733; CORTEX-A8-HARD:  .eabi_attribute 23, 3
734; CORTEX-A8-HARD:  .eabi_attribute 24, 1
735; CORTEX-A8-HARD:  .eabi_attribute 25, 1
736; CORTEX-A8-HARD:  .eabi_attribute 28, 1
737; CORTEX-A8-HARD:  .eabi_attribute 38, 1
738
739
740
741; CORTEX-A9-HARD:  .cpu cortex-a9
742; CORTEX-A9-HARD:  .eabi_attribute 6, 10
743; CORTEX-A9-HARD:  .eabi_attribute 7, 65
744; CORTEX-A9-HARD:  .eabi_attribute 8, 1
745; CORTEX-A9-HARD:  .eabi_attribute 9, 2
746; CORTEX-A9-HARD:  .fpu neon
747; CORTEX-A9-HARD-NOT:  .eabi_attribute 27
748; CORTEX-A9-HARD:  .eabi_attribute 36, 1
749; CORTEX-A9-HARD:  .eabi_attribute 42, 1
750; CORTEX-A9-HARD:  .eabi_attribute 68, 1
751; CORTEX-A9-HARD-NOT:   .eabi_attribute 19
752;; We default to IEEE 754 compliance
753; CORTEX-A9-HARD:  .eabi_attribute 20, 1
754; CORTEX-A9-HARD:  .eabi_attribute 21, 1
755; CORTEX-A9-HARD-NOT:  .eabi_attribute 22
756; CORTEX-A9-HARD:  .eabi_attribute 23, 3
757; CORTEX-A9-HARD:  .eabi_attribute 24, 1
758; CORTEX-A9-HARD:  .eabi_attribute 25, 1
759; CORTEX-A9-HARD:  .eabi_attribute 28, 1
760; CORTEX-A9-HARD:  .eabi_attribute 38, 1
761
762; CORTEX-A8-HARD-FAST-NOT:   .eabi_attribute 19
763;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when
764;; -ffast-math is specified.
765; CORTEX-A8-HARD-FAST:  .eabi_attribute 20, 2
766; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 21
767; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 22
768; CORTEX-A8-HARD-FAST:  .eabi_attribute 23, 1
769
770; CORTEX-A9-HARD-FAST-NOT:   .eabi_attribute 19
771;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
772;; -ffast-math is specified.
773; CORTEX-A9-HARD-FAST:  .eabi_attribute 20, 2
774; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 21
775; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 22
776; CORTEX-A9-HARD-FAST:  .eabi_attribute 23, 1
777
778; CORTEX-A12-DEFAULT:  .cpu cortex-a12
779; CORTEX-A12-DEFAULT:  .eabi_attribute 6, 10
780; CORTEX-A12-DEFAULT:  .eabi_attribute 7, 65
781; CORTEX-A12-DEFAULT:  .eabi_attribute 8, 1
782; CORTEX-A12-DEFAULT:  .eabi_attribute 9, 2
783; CORTEX-A12-DEFAULT:  .fpu neon-vfpv4
784; CORTEX-A12-DEFAULT:  .eabi_attribute 42, 1
785; CORTEX-A12-DEFAULT:  .eabi_attribute 44, 2
786; CORTEX-A12-DEFAULT:  .eabi_attribute 68, 3
787; CORTEX-A12-DEFAULT-NOT:   .eabi_attribute 19
788;; We default to IEEE 754 compliance
789; CORTEX-A12-DEFAULT:  .eabi_attribute 20, 1
790; CORTEX-A12-DEFAULT:  .eabi_attribute 21, 1
791; CORTEX-A12-DEFAULT-NOT:  .eabi_attribute 22
792; CORTEX-A12-DEFAULT:  .eabi_attribute 23, 3
793; CORTEX-A12-DEFAULT:  .eabi_attribute 24, 1
794; CORTEX-A12-DEFAULT:  .eabi_attribute 25, 1
795
796; CORTEX-A12-DEFAULT-FAST-NOT:   .eabi_attribute 19
797;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when
798;; -ffast-math is specified.
799; CORTEX-A12-DEFAULT-FAST:  .eabi_attribute 20, 2
800; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 21
801; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 22
802; CORTEX-A12-HARD-FAST:  .eabi_attribute 23, 1
803
804; CORTEX-A12-NOFPU:  .cpu cortex-a12
805; CORTEX-A12-NOFPU:  .eabi_attribute 6, 10
806; CORTEX-A12-NOFPU:  .eabi_attribute 7, 65
807; CORTEX-A12-NOFPU:  .eabi_attribute 8, 1
808; CORTEX-A12-NOFPU:  .eabi_attribute 9, 2
809; CORTEX-A12-NOFPU-NOT:  .fpu
810; CORTEX-A12-NOFPU:  .eabi_attribute 42, 1
811; CORTEX-A12-NOFPU:  .eabi_attribute 44, 2
812; CORTEX-A12-NOFPU:  .eabi_attribute 68, 3
813; CORTEX-A12-NOFPU-NOT:   .eabi_attribute 19
814;; We default to IEEE 754 compliance
815; CORTEX-A12-NOFPU:  .eabi_attribute 20, 1
816; CORTEX-A12-NOFPU:  .eabi_attribute 21, 1
817; CORTEX-A12-NOFPU-NOT:  .eabi_attribute 22
818; CORTEX-A12-NOFPU:  .eabi_attribute 23, 3
819; CORTEX-A12-NOFPU:  .eabi_attribute 24, 1
820; CORTEX-A12-NOFPU:  .eabi_attribute 25, 1
821
822; CORTEX-A12-NOFPU-FAST-NOT:   .eabi_attribute 19
823;; Despite there being no FPU, we chose to flush to zero preserving
824;; sign. This matches what the hardware would do for this architecture
825;; revision.
826; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 20, 2
827; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 21
828; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 22
829; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 23, 1
830
831; CORTEX-A15: .cpu cortex-a15
832; CORTEX-A15: .eabi_attribute 6, 10
833; CORTEX-A15: .eabi_attribute 7, 65
834; CORTEX-A15: .eabi_attribute 8, 1
835; CORTEX-A15: .eabi_attribute 9, 2
836; CORTEX-A15: .fpu neon-vfpv4
837; CORTEX-A15-NOT: .eabi_attribute 27
838; CORTEX-A15: .eabi_attribute 36, 1
839; CORTEX-A15: .eabi_attribute 42, 1
840; CORTEX-A15: .eabi_attribute 44, 2
841; CORTEX-A15: .eabi_attribute 68, 3
842; CORTEX-A15-NOT:   .eabi_attribute 19
843;; We default to IEEE 754 compliance
844; CORTEX-A15: .eabi_attribute 20, 1
845; CORTEX-A15: .eabi_attribute 21, 1
846; CORTEX-A15-NOT: .eabi_attribute 22
847; CORTEX-A15: .eabi_attribute 23, 3
848; CORTEX-A15: .eabi_attribute 24, 1
849; CORTEX-A15: .eabi_attribute 25, 1
850; CORTEX-A15-NOT: .eabi_attribute 28
851; CORTEX-A15: .eabi_attribute 38, 1
852
853; CORTEX-A15-FAST-NOT:   .eabi_attribute 19
854;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when
855;; -ffast-math is specified.
856; CORTEX-A15-FAST: .eabi_attribute 20, 2
857; CORTEX-A15-FAST-NOT:  .eabi_attribute 21
858; CORTEX-A15-FAST-NOT:  .eabi_attribute 22
859; CORTEX-A15-FAST:  .eabi_attribute 23, 1
860
861; CORTEX-A17-DEFAULT:  .cpu cortex-a17
862; CORTEX-A17-DEFAULT:  .eabi_attribute 6, 10
863; CORTEX-A17-DEFAULT:  .eabi_attribute 7, 65
864; CORTEX-A17-DEFAULT:  .eabi_attribute 8, 1
865; CORTEX-A17-DEFAULT:  .eabi_attribute 9, 2
866; CORTEX-A17-DEFAULT:  .fpu neon-vfpv4
867; CORTEX-A17-DEFAULT:  .eabi_attribute 42, 1
868; CORTEX-A17-DEFAULT:  .eabi_attribute 44, 2
869; CORTEX-A17-DEFAULT:  .eabi_attribute 68, 3
870; CORTEX-A17-DEFAULT-NOT:   .eabi_attribute 19
871;; We default to IEEE 754 compliance
872; CORTEX-A17-DEFAULT:  .eabi_attribute 20, 1
873; CORTEX-A17-DEFAULT:  .eabi_attribute 21, 1
874; CORTEX-A17-DEFAULT-NOT:  .eabi_attribute 22
875; CORTEX-A17-DEFAULT:  .eabi_attribute 23, 3
876; CORTEX-A17-DEFAULT:  .eabi_attribute 24, 1
877; CORTEX-A17-DEFAULT:  .eabi_attribute 25, 1
878
879; CORTEX-A17-FAST-NOT:   .eabi_attribute 19
880;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when
881;; -ffast-math is specified.
882; CORTEX-A17-FAST:  .eabi_attribute 20, 2
883; CORTEX-A17-FAST-NOT:  .eabi_attribute 21
884; CORTEX-A17-FAST-NOT:  .eabi_attribute 22
885; CORTEX-A17-FAST:  .eabi_attribute 23, 1
886
887; CORTEX-A17-NOFPU:  .cpu cortex-a17
888; CORTEX-A17-NOFPU:  .eabi_attribute 6, 10
889; CORTEX-A17-NOFPU:  .eabi_attribute 7, 65
890; CORTEX-A17-NOFPU:  .eabi_attribute 8, 1
891; CORTEX-A17-NOFPU:  .eabi_attribute 9, 2
892; CORTEX-A17-NOFPU-NOT:  .fpu
893; CORTEX-A17-NOFPU:  .eabi_attribute 42, 1
894; CORTEX-A17-NOFPU:  .eabi_attribute 44, 2
895; CORTEX-A17-NOFPU:  .eabi_attribute 68, 3
896; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
897;; We default to IEEE 754 compliance
898; CORTEX-A17-NOFPU:  .eabi_attribute 20, 1
899; CORTEX-A17-NOFPU:  .eabi_attribute 21, 1
900; CORTEX-A17-NOFPU-NOT:  .eabi_attribute 22
901; CORTEX-A17-NOFPU:  .eabi_attribute 23, 3
902; CORTEX-A17-NOFPU:  .eabi_attribute 24, 1
903; CORTEX-A17-NOFPU:  .eabi_attribute 25, 1
904
905; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
906;; Despite there being no FPU, we chose to flush to zero preserving
907;; sign. This matches what the hardware would do for this architecture
908;; revision.
909; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 20, 2
910; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 21
911; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 22
912; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 23, 1
913
914; Test flags -enable-no-trapping-fp-math and -denormal-fp-math:
915; NO-TRAPPING-MATH:  .eabi_attribute 21, 0
916; DENORMAL-IEEE:  .eabi_attribute 20, 1
917; DENORMAL-PRESERVE-SIGN:  .eabi_attribute 20, 2
918; DENORMAL-POSITIVE-ZERO:  .eabi_attribute 20, 0
919
920; CORTEX-M0:  .cpu cortex-m0
921; CORTEX-M0:  .eabi_attribute 6, 12
922; CORTEX-M0:  .eabi_attribute 7, 77
923; CORTEX-M0:  .eabi_attribute 8, 0
924; CORTEX-M0:  .eabi_attribute 9, 1
925; CORTEX-M0-NOT:  .eabi_attribute 27
926; CORTEX-M0-NOT:  .eabi_attribute 36
927; CORTEX-M0: .eabi_attribute 34, 0
928; CORTEX-M0-NOT:  .eabi_attribute 42
929; CORTEX-M0-NOT:  .eabi_attribute 44
930; CORTEX-M0-NOT:  .eabi_attribute 68
931; CORTEX-M0-NOT:   .eabi_attribute 19
932;; We default to IEEE 754 compliance
933; CORTEX-M0:  .eabi_attribute 20, 1
934; CORTEX-M0:  .eabi_attribute 21, 1
935; CORTEX-M0-NOT:  .eabi_attribute 22
936; CORTEX-M0:  .eabi_attribute 23, 3
937; CORTEX-M0:  .eabi_attribute 24, 1
938; CORTEX-M0:  .eabi_attribute 25, 1
939; CORTEX-M0-NOT:  .eabi_attribute 28
940; CORTEX-M0:  .eabi_attribute 38, 1
941
942; CORTEX-M0-FAST-NOT:   .eabi_attribute 19
943;; Despite the M0 CPU having no FPU in this scenario, we chose to
944;; flush to positive zero here. There's no hardware support doing
945;; this, but the fast maths software library might and such behaviour
946;; would match hardware support on this architecture revision if it
947;; existed.
948; CORTEX-M0-FAST-NOT:  .eabi_attribute 20
949; CORTEX-M0-FAST-NOT:  .eabi_attribute 21
950; CORTEX-M0-FAST-NOT:  .eabi_attribute 22
951; CORTEX-M0-FAST:  .eabi_attribute 23, 1
952
953; CORTEX-M0PLUS:  .cpu cortex-m0plus
954; CORTEX-M0PLUS:  .eabi_attribute 6, 12
955; CORTEX-M0PLUS:  .eabi_attribute 7, 77
956; CORTEX-M0PLUS:  .eabi_attribute 8, 0
957; CORTEX-M0PLUS:  .eabi_attribute 9, 1
958; CORTEX-M0PLUS-NOT:  .eabi_attribute 27
959; CORTEX-M0PLUS-NOT:  .eabi_attribute 36
960; CORTEX-M0PLUS-NOT:  .eabi_attribute 42
961; CORTEX-M0PLUS-NOT:  .eabi_attribute 44
962; CORTEX-M0PLUS-NOT:  .eabi_attribute 68
963; CORTEX-M0PLUS-NOT:   .eabi_attribute 19
964;; We default to IEEE 754 compliance
965; CORTEX-M0PLUS:  .eabi_attribute 20, 1
966; CORTEX-M0PLUS:  .eabi_attribute 21, 1
967; CORTEX-M0PLUS-NOT:  .eabi_attribute 22
968; CORTEX-M0PLUS:  .eabi_attribute 23, 3
969; CORTEX-M0PLUS:  .eabi_attribute 24, 1
970; CORTEX-M0PLUS:  .eabi_attribute 25, 1
971; CORTEX-M0PLUS-NOT:  .eabi_attribute 28
972; CORTEX-M0PLUS:  .eabi_attribute 38, 1
973
974; CORTEX-M0PLUS-FAST-NOT:   .eabi_attribute 19
975;; Despite the M0+ CPU having no FPU in this scenario, we chose to
976;; flush to positive zero here. There's no hardware support doing
977;; this, but the fast maths software library might and such behaviour
978;; would match hardware support on this architecture revision if it
979;; existed.
980; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 20
981; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 21
982; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 22
983; CORTEX-M0PLUS-FAST:  .eabi_attribute 23, 1
984
985; CORTEX-M1:  .cpu cortex-m1
986; CORTEX-M1:  .eabi_attribute 6, 12
987; CORTEX-M1:  .eabi_attribute 7, 77
988; CORTEX-M1:  .eabi_attribute 8, 0
989; CORTEX-M1:  .eabi_attribute 9, 1
990; CORTEX-M1-NOT:  .eabi_attribute 27
991; CORTEX-M1-NOT:  .eabi_attribute 36
992; CORTEX-M1-NOT:  .eabi_attribute 42
993; CORTEX-M1-NOT:  .eabi_attribute 44
994; CORTEX-M1-NOT:  .eabi_attribute 68
995; CORTEX-M1-NOT:   .eabi_attribute 19
996;; We default to IEEE 754 compliance
997; CORTEX-M1:  .eabi_attribute 20, 1
998; CORTEX-M1:  .eabi_attribute 21, 1
999; CORTEX-M1-NOT:  .eabi_attribute 22
1000; CORTEX-M1:  .eabi_attribute 23, 3
1001; CORTEX-M1:  .eabi_attribute 24, 1
1002; CORTEX-M1:  .eabi_attribute 25, 1
1003; CORTEX-M1-NOT:  .eabi_attribute 28
1004; CORTEX-M1:  .eabi_attribute 38, 1
1005
1006; CORTEX-M1-FAST-NOT:   .eabi_attribute 19
1007;; Despite the M1 CPU having no FPU in this scenario, we chose to
1008;; flush to positive zero here. There's no hardware support doing
1009;; this, but the fast maths software library might and such behaviour
1010;; would match hardware support on this architecture revision if it
1011;; existed.
1012; CORTEX-M1-FAST-NOT:  .eabi_attribute 20
1013; CORTEX-M1-FAST-NOT:  .eabi_attribute 21
1014; CORTEX-M1-FAST-NOT:  .eabi_attribute 22
1015; CORTEX-M1-FAST:  .eabi_attribute 23, 1
1016
1017; SC000:  .cpu sc000
1018; SC000:  .eabi_attribute 6, 12
1019; SC000:  .eabi_attribute 7, 77
1020; SC000:  .eabi_attribute 8, 0
1021; SC000:  .eabi_attribute 9, 1
1022; SC000-NOT:  .eabi_attribute 27
1023; SC000-NOT:  .eabi_attribute 42
1024; SC000-NOT:  .eabi_attribute 44
1025; SC000-NOT:  .eabi_attribute 68
1026; SC000-NOT:   .eabi_attribute 19
1027;; We default to IEEE 754 compliance
1028; SC000:  .eabi_attribute 20, 1
1029; SC000:  .eabi_attribute 21, 1
1030; SC000-NOT:  .eabi_attribute 22
1031; SC000:  .eabi_attribute 23, 3
1032; SC000:  .eabi_attribute 24, 1
1033; SC000:  .eabi_attribute 25, 1
1034; SC000-NOT:  .eabi_attribute 28
1035; SC000:  .eabi_attribute 38, 1
1036
1037; SC000-FAST-NOT:   .eabi_attribute 19
1038;; Despite the SC000 CPU having no FPU in this scenario, we chose to
1039;; flush to positive zero here. There's no hardware support doing
1040;; this, but the fast maths software library might and such behaviour
1041;; would match hardware support on this architecture revision if it
1042;; existed.
1043; SC000-FAST-NOT:  .eabi_attribute 20
1044; SC000-FAST-NOT:  .eabi_attribute 21
1045; SC000-FAST-NOT:  .eabi_attribute 22
1046; SC000-FAST:  .eabi_attribute 23, 1
1047
1048; CORTEX-M3:  .cpu cortex-m3
1049; CORTEX-M3:  .eabi_attribute 6, 10
1050; CORTEX-M3:  .eabi_attribute 7, 77
1051; CORTEX-M3:  .eabi_attribute 8, 0
1052; CORTEX-M3:  .eabi_attribute 9, 2
1053; CORTEX-M3-NOT:  .eabi_attribute 27
1054; CORTEX-M3-NOT:  .eabi_attribute 36
1055; CORTEX-M3-NOT:  .eabi_attribute 42
1056; CORTEX-M3-NOT:  .eabi_attribute 44
1057; CORTEX-M3-NOT:  .eabi_attribute 68
1058; CORTEX-M3-NOT:   .eabi_attribute 19
1059;; We default to IEEE 754 compliance
1060; CORTEX-M3:  .eabi_attribute 20, 1
1061; CORTEX-M3:  .eabi_attribute 21, 1
1062; CORTEX-M3-NOT:  .eabi_attribute 22
1063; CORTEX-M3:  .eabi_attribute 23, 3
1064; CORTEX-M3:  .eabi_attribute 24, 1
1065; CORTEX-M3:  .eabi_attribute 25, 1
1066; CORTEX-M3-NOT:  .eabi_attribute 28
1067; CORTEX-M3:  .eabi_attribute 38, 1
1068
1069; CORTEX-M3-FAST-NOT:   .eabi_attribute 19
1070;; Despite there being no FPU, we chose to flush to zero preserving
1071;; sign. This matches what the hardware would do for this architecture
1072;; revision.
1073; CORTEX-M3-FAST:  .eabi_attribute 20, 2
1074; CORTEX-M3-FAST-NOT:  .eabi_attribute 21
1075; CORTEX-M3-FAST-NOT:  .eabi_attribute 22
1076; CORTEX-M3-FAST:  .eabi_attribute 23, 1
1077
1078; SC300:  .cpu sc300
1079; SC300:  .eabi_attribute 6, 10
1080; SC300:  .eabi_attribute 7, 77
1081; SC300:  .eabi_attribute 8, 0
1082; SC300:  .eabi_attribute 9, 2
1083; SC300-NOT:  .eabi_attribute 27
1084; SC300-NOT:  .eabi_attribute 36
1085; SC300-NOT:  .eabi_attribute 42
1086; SC300-NOT:  .eabi_attribute 44
1087; SC300-NOT:  .eabi_attribute 68
1088; SC300-NOT:   .eabi_attribute 19
1089;; We default to IEEE 754 compliance
1090; SC300:  .eabi_attribute 20, 1
1091; SC300:  .eabi_attribute 21, 1
1092; SC300-NOT:  .eabi_attribute 22
1093; SC300:  .eabi_attribute 23, 3
1094; SC300:  .eabi_attribute 24, 1
1095; SC300:  .eabi_attribute 25, 1
1096; SC300-NOT:  .eabi_attribute 28
1097; SC300:  .eabi_attribute 38, 1
1098
1099; SC300-FAST-NOT:   .eabi_attribute 19
1100;; Despite there being no FPU, we chose to flush to zero preserving
1101;; sign. This matches what the hardware would do for this architecture
1102;; revision.
1103; SC300-FAST:  .eabi_attribute 20, 2
1104; SC300-FAST-NOT:  .eabi_attribute 21
1105; SC300-FAST-NOT:  .eabi_attribute 22
1106; SC300-FAST:  .eabi_attribute 23, 1
1107
1108; CORTEX-M4-SOFT:  .cpu cortex-m4
1109; CORTEX-M4-SOFT:  .eabi_attribute 6, 13
1110; CORTEX-M4-SOFT:  .eabi_attribute 7, 77
1111; CORTEX-M4-SOFT:  .eabi_attribute 8, 0
1112; CORTEX-M4-SOFT:  .eabi_attribute 9, 2
1113; CORTEX-M4-SOFT:  .fpu fpv4-sp-d16
1114; CORTEX-M4-SOFT:  .eabi_attribute 27, 1
1115; CORTEX-M4-SOFT:  .eabi_attribute 36, 1
1116; CORTEX-M4-SOFT-NOT:  .eabi_attribute 42
1117; CORTEX-M4-SOFT-NOT:  .eabi_attribute 44
1118; CORTEX-M4-SOFT-NOT:  .eabi_attribute 68
1119; CORTEX-M4-SOFT-NOT:   .eabi_attribute 19
1120;; We default to IEEE 754 compliance
1121; CORTEX-M4-SOFT:  .eabi_attribute 20, 1
1122; CORTEX-M4-SOFT:  .eabi_attribute 21, 1
1123; CORTEX-M4-SOFT-NOT:  .eabi_attribute 22
1124; CORTEX-M4-SOFT:  .eabi_attribute 23, 3
1125; CORTEX-M4-SOFT:  .eabi_attribute 24, 1
1126; CORTEX-M4-SOFT:  .eabi_attribute 25, 1
1127; CORTEX-M4-SOFT-NOT:  .eabi_attribute 28
1128; CORTEX-M4-SOFT:  .eabi_attribute 38, 1
1129
1130; CORTEX-M4-SOFT-FAST-NOT:   .eabi_attribute 19
1131;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1132;; -ffast-math is specified.
1133; CORTEX-M4-SOFT-FAST:  .eabi_attribute 20, 2
1134; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 21
1135; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 22
1136; CORTEX-M4-SOFT-FAST:  .eabi_attribute 23, 1
1137
1138; CORTEX-M4-HARD:  .cpu cortex-m4
1139; CORTEX-M4-HARD:  .eabi_attribute 6, 13
1140; CORTEX-M4-HARD:  .eabi_attribute 7, 77
1141; CORTEX-M4-HARD:  .eabi_attribute 8, 0
1142; CORTEX-M4-HARD:  .eabi_attribute 9, 2
1143; CORTEX-M4-HARD:  .fpu fpv4-sp-d16
1144; CORTEX-M4-HARD:  .eabi_attribute 27, 1
1145; CORTEX-M4-HARD:  .eabi_attribute 36, 1
1146; CORTEX-M4-HARD-NOT:  .eabi_attribute 42
1147; CORTEX-M4-HARD-NOT:  .eabi_attribute 44
1148; CORTEX-M4-HARD-NOT:  .eabi_attribute 68
1149; CORTEX-M4-HARD-NOT:   .eabi_attribute 19
1150;; We default to IEEE 754 compliance
1151; CORTEX-M4-HARD:  .eabi_attribute 20, 1
1152; CORTEX-M4-HARD:  .eabi_attribute 21, 1
1153; CORTEX-M4-HARD-NOT:  .eabi_attribute 22
1154; CORTEX-M4-HARD:  .eabi_attribute 23, 3
1155; CORTEX-M4-HARD:  .eabi_attribute 24, 1
1156; CORTEX-M4-HARD:  .eabi_attribute 25, 1
1157; CORTEX-M4-HARD:  .eabi_attribute 28, 1
1158; CORTEX-M4-HARD:  .eabi_attribute 38, 1
1159
1160; CORTEX-M4-HARD-FAST-NOT:   .eabi_attribute 19
1161;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1162;; -ffast-math is specified.
1163; CORTEX-M4-HARD-FAST:  .eabi_attribute 20, 2
1164; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 21
1165; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 22
1166; CORTEX-M4-HARD-FAST:  .eabi_attribute 23, 1
1167
1168; CORTEX-M7:  .cpu    cortex-m7
1169; CORTEX-M7:  .eabi_attribute 6, 13
1170; CORTEX-M7:  .eabi_attribute 7, 77
1171; CORTEX-M7:  .eabi_attribute 8, 0
1172; CORTEX-M7:  .eabi_attribute 9, 2
1173; CORTEX-M7-SOFT-NOT: .fpu
1174; CORTEX-M7-SINGLE:  .fpu fpv5-sp-d16
1175; CORTEX-M7-DOUBLE:  .fpu fpv5-d16
1176; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
1177; CORTEX-M7-SINGLE:  .eabi_attribute 27, 1
1178; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
1179; CORTEX-M7:  .eabi_attribute 36, 1
1180; CORTEX-M7-NOT:  .eabi_attribute 44
1181; CORTEX-M7:  .eabi_attribute 17, 1
1182; CORTEX-M7-NOT:   .eabi_attribute 19
1183;; We default to IEEE 754 compliance
1184; CORTEX-M7:  .eabi_attribute 20, 1
1185; CORTEX-M7:  .eabi_attribute 21, 1
1186; CORTEX-M7-NOT:  .eabi_attribute 22
1187; CORTEX-M7:  .eabi_attribute 23, 3
1188; CORTEX-M7:  .eabi_attribute 24, 1
1189; CORTEX-M7:  .eabi_attribute 25, 1
1190; CORTEX-M7:  .eabi_attribute 38, 1
1191; CORTEX-M7:  .eabi_attribute 14, 0
1192
1193; CORTEX-M7-NOFPU-FAST-NOT:   .eabi_attribute 19
1194;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1195; CORTEX-M7-FAST:  .eabi_attribute 20, 2
1196;; Despite there being no FPU, we chose to flush to zero preserving
1197;; sign. This matches what the hardware would do for this architecture
1198;; revision.
1199; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
1200; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 21
1201; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 22
1202; CORTEX-M7-NOFPU-FAST:  .eabi_attribute 23, 1
1203
1204; CORTEX-R4:  .cpu cortex-r4
1205; CORTEX-R4:  .eabi_attribute 6, 10
1206; CORTEX-R4:  .eabi_attribute 7, 82
1207; CORTEX-R4:  .eabi_attribute 8, 1
1208; CORTEX-R4:  .eabi_attribute 9, 2
1209; CORTEX-R4-NOT:  .fpu vfpv3-d16
1210; CORTEX-R4-NOT:  .eabi_attribute 36
1211; CORTEX-R4-NOT:  .eabi_attribute 42
1212; CORTEX-R4-NOT:  .eabi_attribute 44
1213; CORTEX-R4-NOT:  .eabi_attribute 68
1214; CORTEX-R4-NOT:   .eabi_attribute 19
1215;; We default to IEEE 754 compliance
1216; CORTEX-R4:  .eabi_attribute 20, 1
1217; CORTEX-R4:  .eabi_attribute 21, 1
1218; CORTEX-R4-NOT:  .eabi_attribute 22
1219; CORTEX-R4:  .eabi_attribute 23, 3
1220; CORTEX-R4:  .eabi_attribute 24, 1
1221; CORTEX-R4:  .eabi_attribute 25, 1
1222; CORTEX-R4-NOT:  .eabi_attribute 28
1223; CORTEX-R4:  .eabi_attribute 38, 1
1224
1225; CORTEX-R4F:  .cpu cortex-r4f
1226; CORTEX-R4F:  .eabi_attribute 6, 10
1227; CORTEX-R4F:  .eabi_attribute 7, 82
1228; CORTEX-R4F:  .eabi_attribute 8, 1
1229; CORTEX-R4F:  .eabi_attribute 9, 2
1230; CORTEX-R4F:  .fpu vfpv3-d16
1231; CORTEX-R4F-NOT:  .eabi_attribute 27, 1
1232; CORTEX-R4F-NOT:  .eabi_attribute 36
1233; CORTEX-R4F-NOT:  .eabi_attribute 42
1234; CORTEX-R4F-NOT:  .eabi_attribute 44
1235; CORTEX-R4F-NOT:  .eabi_attribute 68
1236; CORTEX-R4F-NOT:   .eabi_attribute 19
1237;; We default to IEEE 754 compliance
1238; CORTEX-R4F:  .eabi_attribute 20, 1
1239; CORTEX-R4F:  .eabi_attribute 21, 1
1240; CORTEX-R4F-NOT:  .eabi_attribute 22
1241; CORTEX-R4F:  .eabi_attribute 23, 3
1242; CORTEX-R4F:  .eabi_attribute 24, 1
1243; CORTEX-R4F:  .eabi_attribute 25, 1
1244; CORTEX-R4F-NOT:  .eabi_attribute 28
1245; CORTEX-R4F:  .eabi_attribute 38, 1
1246
1247; CORTEX-R5:  .cpu cortex-r5
1248; CORTEX-R5:  .eabi_attribute 6, 10
1249; CORTEX-R5:  .eabi_attribute 7, 82
1250; CORTEX-R5:  .eabi_attribute 8, 1
1251; CORTEX-R5:  .eabi_attribute 9, 2
1252; CORTEX-R5:  .fpu vfpv3-d16
1253; CORTEX-R5-NOT:  .eabi_attribute 27, 1
1254; CORTEX-R5-NOT:  .eabi_attribute 36
1255; CORTEX-R5:  .eabi_attribute 44, 2
1256; CORTEX-R5-NOT:  .eabi_attribute 42
1257; CORTEX-R5-NOT:  .eabi_attribute 68
1258; CORTEX-R5-NOT:   .eabi_attribute 19
1259;; We default to IEEE 754 compliance
1260; CORTEX-R5:  .eabi_attribute 20, 1
1261; CORTEX-R5:  .eabi_attribute 21, 1
1262; CORTEX-R5-NOT:  .eabi_attribute 22
1263; CORTEX-R5:  .eabi_attribute 23, 3
1264; CORTEX-R5:  .eabi_attribute 24, 1
1265; CORTEX-R5:  .eabi_attribute 25, 1
1266; CORTEX-R5-NOT:  .eabi_attribute 28
1267; CORTEX-R5:  .eabi_attribute 38, 1
1268
1269; CORTEX-R5-FAST-NOT:   .eabi_attribute 19
1270;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
1271; CORTEX-R5-FAST:  .eabi_attribute 20, 2
1272; CORTEX-R5-FAST-NOT:  .eabi_attribute 21
1273; CORTEX-R5-FAST-NOT:  .eabi_attribute 22
1274; CORTEX-R5-FAST:  .eabi_attribute 23, 1
1275
1276; CORTEX-R7:  .cpu cortex-r7
1277; CORTEX-R7:  .eabi_attribute 6, 10
1278; CORTEX-R7:  .eabi_attribute 7, 82
1279; CORTEX-R7:  .eabi_attribute 8, 1
1280; CORTEX-R7:  .eabi_attribute 9, 2
1281; CORTEX-R7:  .fpu vfpv3-d16-fp16
1282; CORTEX-R7:  .eabi_attribute 36, 1
1283; CORTEX-R7:  .eabi_attribute 42, 1
1284; CORTEX-R7:  .eabi_attribute 44, 2
1285; CORTEX-R7-NOT:  .eabi_attribute 68
1286; CORTEX-R7-NOT:   .eabi_attribute 19
1287;; We default to IEEE 754 compliance
1288; CORTEX-R7:  .eabi_attribute 20, 1
1289; CORTEX-R7:  .eabi_attribute 21, 1
1290; CORTEX-R7-NOT:  .eabi_attribute 22
1291; CORTEX-R7:  .eabi_attribute 23, 3
1292; CORTEX-R7:  .eabi_attribute 24, 1
1293; CORTEX-R7:  .eabi_attribute 25, 1
1294; CORTEX-R7-NOT:  .eabi_attribute 28
1295; CORTEX-R7:  .eabi_attribute 38, 1
1296
1297; CORTEX-R7-FAST-NOT:   .eabi_attribute 19
1298;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
1299; CORTEX-R7-FAST:  .eabi_attribute 20, 2
1300; CORTEX-R7-FAST-NOT:  .eabi_attribute 21
1301; CORTEX-R7-FAST-NOT:  .eabi_attribute 22
1302; CORTEX-R7-FAST:  .eabi_attribute 23, 1
1303
1304; CORTEX-R8:  .cpu cortex-r8
1305; CORTEX-R8:  .eabi_attribute 6, 10
1306; CORTEX-R8:  .eabi_attribute 7, 82
1307; CORTEX-R8:  .eabi_attribute 8, 1
1308; CORTEX-R8:  .eabi_attribute 9, 2
1309; CORTEX-R8:  .fpu vfpv3-d16-fp16
1310; CORTEX-R8:  .eabi_attribute 36, 1
1311; CORTEX-R8:  .eabi_attribute 42, 1
1312; CORTEX-R8:  .eabi_attribute 44, 2
1313; CORTEX-R8-NOT:  .eabi_attribute 68
1314; CORTEX-R8-NOT:   .eabi_attribute 19
1315;; We default to IEEE 754 compliance
1316; CORTEX-R8:  .eabi_attribute 20, 1
1317; CORTEX-R8:  .eabi_attribute 21, 1
1318; CORTEX-R8-NOT:  .eabi_attribute 22
1319; CORTEX-R8:  .eabi_attribute 23, 3
1320; CORTEX-R8:  .eabi_attribute 24, 1
1321; CORTEX-R8:  .eabi_attribute 25, 1
1322; CORTEX-R8-NOT:  .eabi_attribute 28
1323; CORTEX-R8:  .eabi_attribute 38, 1
1324
1325; CORTEX-R8-FAST-NOT:   .eabi_attribute 19
1326;; The R8 has the VFPv3 FP unit, which always flushes preserving sign.
1327; CORTEX-R8-FAST:  .eabi_attribute 20, 2
1328; CORTEX-R8-FAST-NOT:  .eabi_attribute 21
1329; CORTEX-R8-FAST-NOT:  .eabi_attribute 22
1330; CORTEX-R8-FAST:  .eabi_attribute 23, 1
1331
1332; CORTEX-A32:  .cpu cortex-a32
1333; CORTEX-A32:  .eabi_attribute 6, 14
1334; CORTEX-A32:  .eabi_attribute 7, 65
1335; CORTEX-A32:  .eabi_attribute 8, 1
1336; CORTEX-A32:  .eabi_attribute 9, 2
1337; CORTEX-A32:  .fpu crypto-neon-fp-armv8
1338; CORTEX-A32:  .eabi_attribute 12, 3
1339; CORTEX-A32-NOT:  .eabi_attribute 27
1340; CORTEX-A32:  .eabi_attribute 36, 1
1341; CORTEX-A32:  .eabi_attribute 42, 1
1342; CORTEX-A32-NOT:  .eabi_attribute 44
1343; CORTEX-A32:  .eabi_attribute 68, 3
1344; CORTEX-A32-NOT:   .eabi_attribute 19
1345;; We default to IEEE 754 compliance
1346; CORTEX-A32:  .eabi_attribute 20, 1
1347; CORTEX-A32:  .eabi_attribute 21, 1
1348; CORTEX-A32-NOT:  .eabi_attribute 22
1349; CORTEX-A32:  .eabi_attribute 23, 3
1350; CORTEX-A32:  .eabi_attribute 24, 1
1351; CORTEX-A32:  .eabi_attribute 25, 1
1352; CORTEX-A32-NOT:  .eabi_attribute 28
1353; CORTEX-A32:  .eabi_attribute 38, 1
1354
1355; CORTEX-A32-FAST-NOT:   .eabi_attribute 19
1356;; The A32 has the ARMv8 FP unit, which always flushes preserving sign.
1357; CORTEX-A32-FAST:  .eabi_attribute 20, 2
1358; CORTEX-A32-FAST-NOT:  .eabi_attribute 21
1359; CORTEX-A32-FAST-NOT:  .eabi_attribute 22
1360; CORTEX-A32-FAST:  .eabi_attribute 23, 1
1361
1362; CORTEX-M23:  .cpu cortex-m23
1363; CORTEX-M23:  .eabi_attribute 6, 16
1364; CORTEX-M23:  .eabi_attribute 7, 77
1365; CORTEX-M23:  .eabi_attribute 8, 0
1366; CORTEX-M23:  .eabi_attribute 9, 3
1367; CORTEX-M23-NOT:  .eabi_attribute 27
1368; CORTEX-M23:  .eabi_attribute 34, 0
1369; CORTEX-M23-NOT:  .eabi_attribute 44
1370; CORTEX-M23:  .eabi_attribute 17, 1
1371;; We default to IEEE 754 compliance
1372; CORTEX-M23-NOT:   .eabi_attribute 19
1373; CORTEX-M23:  .eabi_attribute 20, 1
1374; CORTEX-M23:  .eabi_attribute 21, 1
1375; CORTEX-M23:  .eabi_attribute 23, 3
1376; CORTEX-M23:  .eabi_attribute 24, 1
1377; CORTEX-M23-NOT:  .eabi_attribute 28
1378; CORTEX-M23:  .eabi_attribute 25, 1
1379; CORTEX-M23:  .eabi_attribute 38, 1
1380; CORTEX-M23:  .eabi_attribute 14, 0
1381
1382; CORTEX-M33:  .cpu cortex-m33
1383; CORTEX-M33:  .eabi_attribute 6, 17
1384; CORTEX-M33:  .eabi_attribute 7, 77
1385; CORTEX-M33:  .eabi_attribute 8, 0
1386; CORTEX-M33:  .eabi_attribute 9, 3
1387; CORTEX-M33:  .fpu fpv5-sp-d16
1388; CORTEX-M33:  .eabi_attribute 27, 1
1389; CORTEX-M33:  .eabi_attribute 36, 1
1390; CORTEX-M33-NOT:  .eabi_attribute 44
1391; CORTEX-M33:  .eabi_attribute 46, 1
1392; CORTEX-M33:  .eabi_attribute 34, 1
1393; CORTEX-M33:  .eabi_attribute 17, 1
1394;; We default to IEEE 754 compliance
1395; CORTEX-M23-NOT:   .eabi_attribute 19
1396; CORTEX-M33:  .eabi_attribute 20, 1
1397; CORTEX-M33:  .eabi_attribute 21, 1
1398; CORTEX-M33:  .eabi_attribute 23, 3
1399; CORTEX-M33:  .eabi_attribute 24, 1
1400; CORTEX-M33:  .eabi_attribute 25, 1
1401; CORTEX-M33-NOT:  .eabi_attribute 28
1402; CORTEX-M33:  .eabi_attribute 38, 1
1403; CORTEX-M33:  .eabi_attribute 14, 0
1404
1405; CORTEX-M35P:  .cpu cortex-m35p
1406; CORTEX-M35P:  .eabi_attribute 6, 17
1407; CORTEX-M35P:  .eabi_attribute 7, 77
1408; CORTEX-M35P:  .eabi_attribute 8, 0
1409; CORTEX-M35P:  .eabi_attribute 9, 3
1410; CORTEX-M35P:  .fpu fpv5-sp-d16
1411; CORTEX-M35P:  .eabi_attribute 27, 1
1412; CORTEX-M35P:  .eabi_attribute 36, 1
1413; CORTEX-M35P-NOT:  .eabi_attribute 44
1414; CORTEX-M35P:  .eabi_attribute 46, 1
1415; CORTEX-M35P:  .eabi_attribute 34, 1
1416; CORTEX-M35P:  .eabi_attribute 17, 1
1417; CORTEX-M35P:  .eabi_attribute 20, 1
1418; CORTEX-M35P:  .eabi_attribute 21, 1
1419; CORTEX-M35P:  .eabi_attribute 23, 3
1420; CORTEX-M35P:  .eabi_attribute 24, 1
1421; CORTEX-M35P:  .eabi_attribute 25, 1
1422; CORTEX-M35P-NOT:  .eabi_attribute 28
1423; CORTEX-M35P:  .eabi_attribute 38, 1
1424; CORTEX-M35P:  .eabi_attribute 14, 0
1425
1426; CORTEX-M33-FAST-NOT:   .eabi_attribute 19
1427; CORTEX-M33-FAST:  .eabi_attribute 20, 2
1428; CORTEX-M33-FAST-NOT:  .eabi_attribute 21
1429; CORTEX-M33-FAST-NOT:  .eabi_attribute 22
1430; CORTEX-M33-FAST:  .eabi_attribute 23, 1
1431
1432; CORTEX-A35:  .cpu cortex-a35
1433; CORTEX-A35:  .eabi_attribute 6, 14
1434; CORTEX-A35:  .eabi_attribute 7, 65
1435; CORTEX-A35:  .eabi_attribute 8, 1
1436; CORTEX-A35:  .eabi_attribute 9, 2
1437; CORTEX-A35:  .fpu crypto-neon-fp-armv8
1438; CORTEX-A35:  .eabi_attribute 12, 3
1439; CORTEX-A35-NOT:  .eabi_attribute 27
1440; CORTEX-A35:  .eabi_attribute 36, 1
1441; CORTEX-A35:  .eabi_attribute 42, 1
1442; CORTEX-A35-NOT:  .eabi_attribute 44
1443; CORTEX-A35:  .eabi_attribute 68, 3
1444; CORTEX-A35-NOT:   .eabi_attribute 19
1445;; We default to IEEE 754 compliance
1446; CORTEX-A35:  .eabi_attribute 20, 1
1447; CORTEX-A35:  .eabi_attribute 21, 1
1448; CORTEX-A35-NOT:  .eabi_attribute 22
1449; CORTEX-A35:  .eabi_attribute 23, 3
1450; CORTEX-A35:  .eabi_attribute 24, 1
1451; CORTEX-A35:  .eabi_attribute 25, 1
1452; CORTEX-A35-NOT:  .eabi_attribute 28
1453; CORTEX-A35:  .eabi_attribute 38, 1
1454
1455; CORTEX-A35-FAST-NOT:   .eabi_attribute 19
1456;; The A35 has the ARMv8 FP unit, which always flushes preserving sign.
1457; CORTEX-A35-FAST:  .eabi_attribute 20, 2
1458; CORTEX-A35-FAST-NOT:  .eabi_attribute 21
1459; CORTEX-A35-FAST-NOT:  .eabi_attribute 22
1460; CORTEX-A35-FAST:  .eabi_attribute 23, 1
1461
1462; CORTEX-A53:  .cpu cortex-a53
1463; CORTEX-A53:  .eabi_attribute 6, 14
1464; CORTEX-A53:  .eabi_attribute 7, 65
1465; CORTEX-A53:  .eabi_attribute 8, 1
1466; CORTEX-A53:  .eabi_attribute 9, 2
1467; CORTEX-A53:  .fpu crypto-neon-fp-armv8
1468; CORTEX-A53:  .eabi_attribute 12, 3
1469; CORTEX-A53-NOT:  .eabi_attribute 27
1470; CORTEX-A53:  .eabi_attribute 36, 1
1471; CORTEX-A53:  .eabi_attribute 42, 1
1472; CORTEX-A53-NOT:  .eabi_attribute 44
1473; CORTEX-A53:  .eabi_attribute 68, 3
1474; CORTEX-A53-NOT:   .eabi_attribute 19
1475;; We default to IEEE 754 compliance
1476; CORTEX-A53:  .eabi_attribute 20, 1
1477; CORTEX-A53:  .eabi_attribute 21, 1
1478; CORTEX-A53-NOT:  .eabi_attribute 22
1479; CORTEX-A53:  .eabi_attribute 23, 3
1480; CORTEX-A53:  .eabi_attribute 24, 1
1481; CORTEX-A53:  .eabi_attribute 25, 1
1482; CORTEX-A53-NOT:  .eabi_attribute 28
1483; CORTEX-A53:  .eabi_attribute 38, 1
1484
1485; CORTEX-A53-FAST-NOT:   .eabi_attribute 19
1486;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1487; CORTEX-A53-FAST:  .eabi_attribute 20, 2
1488; CORTEX-A53-FAST-NOT:  .eabi_attribute 21
1489; CORTEX-A53-FAST-NOT:  .eabi_attribute 22
1490; CORTEX-A53-FAST:  .eabi_attribute 23, 1
1491
1492; CORTEX-A57:  .cpu cortex-a57
1493; CORTEX-A57:  .eabi_attribute 6, 14
1494; CORTEX-A57:  .eabi_attribute 7, 65
1495; CORTEX-A57:  .eabi_attribute 8, 1
1496; CORTEX-A57:  .eabi_attribute 9, 2
1497; CORTEX-A57:  .fpu crypto-neon-fp-armv8
1498; CORTEX-A57:  .eabi_attribute 12, 3
1499; CORTEX-A57-NOT:  .eabi_attribute 27
1500; CORTEX-A57:  .eabi_attribute 36, 1
1501; CORTEX-A57:  .eabi_attribute 42, 1
1502; CORTEX-A57-NOT:  .eabi_attribute 44
1503; CORTEX-A57:  .eabi_attribute 68, 3
1504; CORTEX-A57-NOT:   .eabi_attribute 19
1505;; We default to IEEE 754 compliance
1506; CORTEX-A57:  .eabi_attribute 20, 1
1507; CORTEX-A57:  .eabi_attribute 21, 1
1508; CORTEX-A57-NOT:  .eabi_attribute 22
1509; CORTEX-A57:  .eabi_attribute 23, 3
1510; CORTEX-A57:  .eabi_attribute 24, 1
1511; CORTEX-A57:  .eabi_attribute 25, 1
1512; CORTEX-A57-NOT:  .eabi_attribute 28
1513; CORTEX-A57:  .eabi_attribute 38, 1
1514
1515; CORTEX-A57-FAST-NOT:   .eabi_attribute 19
1516;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1517; CORTEX-A57-FAST:  .eabi_attribute 20, 2
1518; CORTEX-A57-FAST-NOT:  .eabi_attribute 21
1519; CORTEX-A57-FAST-NOT:  .eabi_attribute 22
1520; CORTEX-A57-FAST:  .eabi_attribute 23, 1
1521
1522; CORTEX-A72:  .cpu cortex-a72
1523; CORTEX-A72:  .eabi_attribute 6, 14
1524; CORTEX-A72:  .eabi_attribute 7, 65
1525; CORTEX-A72:  .eabi_attribute 8, 1
1526; CORTEX-A72:  .eabi_attribute 9, 2
1527; CORTEX-A72:  .fpu crypto-neon-fp-armv8
1528; CORTEX-A72:  .eabi_attribute 12, 3
1529; CORTEX-A72-NOT:  .eabi_attribute 27
1530; CORTEX-A72:  .eabi_attribute 36, 1
1531; CORTEX-A72:  .eabi_attribute 42, 1
1532; CORTEX-A72-NOT:  .eabi_attribute 44
1533; CORTEX-A72:  .eabi_attribute 68, 3
1534; CORTEX-A72-NOT:   .eabi_attribute 19
1535;; We default to IEEE 754 compliance
1536; CORTEX-A72:  .eabi_attribute 20, 1
1537; CORTEX-A72:  .eabi_attribute 21, 1
1538; CORTEX-A72-NOT:  .eabi_attribute 22
1539; CORTEX-A72:  .eabi_attribute 23, 3
1540; CORTEX-A72:  .eabi_attribute 24, 1
1541; CORTEX-A72:  .eabi_attribute 25, 1
1542; CORTEX-A72-NOT:  .eabi_attribute 28
1543; CORTEX-A72:  .eabi_attribute 38, 1
1544
1545; CORTEX-A72-FAST-NOT:   .eabi_attribute 19
1546;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1547; CORTEX-A72-FAST:  .eabi_attribute 20, 2
1548; CORTEX-A72-FAST-NOT:  .eabi_attribute 21
1549; CORTEX-A72-FAST-NOT:  .eabi_attribute 22
1550; CORTEX-A72-FAST:  .eabi_attribute 23, 1
1551
1552; CORTEX-A73:  .cpu cortex-a73
1553; CORTEX-A73:  .eabi_attribute 6, 14
1554; CORTEX-A73:  .eabi_attribute 7, 65
1555; CORTEX-A73:  .eabi_attribute 8, 1
1556; CORTEX-A73:  .eabi_attribute 9, 2
1557; CORTEX-A73:  .fpu  crypto-neon-fp-armv8
1558; CORTEX-A73:  .eabi_attribute 12, 3
1559; CORTEX-A73-NOT: .eabi_attribute 27
1560; CORTEX-A73:  .eabi_attribute 36, 1
1561; CORTEX-A73:  .eabi_attribute 42, 1
1562; CORTEX-A73-NOT: .eabi_attribute 44
1563; CORTEX-A73:  .eabi_attribute 68, 3
1564; CORTEX-A73-NOT: .eabi_attribute 19
1565;; We default to IEEE 754 compliance
1566; CORTEX-A73:  .eabi_attribute 20, 1
1567; CORTEX-A73:  .eabi_attribute 21, 1
1568; CORTEX-A73-NOT:  .eabi_attribute 22
1569; CORTEX-A73:  .eabi_attribute 23, 3
1570; CORTEX-A73:  .eabi_attribute 24, 1
1571; CORTEX-A73:  .eabi_attribute 25, 1
1572; CORTEX-A73-NOT: .eabi_attribute 28
1573; CORTEX-A73:  .eabi_attribute 38, 1
1574; CORTEX-A73:  .eabi_attribute 14, 0
1575
1576; EXYNOS-M1:  .cpu exynos-m1
1577; EXYNOS-M1:  .eabi_attribute 6, 14
1578; EXYNOS-M1:  .eabi_attribute 7, 65
1579; EXYNOS-M1:  .eabi_attribute 8, 1
1580; EXYNOS-M1:  .eabi_attribute 9, 2
1581; EXYNOS-M1:  .fpu crypto-neon-fp-armv8
1582; EXYNOS-M1:  .eabi_attribute 12, 3
1583; EXYNOS-M1-NOT:  .eabi_attribute 27
1584; EXYNOS-M1:  .eabi_attribute 36, 1
1585; EXYNOS-M1:  .eabi_attribute 42, 1
1586; EXYNOS-M1-NOT:  .eabi_attribute 44
1587; EXYNOS-M1:  .eabi_attribute 68, 3
1588; EXYNOS-M1-NOT:   .eabi_attribute 19
1589;; We default to IEEE 754 compliance
1590; EXYNOS-M1:  .eabi_attribute 20, 1
1591; EXYNOS-M1:  .eabi_attribute 21, 1
1592; EXYNOS-M1-NOT:  .eabi_attribute 22
1593; EXYNOS-M1:  .eabi_attribute 23, 3
1594; EXYNOS-M1:  .eabi_attribute 24, 1
1595; EXYNOS-M1:  .eabi_attribute 25, 1
1596; EXYNOS-M1-NOT:  .eabi_attribute 28
1597; EXYNOS-M1:  .eabi_attribute 38, 1
1598
1599; EXYNOS-M1-FAST-NOT:   .eabi_attribute 19
1600;; The exynos-m1 has the ARMv8 FP unit, which always flushes preserving sign.
1601; EXYNOS-M1-FAST:  .eabi_attribute 20, 2
1602; EXYNOS-M1-FAST-NOT:  .eabi_attribute 21
1603; EXYNOS-M1-FAST-NOT:  .eabi_attribute 22
1604; EXYNOS-M1-FAST:  .eabi_attribute 23, 1
1605
1606; EXYNOS-M2:  .cpu exynos-m2
1607; EXYNOS-M2:  .eabi_attribute 6, 14
1608; EXYNOS-M2:  .eabi_attribute 7, 65
1609; EXYNOS-M2:  .eabi_attribute 8, 1
1610; EXYNOS-M2:  .eabi_attribute 9, 2
1611; EXYNOS-M2:  .fpu crypto-neon-fp-armv8
1612; EXYNOS-M2:  .eabi_attribute 12, 3
1613; EXYNOS-M2-NOT:  .eabi_attribute 27
1614; EXYNOS-M2:  .eabi_attribute 36, 1
1615; EXYNOS-M2:  .eabi_attribute 42, 1
1616; EXYNOS-M2-NOT:  .eabi_attribute 44
1617; EXYNOS-M2:  .eabi_attribute 68, 3
1618; EXYNOS-M2-NOT:   .eabi_attribute 19
1619;; We default to IEEE 754 compliance
1620; EXYNOS-M2:  .eabi_attribute 20, 1
1621; EXYNOS-M2:  .eabi_attribute 21, 1
1622; EXYNOS-M2-NOT:  .eabi_attribute 22
1623; EXYNOS-M2:  .eabi_attribute 23, 3
1624; EXYNOS-M2:  .eabi_attribute 24, 1
1625; EXYNOS-M2:  .eabi_attribute 25, 1
1626; EXYNOS-M2-NOT:  .eabi_attribute 28
1627; EXYNOS-M2:  .eabi_attribute 38, 1
1628
1629; EXYNOS-M3:  .cpu exynos-m3
1630; EXYNOS-M3:  .eabi_attribute 6, 14
1631; EXYNOS-M3:  .eabi_attribute 7, 65
1632; EXYNOS-M3:  .eabi_attribute 8, 1
1633; EXYNOS-M3:  .eabi_attribute 9, 2
1634; EXYNOS-M3:  .fpu crypto-neon-fp-armv8
1635; EXYNOS-M3:  .eabi_attribute 12, 3
1636; EXYNOS-M3-NOT:  .eabi_attribute 27
1637; EXYNOS-M3:  .eabi_attribute 36, 1
1638; EXYNOS-M3:  .eabi_attribute 42, 1
1639; EXYNOS-M3-NOT:  .eabi_attribute 44
1640; EXYNOS-M3:  .eabi_attribute 68, 3
1641; EXYNOS-M3-NOT:   .eabi_attribute 19
1642;; We default to IEEE 754 compliance
1643; EXYNOS-M3:  .eabi_attribute 20, 1
1644; EXYNOS-M3:  .eabi_attribute 21, 1
1645; EXYNOS-M3-NOT:  .eabi_attribute 22
1646; EXYNOS-M3:  .eabi_attribute 23, 3
1647; EXYNOS-M3:  .eabi_attribute 24, 1
1648; EXYNOS-M3:  .eabi_attribute 25, 1
1649; EXYNOS-M3-NOT:  .eabi_attribute 28
1650; EXYNOS-M3:  .eabi_attribute 38, 1
1651
1652; EXYNOS-M4:  .cpu exynos-m4
1653; EXYNOS-M4:  .eabi_attribute 6, 14
1654; EXYNOS-M4:  .eabi_attribute 7, 65
1655; EXYNOS-M4:  .eabi_attribute 8, 1
1656; EXYNOS-M4:  .eabi_attribute 9, 2
1657; EXYNOS-M4:  .fpu crypto-neon-fp-armv8
1658; EXYNOS-M4:  .eabi_attribute 12, 4
1659; EXYNOS-M4-NOT:  .eabi_attribute 27
1660; EXYNOS-M4:  .eabi_attribute 36, 1
1661; EXYNOS-M4:  .eabi_attribute 42, 1
1662; EXYNOS-M4-NOT:  .eabi_attribute 44
1663; EXYNOS-M4:  .eabi_attribute 68, 3
1664; EXYNOS-M4-NOT:   .eabi_attribute 19
1665;; We default to IEEE 754 compliance
1666; EXYNOS-M4:  .eabi_attribute 20, 1
1667; EXYNOS-M4:  .eabi_attribute 21, 1
1668; EXYNOS-M4-NOT:  .eabi_attribute 22
1669; EXYNOS-M4:  .eabi_attribute 23, 3
1670; EXYNOS-M4:  .eabi_attribute 24, 1
1671; EXYNOS-M4:  .eabi_attribute 25, 1
1672; EXYNOS-M4-NOT:  .eabi_attribute 28
1673; EXYNOS-M4:  .eabi_attribute 38, 1
1674
1675; EXYNOS-M5:  .cpu exynos-m5
1676; EXYNOS-M5:  .eabi_attribute 6, 14
1677; EXYNOS-M5:  .eabi_attribute 7, 65
1678; EXYNOS-M5:  .eabi_attribute 8, 1
1679; EXYNOS-M5:  .eabi_attribute 9, 2
1680; EXYNOS-M5:  .fpu crypto-neon-fp-armv8
1681; EXYNOS-M5:  .eabi_attribute 12, 4
1682; EXYNOS-M5-NOT:  .eabi_attribute 27
1683; EXYNOS-M5:  .eabi_attribute 36, 1
1684; EXYNOS-M5:  .eabi_attribute 42, 1
1685; EXYNOS-M5-NOT:  .eabi_attribute 44
1686; EXYNOS-M5:  .eabi_attribute 68, 3
1687; EXYNOS-M5-NOT:   .eabi_attribute 19
1688;; We default to IEEE 754 compliance
1689; EXYNOS-M5:  .eabi_attribute 20, 1
1690; EXYNOS-M5:  .eabi_attribute 21, 1
1691; EXYNOS-M5-NOT:  .eabi_attribute 22
1692; EXYNOS-M5:  .eabi_attribute 23, 3
1693; EXYNOS-M5:  .eabi_attribute 24, 1
1694; EXYNOS-M5:  .eabi_attribute 25, 1
1695; EXYNOS-M5-NOT:  .eabi_attribute 28
1696; EXYNOS-M5:  .eabi_attribute 38, 1
1697
1698; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
1699; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
1700; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
1701; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16
1702; GENERIC-FPU-NEON-FP16: .fpu neon-fp16
1703
1704; GENERIC-ARMV8_1-A:  .eabi_attribute 6, 14
1705; GENERIC-ARMV8_1-A:  .eabi_attribute 7, 65
1706; GENERIC-ARMV8_1-A:  .eabi_attribute 8, 1
1707; GENERIC-ARMV8_1-A:  .eabi_attribute 9, 2
1708; GENERIC-ARMV8_1-A:  .fpu crypto-neon-fp-armv8
1709; GENERIC-ARMV8_1-A:  .eabi_attribute 12, 4
1710; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 27
1711; GENERIC-ARMV8_1-A:  .eabi_attribute 36, 1
1712; GENERIC-ARMV8_1-A:  .eabi_attribute 42, 1
1713; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 44
1714; GENERIC-ARMV8_1-A:  .eabi_attribute 68, 3
1715; GENERIC-ARMV8_1-A-NOT:   .eabi_attribute 19
1716;; We default to IEEE 754 compliance
1717; GENERIC-ARMV8_1-A:  .eabi_attribute 20, 1
1718; GENERIC-ARMV8_1-A:  .eabi_attribute 21, 1
1719; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 22
1720; GENERIC-ARMV8_1-A:  .eabi_attribute 23, 3
1721; GENERIC-ARMV8_1-A:  .eabi_attribute 24, 1
1722; GENERIC-ARMV8_1-A:  .eabi_attribute 25, 1
1723; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 28
1724; GENERIC-ARMV8_1-A:  .eabi_attribute 38, 1
1725
1726; GENERIC-ARMV8_1-A-FAST-NOT:   .eabi_attribute 19
1727;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign.
1728; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 20, 2
1729; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 21
1730; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 22
1731; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 23, 1
1732
1733; RELOC-PIC:  .eabi_attribute 15, 1
1734; RELOC-PIC:  .eabi_attribute 16, 1
1735; RELOC-PIC:  .eabi_attribute 17, 2
1736; RELOC-OTHER:  .eabi_attribute 17, 1
1737; RELOC-ROPI-NOT:  .eabi_attribute 15,
1738; RELOC-ROPI:      .eabi_attribute 16, 1
1739; RELOC-ROPI:      .eabi_attribute 17, 1
1740; RELOC-RWPI:      .eabi_attribute 15, 2
1741; RELOC-RWPI-NOT:  .eabi_attribute 16,
1742; RELOC-RWPI:      .eabi_attribute 17, 1
1743; RELOC-ROPI-RWPI: .eabi_attribute 15, 2
1744; RELOC-ROPI-RWPI: .eabi_attribute 16, 1
1745; RELOC-ROPI-RWPI:  .eabi_attribute 17, 1
1746
1747; PCS-R9-USE:  .eabi_attribute 14, 0
1748; PCS-R9-RESERVE:  .eabi_attribute 14, 3
1749
1750; ARMv8R: .eabi_attribute 67, "2.09"      @ Tag_conformance
1751; ARMv8R: .eabi_attribute 6, 15   @ Tag_CPU_arch
1752; ARMv8R: .eabi_attribute 7, 82   @ Tag_CPU_arch_profile
1753; ARMv8R: .eabi_attribute 8, 1    @ Tag_ARM_ISA_use
1754; ARMv8R: .eabi_attribute 9, 2    @ Tag_THUMB_ISA_use
1755; ARMv8R-NOFPU-NOT: .fpu
1756; ARMv8R-NOFPU-NOT: .eabi_attribute 12
1757; ARMv8R-SP: .fpu fpv5-sp-d16
1758; ARMv8R-SP-NOT: .eabi_attribute 12
1759; ARMv8R-NEON: .fpu    neon-fp-armv8
1760; ARMv8R-NEON: .eabi_attribute 12, 3   @ Tag_Advanced_SIMD_arch
1761; ARMv8R-NOFPU-NOT: .eabi_attribute 27
1762; ARMv8R-SP: .eabi_attribute 27, 1   @ Tag_ABI_HardFP_use
1763; ARMv8R-NEON-NOT: .eabi_attribute 27
1764; ARMv8R-NOFPU-NOT: .eabi_attribute 36
1765; ARMv8R-SP: .eabi_attribute 36, 1   @ Tag_FP_HP_extension
1766; ARMv8R-NEON: .eabi_attribute 36, 1   @ Tag_FP_HP_extension
1767; ARMv8R: .eabi_attribute 42, 1   @ Tag_MPextension_use
1768; ARMv8R: .eabi_attribute 68, 2   @ Tag_Virtualization_use
1769; ARMv8R: .eabi_attribute 38, 1   @ Tag_ABI_FP_16bit_format
1770; ARMv8R: .eabi_attribute 14, 0   @ Tag_ABI_PCS_R9_use
1771
1772define i32 @f(i64 %z) {
1773    ret i32 0
1774}
1775