1; This tests that MC/asm header conversion is smooth and that the
2; build attributes are correct
3
4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE
5; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6
6; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST
7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S
13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast  | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST
17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
20; RUN: llc < %s -mtriple=armv7-linux-gnueabi  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST
21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
22; RUN: llc < %s -mtriple=armv8-linux-gnueabi  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST
23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
30; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE
31; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE
32; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP
33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,-d32 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2sp  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-SOFT-FAST
41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A8-HARD
42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-HARD-FAST
43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
54; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2sp  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
57; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST
58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
60; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST
61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
62; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2sp  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
63
64; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-no-trapping-fp-math | FileCheck %s --check-prefix=NO-TRAPPING-MATH
65; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=ieee | FileCheck %s --check-prefix=DENORMAL-IEEE
66; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=preserve-sign | FileCheck %s --check-prefix=DENORMAL-PRESERVE-SIGN
67; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=positive-zero | FileCheck %s --check-prefix=DENORMAL-POSITIVE-ZERO
68
69; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16
70; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-d32,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16
71; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-fp64,-d32 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD
72; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,-fp64,-d32,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16
73; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16
74
75; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
76; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 | FileCheck %s --check-prefix=CORTEX-M0
77; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
78; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
79; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus | FileCheck %s --check-prefix=CORTEX-M0PLUS
80; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
81; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
82; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 | FileCheck %s --check-prefix=CORTEX-M1
83; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
84; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
85; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000
86; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
87; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
88; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
89; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
90; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
91; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
92; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
93; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
94; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
95; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
96; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
97; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
98; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
99; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
100; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2sp  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
101; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-fp64 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
102; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-fp64  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
103; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
104; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
105; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=CORTEX-M23
106; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=CORTEX-M33
107; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M33-FAST
108; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m33 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
109
110; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m35p | FileCheck %s --check-prefix=CORTEX-M35P
111; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -mcpu=cortex-m35p -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
112
113; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
114; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
115; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
116; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
117; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
118; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
119; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
120; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
121; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8
122; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST
123; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
124; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=CORTEX-A32
125; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A32-FAST
126; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
127; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35
128; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST
129; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
130; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
131; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
132; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
133; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
134; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST
135; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
136; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
137; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
138; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
139; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a73 | FileCheck %s --check-prefix=CORTEX-A73
140; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
141; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=EXYNOS-M3
142; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-FAST
143; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
144; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 | FileCheck %s --check-prefix=EXYNOS-M4
145; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-FAST
146; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
147; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5 | FileCheck %s --check-prefix=EXYNOS-M5
148; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-FAST
149; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
150; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
151; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
152; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s  --check-prefix=CORTEX-A7-CHECK
153; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s  --check-prefix=CORTEX-A7-CHECK-FAST
154; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2sp,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
155; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2sp,-vfp3,-vfp4,-neon,-fp16  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
156; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
157; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
158; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon  -enable-unsafe-fp-math -frame-pointer=all -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
159; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,-d32,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
160; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
161; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
162; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
163; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER
164; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE
165; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE
166; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi | FileCheck %s --check-prefix=RELOC-ROPI
167; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=rwpi | FileCheck %s --check-prefix=RELOC-RWPI
168; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi-rwpi | FileCheck %s --check-prefix=RELOC-ROPI-RWPI
169
170; ARMv8.1a (AArch32)
171; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
172; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
173; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
174; ARMv8a (AArch32)
175; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
176; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
177; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
178; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
179; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
180; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
181; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
182; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
183; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
184; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
185; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m4 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
186; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m4 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
187; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
188; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
189
190; ARMv7a
191; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
192; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
193; ARMv7ve
194; RUN: llc < %s -mtriple=armv7ve-none-linux-gnueabi | FileCheck %s --check-prefix=V7VE
195; ARMv7r
196; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
197; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
198; ARMv7em
199; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
200; RUN: llc < %s -mtriple=thumbv7em-none-linux-gnueabi -mcpu=cortex-m4 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
201; ARMv7m
202; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
203; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
204; ARMv6
205; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
206; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
207; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
208; ARMv6k
209; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=mpcore 2> %t | FileCheck %s --check-prefix=NO-STRICT-ALIGN
210; RUN: FileCheck %s < %t --allow-empty --check-prefix=CPU-SUPPORTED
211; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=mpcore -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
212; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=mpcore | FileCheck %s --check-prefix=NO-STRICT-ALIGN
213; ARMv6m
214; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
215; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
216; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
217; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
218; ARMv5
219; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN
220; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
221
222; ARMv8-R
223; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-vfp2sp,-fp16 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NOFPU
224; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-neon,-fp64,-d32 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-SP
225; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NEON
226
227; ARMv8-M
228; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m23 | FileCheck %s --check-prefix=STRICT-ALIGN
229; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
230; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m33 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
231; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p | FileCheck %s --check-prefix=NO-STRICT-ALIGN
232; RUN: llc < %s -mtriple=thumbv8-none-none-eabi -mcpu=cortex-m35p -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
233; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi | FileCheck %s --check-prefix=ARMv81M-MAIN
234; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve | FileCheck %s --check-prefix=ARMv81M-MAIN-MVEINT
235; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp | FileCheck %s --check-prefix=ARMv81M-MAIN-MVEFP
236; RUN: llc < %s -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+pacbti | FileCheck %s --check-prefix=ARMv81M-MAIN-PACBTI
237; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-m55 | FileCheck %s --check-prefix=CORTEX-M55
238
239; CPU-SUPPORTED-NOT: is not a recognized processor for this target
240
241; XSCALE:      .eabi_attribute 6, 5
242; XSCALE:      .eabi_attribute 8, 1
243; XSCALE:      .eabi_attribute 9, 1
244
245; DYN-ROUNDING: .eabi_attribute 19, 1
246
247; V6:   .eabi_attribute 6, 6
248; V6:   .eabi_attribute 8, 1
249;; We assume round-to-nearest by default (matches GCC)
250; V6-NOT:   .eabi_attribute 27
251; V6-NOT:    .eabi_attribute 36
252; V6-NOT:    .eabi_attribute 42
253; V6-NOT:  .eabi_attribute 44
254; V6-NOT:    .eabi_attribute 68
255; V6-NOT:   .eabi_attribute 19
256;; The default choice made by llc is for a V6 CPU without an FPU.
257;; This is not an interesting detail, but for such CPUs, the default intention is to use
258;; software floating-point support. The choice is not important for targets without
259;; FPU support!
260; V6:   .eabi_attribute 20, 1
261; V6:   .eabi_attribute 21, 1
262; V6-NOT:   .eabi_attribute 22
263; V6:   .eabi_attribute 23, 3
264; V6:   .eabi_attribute 24, 1
265; V6:   .eabi_attribute 25, 1
266; V6-NOT:   .eabi_attribute 28
267; V6:    .eabi_attribute 38, 1
268
269; V6-FAST-NOT:   .eabi_attribute 19
270;; Despite the V6 CPU having no FPU by default, we chose to flush to
271;; positive zero here. There's no hardware support doing this, but the
272;; fast maths software library might.
273; V6-FAST-NOT:   .eabi_attribute 20
274; V6-FAST-NOT:   .eabi_attribute 21
275; V6-FAST-NOT:   .eabi_attribute 22
276; V6-FAST:   .eabi_attribute 23, 1
277
278;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for
279;; V6-M, however we don't model the OS extension so this is fine.
280; V6M:  .eabi_attribute 6, 12
281; V6M:  .eabi_attribute 7, 77
282; V6M:  .eabi_attribute 8, 0
283; V6M:  .eabi_attribute 9, 1
284; V6M-NOT:  .eabi_attribute 27
285; V6M-NOT:  .eabi_attribute 36
286; V6M-NOT:  .eabi_attribute 42
287; V6M-NOT:  .eabi_attribute 44
288; V6M-NOT:  .eabi_attribute 68
289; V6M-NOT:   .eabi_attribute 19
290;; The default choice made by llc is for a V6M CPU without an FPU.
291;; This is not an interesting detail, but for such CPUs, the default intention is to use
292;; software floating-point support. The choice is not important for targets without
293;; FPU support!
294; V6M:  .eabi_attribute 20, 1
295; V6M:   .eabi_attribute 21, 1
296; V6M-NOT:   .eabi_attribute 22
297; V6M:   .eabi_attribute 23, 3
298; V6M:  .eabi_attribute 24, 1
299; V6M:  .eabi_attribute 25, 1
300; V6M-NOT:  .eabi_attribute 28
301; V6M:  .eabi_attribute 38, 1
302
303; V6M-FAST-NOT:   .eabi_attribute 19
304;; Despite the V6M CPU having no FPU by default, we chose to flush to
305;; positive zero here. There's no hardware support doing this, but the
306;; fast maths software library might.
307; V6M-FAST-NOT:  .eabi_attribute 20
308; V6M-FAST-NOT:   .eabi_attribute 21
309; V6M-FAST-NOT:   .eabi_attribute 22
310; V6M-FAST:   .eabi_attribute 23, 1
311
312; ARM1156T2F-S: .cpu arm1156t2f-s
313; ARM1156T2F-S: .eabi_attribute 6, 8
314; ARM1156T2F-S: .eabi_attribute 8, 1
315; ARM1156T2F-S: .eabi_attribute 9, 2
316; ARM1156T2F-S: .fpu vfpv2
317; ARM1156T2F-S-NOT: .eabi_attribute 27
318; ARM1156T2F-S-NOT: .eabi_attribute 36
319; ARM1156T2F-S-NOT:    .eabi_attribute 42
320; ARM1156T2F-S-NOT:    .eabi_attribute 44
321; ARM1156T2F-S-NOT:    .eabi_attribute 68
322; ARM1156T2F-S-NOT:   .eabi_attribute 19
323;; We default to IEEE 754 compliance
324; ARM1156T2F-S: .eabi_attribute 20, 1
325; ARM1156T2F-S: .eabi_attribute 21, 1
326; ARM1156T2F-S-NOT: .eabi_attribute 22
327; ARM1156T2F-S: .eabi_attribute 23, 3
328; ARM1156T2F-S: .eabi_attribute 24, 1
329; ARM1156T2F-S: .eabi_attribute 25, 1
330; ARM1156T2F-S-NOT: .eabi_attribute 28
331; ARM1156T2F-S: .eabi_attribute 38, 1
332
333; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 19
334;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
335;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
336;; select. LLVM historically picks 0.
337; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
338; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 21
339; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 22
340; ARM1156T2F-S-FAST:   .eabi_attribute 23, 1
341
342; V7M:  .eabi_attribute 6, 10
343; V7M:  .eabi_attribute 7, 77
344; V7M:  .eabi_attribute 8, 0
345; V7M:  .eabi_attribute 9, 2
346; V7M-NOT:  .eabi_attribute 27
347; V7M-NOT:  .eabi_attribute 36
348; V7M-NOT:  .eabi_attribute 42
349; V7M-NOT:  .eabi_attribute 44
350; V7M-NOT:  .eabi_attribute 68
351; V7M-NOT:   .eabi_attribute 19
352;; The default choice made by llc is for a V7M CPU without an FPU.
353;; This is not an interesting detail, but for such CPUs, the default intention is to use
354;; software floating-point support. The choice is not important for targets without
355;; FPU support!
356; V7M:  .eabi_attribute 20, 1
357; V7M: .eabi_attribute 21, 1
358; V7M-NOT: .eabi_attribute 22
359; V7M: .eabi_attribute 23, 3
360; V7M:  .eabi_attribute 24, 1
361; V7M:  .eabi_attribute 25, 1
362; V7M-NOT:  .eabi_attribute 28
363; V7M:  .eabi_attribute 38, 1
364
365; V7M-FAST-NOT:   .eabi_attribute 19
366;; Despite the V7M CPU having no FPU by default, we chose to flush
367;; preserving sign. This matches what the hardware would do in the
368;; architecture revision were to exist on the current target.
369; V7M-FAST:  .eabi_attribute 20, 2
370; V7M-FAST-NOT:   .eabi_attribute 21
371; V7M-FAST-NOT:   .eabi_attribute 22
372; V7M-FAST:   .eabi_attribute 23, 1
373
374; V7:      .syntax unified
375; V7: .eabi_attribute 6, 10
376; V7-NOT: .eabi_attribute 27
377; V7-NOT: .eabi_attribute 36
378; V7-NOT:    .eabi_attribute 42
379; V7-NOT:    .eabi_attribute 44
380; V7-NOT:    .eabi_attribute 68
381; V7-NOT:   .eabi_attribute 19
382;; In safe-maths mode we default to an IEEE 754 compliant choice.
383; V7: .eabi_attribute 20, 1
384; V7: .eabi_attribute 21, 1
385; V7-NOT: .eabi_attribute 22
386; V7: .eabi_attribute 23, 3
387; V7: .eabi_attribute 24, 1
388; V7: .eabi_attribute 25, 1
389; V7-NOT: .eabi_attribute 28
390; V7: .eabi_attribute 38, 1
391
392; V7-FAST-NOT:   .eabi_attribute 19
393;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
394;; denormals to zero preserving the sign.
395; V7-FAST: .eabi_attribute 20, 2
396; V7-FAST-NOT:   .eabi_attribute 21
397; V7-FAST-NOT:   .eabi_attribute 22
398; V7-FAST:   .eabi_attribute 23, 1
399
400; V7VE:      .syntax unified
401; V7VE: .eabi_attribute 6, 10   @ Tag_CPU_arch
402; V7VE: .eabi_attribute 7, 65   @ Tag_CPU_arch_profile
403; V7VE: .eabi_attribute 8, 1    @ Tag_ARM_ISA_use
404; V7VE: .eabi_attribute 9, 2    @ Tag_THUMB_ISA_use
405; V7VE: .eabi_attribute 42, 1   @ Tag_MPextension_use
406; V7VE: .eabi_attribute 44, 2   @ Tag_DIV_use
407; V7VE: .eabi_attribute 68, 3   @ Tag_Virtualization_use
408; V7VE: .eabi_attribute 17, 1   @ Tag_ABI_PCS_GOT_use
409; V7VE: .eabi_attribute 20, 1   @ Tag_ABI_FP_denormal
410; V7VE: .eabi_attribute 21, 1   @ Tag_ABI_FP_exceptions
411; V7VE: .eabi_attribute 23, 3   @ Tag_ABI_FP_number_model
412; V7VE: .eabi_attribute 24, 1   @ Tag_ABI_align_needed
413; V7VE: .eabi_attribute 25, 1   @ Tag_ABI_align_preserved
414; V7VE: .eabi_attribute 38, 1   @ Tag_ABI_FP_16bit_format
415
416; V8:      .syntax unified
417; V8: .eabi_attribute 67, "2.09"
418; V8: .eabi_attribute 6, 14
419; V8-NOT: .eabi_attribute 44
420; V8-NOT:   .eabi_attribute 19
421; V8: .eabi_attribute 20, 1
422; V8: .eabi_attribute 21, 1
423; V8-NOT: .eabi_attribute 22
424; V8: .eabi_attribute 23, 3
425
426; V8-FAST-NOT:   .eabi_attribute 19
427;; The default does have an FPU, and for V8-A, it flushes preserving sign.
428; V8-FAST: .eabi_attribute 20, 2
429; V8-FAST-NOT: .eabi_attribute 21
430; V8-FAST-NOT: .eabi_attribute 22
431; V8-FAST: .eabi_attribute 23, 1
432
433; Vt8:     .syntax unified
434; Vt8: .eabi_attribute 6, 14
435; Vt8-NOT:   .eabi_attribute 19
436; Vt8: .eabi_attribute 20, 1
437; Vt8: .eabi_attribute 21, 1
438; Vt8-NOT: .eabi_attribute 22
439; Vt8: .eabi_attribute 23, 3
440
441; V8-FPARMv8:      .syntax unified
442; V8-FPARMv8: .eabi_attribute 6, 14
443; V8-FPARMv8: .fpu fp-armv8
444
445; V8-NEON:      .syntax unified
446; V8-NEON: .eabi_attribute 6, 14
447; V8-NEON: .fpu neon
448; V8-NEON: .eabi_attribute 12, 3
449
450; V8-FPARMv8-NEON:      .syntax unified
451; V8-FPARMv8-NEON: .eabi_attribute 6, 14
452; V8-FPARMv8-NEON: .fpu neon-fp-armv8
453; V8-FPARMv8-NEON: .eabi_attribute 12, 3
454
455; V8-FPARMv8-NEON-CRYPTO:      .syntax unified
456; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
457; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
458; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
459
460; V8MBASELINE: .syntax unified
461; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline
462; V8MBASELINE: .eabi_attribute 6, 16
463; '7' is Tag_CPU_arch_profile, '77' is 'M'
464; V8MBASELINE: .eabi_attribute 7, 77
465; '8' is Tag_ARM_ISA_use
466; V8MBASELINE: .eabi_attribute 8, 0
467; '9' is Tag_Thumb_ISA_use
468; V8MBASELINE: .eabi_attribute 9, 3
469
470; V8MMAINLINE: .syntax unified
471; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline
472; V8MMAINLINE: .eabi_attribute 6, 17
473; V8MMAINLINE: .eabi_attribute 7, 77
474; V8MMAINLINE: .eabi_attribute 8, 0
475; V8MMAINLINE: .eabi_attribute 9, 3
476; V8MMAINLINE_DSP-NOT: .eabi_attribute 46
477
478; V8MMAINLINE_DSP: .syntax unified
479; V8MBASELINE_DSP: .eabi_attribute 6, 17
480; V8MBASELINE_DSP: .eabi_attribute 7, 77
481; V8MMAINLINE_DSP: .eabi_attribute 8, 0
482; V8MMAINLINE_DSP: .eabi_attribute 9, 3
483; V8MMAINLINE_DSP: .eabi_attribute 46, 1
484
485; Tag_CPU_unaligned_access
486; NO-STRICT-ALIGN: .eabi_attribute 34, 1
487; STRICT-ALIGN: .eabi_attribute 34, 0
488
489; Tag_CPU_arch  'ARMv7'
490; CORTEX-A7-CHECK: .eabi_attribute      6, 10
491; CORTEX-A7-NOFPU: .eabi_attribute      6, 10
492
493; CORTEX-A7-FPUV4: .eabi_attribute      6, 10
494
495; Tag_CPU_arch_profile 'A'
496; CORTEX-A7-CHECK: .eabi_attribute      7, 65
497; CORTEX-A7-NOFPU: .eabi_attribute      7, 65
498; CORTEX-A7-FPUV4: .eabi_attribute      7, 65
499
500; Tag_ARM_ISA_use
501; CORTEX-A7-CHECK: .eabi_attribute      8, 1
502; CORTEX-A7-NOFPU: .eabi_attribute      8, 1
503; CORTEX-A7-FPUV4: .eabi_attribute      8, 1
504
505; Tag_THUMB_ISA_use
506; CORTEX-A7-CHECK: .eabi_attribute      9, 2
507; CORTEX-A7-NOFPU: .eabi_attribute      9, 2
508; CORTEX-A7-FPUV4: .eabi_attribute      9, 2
509
510; CORTEX-A7-CHECK: .fpu neon-vfpv4
511; CORTEX-A7-NOFPU-NOT: .fpu
512; CORTEX-A7-FPUV4: .fpu vfpv4
513
514; CORTEX-A7-CHECK-NOT:   .eabi_attribute 19
515
516; Tag_FP_HP_extension
517; CORTEX-A7-CHECK: .eabi_attribute      36, 1
518; CORTEX-A7-NOFPU-NOT: .eabi_attribute  36
519; CORTEX-A7-FPUV4: .eabi_attribute      36, 1
520
521; Tag_MPextension_use
522; CORTEX-A7-CHECK: .eabi_attribute      42, 1
523; CORTEX-A7-NOFPU: .eabi_attribute      42, 1
524; CORTEX-A7-FPUV4: .eabi_attribute      42, 1
525
526; Tag_DIV_use
527; CORTEX-A7-CHECK: .eabi_attribute      44, 2
528; CORTEX-A7-NOFPU: .eabi_attribute      44, 2
529; CORTEX-A7-FPUV4: .eabi_attribute      44, 2
530
531; Tag_DSP_extension
532; CORTEX-A7-CHECK-NOT: .eabi_attribute      46
533
534; Tag_Virtualization_use
535; CORTEX-A7-CHECK: .eabi_attribute      68, 3
536; CORTEX-A7-NOFPU: .eabi_attribute      68, 3
537; CORTEX-A7-FPUV4: .eabi_attribute      68, 3
538
539; Tag_ABI_FP_denormal
540;; We default to IEEE 754 compliance
541; CORTEX-A7-CHECK: .eabi_attribute      20, 1
542;; The A7 has VFPv3 support by default, so flush preserving sign.
543; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
544; CORTEX-A7-NOFPU: .eabi_attribute      20, 1
545;; Despite there being no FPU, we chose to flush to zero preserving
546;; sign. This matches what the hardware would do for this architecture
547;; revision.
548; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
549; CORTEX-A7-FPUV4: .eabi_attribute      20, 1
550;; The VFPv4 FPU flushes preserving sign.
551; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
552
553; Tag_ABI_FP_exceptions
554; CORTEX-A7-CHECK: .eabi_attribute      21, 1
555; CORTEX-A7-NOFPU: .eabi_attribute      21, 1
556; CORTEX-A7-FPUV4: .eabi_attribute      21, 1
557
558; Tag_ABI_FP_user_exceptions
559; CORTEX-A7-CHECK-NOT: .eabi_attribute      22
560; CORTEX-A7-NOFPU-NOT: .eabi_attribute      22
561; CORTEX-A7-FPUV4-NOT: .eabi_attribute      22
562
563; Tag_ABI_FP_number_model
564; CORTEX-A7-CHECK: .eabi_attribute      23, 3
565; CORTEX-A7-NOFPU: .eabi_attribute      23, 3
566; CORTEX-A7-FPUV4: .eabi_attribute      23, 3
567
568; Tag_ABI_align_needed
569; CORTEX-A7-CHECK: .eabi_attribute      24, 1
570; CORTEX-A7-NOFPU: .eabi_attribute      24, 1
571; CORTEX-A7-FPUV4: .eabi_attribute      24, 1
572
573; Tag_ABI_align_preserved
574; CORTEX-A7-CHECK: .eabi_attribute      25, 1
575; CORTEX-A7-NOFPU: .eabi_attribute      25, 1
576; CORTEX-A7-FPUV4: .eabi_attribute      25, 1
577
578; Tag_FP_16bit_format
579; CORTEX-A7-CHECK: .eabi_attribute      38, 1
580; CORTEX-A7-NOFPU: .eabi_attribute      38, 1
581; CORTEX-A7-FPUV4: .eabi_attribute      38, 1
582
583; CORTEX-A5-DEFAULT:        .cpu    cortex-a5
584; CORTEX-A5-DEFAULT:        .eabi_attribute 6, 10
585; CORTEX-A5-DEFAULT:        .eabi_attribute 7, 65
586; CORTEX-A5-DEFAULT:        .eabi_attribute 8, 1
587; CORTEX-A5-DEFAULT:        .eabi_attribute 9, 2
588; CORTEX-A5-DEFAULT:        .fpu    neon-vfpv4
589; CORTEX-A5-DEFAULT:        .eabi_attribute 42, 1
590; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 44
591; CORTEX-A5-DEFAULT:        .eabi_attribute 68, 1
592; CORTEX-A5-NOT:   .eabi_attribute 19
593;; We default to IEEE 754 compliance
594; CORTEX-A5-DEFAULT:        .eabi_attribute 20, 1
595; CORTEX-A5-DEFAULT:        .eabi_attribute 21, 1
596; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 22
597; CORTEX-A5-DEFAULT:        .eabi_attribute 23, 3
598; CORTEX-A5-DEFAULT:        .eabi_attribute 24, 1
599; CORTEX-A5-DEFAULT:        .eabi_attribute 25, 1
600
601; CORTEX-A5-DEFAULT-FAST-NOT:   .eabi_attribute 19
602;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math
603;; is given.
604; CORTEX-A5-DEFAULT-FAST:        .eabi_attribute 20, 2
605; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21
606; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22
607; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1
608
609; CORTEX-A5-NONEON:        .cpu    cortex-a5
610; CORTEX-A5-NONEON:        .eabi_attribute 6, 10
611; CORTEX-A5-NONEON:        .eabi_attribute 7, 65
612; CORTEX-A5-NONEON:        .eabi_attribute 8, 1
613; CORTEX-A5-NONEON:        .eabi_attribute 9, 2
614; CORTEX-A5-NONEON:        .fpu    vfpv4-d16
615; CORTEX-A5-NONEON:        .eabi_attribute 42, 1
616; CORTEX-A5-NONEON:        .eabi_attribute 68, 1
617;; We default to IEEE 754 compliance
618; CORTEX-A5-NONEON:        .eabi_attribute 20, 1
619; CORTEX-A5-NONEON:        .eabi_attribute 21, 1
620; CORTEX-A5-NONEON-NOT:    .eabi_attribute 22
621; CORTEX-A5-NONEON:        .eabi_attribute 23, 3
622; CORTEX-A5-NONEON:        .eabi_attribute 24, 1
623; CORTEX-A5-NONEON:        .eabi_attribute 25, 1
624
625; CORTEX-A5-NONEON-FAST-NOT:   .eabi_attribute 19
626;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
627;; is given.
628; CORTEX-A5-NONEON-FAST:        .eabi_attribute 20, 2
629; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21
630; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22
631; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1
632
633; CORTEX-A5-NOFPU:        .cpu    cortex-a5
634; CORTEX-A5-NOFPU:        .eabi_attribute 6, 10
635; CORTEX-A5-NOFPU:        .eabi_attribute 7, 65
636; CORTEX-A5-NOFPU:        .eabi_attribute 8, 1
637; CORTEX-A5-NOFPU:        .eabi_attribute 9, 2
638; CORTEX-A5-NOFPU-NOT:    .fpu
639; CORTEX-A5-NOFPU:        .eabi_attribute 42, 1
640; CORTEX-A5-NOFPU:        .eabi_attribute 68, 1
641; CORTEX-A5-NOFPU-NOT:   .eabi_attribute 19
642;; We default to IEEE 754 compliance
643; CORTEX-A5-NOFPU:        .eabi_attribute 20, 1
644; CORTEX-A5-NOFPU:        .eabi_attribute 21, 1
645; CORTEX-A5-NOFPU-NOT:    .eabi_attribute 22
646; CORTEX-A5-NOFPU:        .eabi_attribute 23, 3
647; CORTEX-A5-NOFPU:        .eabi_attribute 24, 1
648; CORTEX-A5-NOFPU:        .eabi_attribute 25, 1
649
650; CORTEX-A5-NOFPU-FAST-NOT:   .eabi_attribute 19
651;; Despite there being no FPU, we chose to flush to zero preserving
652;; sign. This matches what the hardware would do for this architecture
653;; revision.
654; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
655; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21
656; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22
657; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1
658
659; CORTEX-A8-SOFT:  .cpu cortex-a8
660; CORTEX-A8-SOFT:  .eabi_attribute 6, 10
661; CORTEX-A8-SOFT:  .eabi_attribute 7, 65
662; CORTEX-A8-SOFT:  .eabi_attribute 8, 1
663; CORTEX-A8-SOFT:  .eabi_attribute 9, 2
664; CORTEX-A8-SOFT:  .fpu neon
665; CORTEX-A8-SOFT-NOT:  .eabi_attribute 27
666; CORTEX-A8-SOFT-NOT:  .eabi_attribute 36, 1
667; CORTEX-A8-SOFT-NOT:  .eabi_attribute 42, 1
668; CORTEX-A8-SOFT-NOT:  .eabi_attribute 44
669; CORTEX-A8-SOFT:  .eabi_attribute 68, 1
670; CORTEX-A8-SOFT-NOT:   .eabi_attribute 19
671;; We default to IEEE 754 compliance
672; CORTEX-A8-SOFT:  .eabi_attribute 20, 1
673; CORTEX-A8-SOFT:  .eabi_attribute 21, 1
674; CORTEX-A8-SOFT-NOT:  .eabi_attribute 22
675; CORTEX-A8-SOFT:  .eabi_attribute 23, 3
676; CORTEX-A8-SOFT:  .eabi_attribute 24, 1
677; CORTEX-A8-SOFT:  .eabi_attribute 25, 1
678; CORTEX-A8-SOFT-NOT:  .eabi_attribute 28
679; CORTEX-A8-SOFT:  .eabi_attribute 38, 1
680
681; CORTEX-A9-SOFT:  .cpu cortex-a9
682; CORTEX-A9-SOFT:  .eabi_attribute 6, 10
683; CORTEX-A9-SOFT:  .eabi_attribute 7, 65
684; CORTEX-A9-SOFT:  .eabi_attribute 8, 1
685; CORTEX-A9-SOFT:  .eabi_attribute 9, 2
686; CORTEX-A9-SOFT:  .fpu neon
687; CORTEX-A9-SOFT-NOT:  .eabi_attribute 27
688; CORTEX-A9-SOFT:  .eabi_attribute 36, 1
689; CORTEX-A9-SOFT:  .eabi_attribute 42, 1
690; CORTEX-A9-SOFT-NOT:  .eabi_attribute 44
691; CORTEX-A9-SOFT:  .eabi_attribute 68, 1
692; CORTEX-A9-SOFT-NOT:   .eabi_attribute 19
693;; We default to IEEE 754 compliance
694; CORTEX-A9-SOFT:  .eabi_attribute 20, 1
695; CORTEX-A9-SOFT:  .eabi_attribute 21, 1
696; CORTEX-A9-SOFT-NOT:  .eabi_attribute 22
697; CORTEX-A9-SOFT:  .eabi_attribute 23, 3
698; CORTEX-A9-SOFT:  .eabi_attribute 24, 1
699; CORTEX-A9-SOFT:  .eabi_attribute 25, 1
700; CORTEX-A9-SOFT-NOT:  .eabi_attribute 28
701; CORTEX-A9-SOFT:  .eabi_attribute 38, 1
702
703; CORTEX-A8-SOFT-FAST-NOT:   .eabi_attribute 19
704; CORTEX-A9-SOFT-FAST-NOT:   .eabi_attribute 19
705;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
706;; -ffast-math is specified.
707; CORTEX-A8-SOFT-FAST:  .eabi_attribute 20, 2
708; CORTEX-A9-SOFT-FAST:  .eabi_attribute 20, 2
709; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21
710; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22
711; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1
712
713; CORTEX-A8-HARD:  .cpu cortex-a8
714; CORTEX-A8-HARD:  .eabi_attribute 6, 10
715; CORTEX-A8-HARD:  .eabi_attribute 7, 65
716; CORTEX-A8-HARD:  .eabi_attribute 8, 1
717; CORTEX-A8-HARD:  .eabi_attribute 9, 2
718; CORTEX-A8-HARD:  .fpu neon
719; CORTEX-A8-HARD-NOT:  .eabi_attribute 27
720; CORTEX-A8-HARD-NOT:  .eabi_attribute 36, 1
721; CORTEX-A8-HARD-NOT:  .eabi_attribute 42, 1
722; CORTEX-A8-HARD:  .eabi_attribute 68, 1
723; CORTEX-A8-HARD-NOT:   .eabi_attribute 19
724;; We default to IEEE 754 compliance
725; CORTEX-A8-HARD:  .eabi_attribute 20, 1
726; CORTEX-A8-HARD:  .eabi_attribute 21, 1
727; CORTEX-A8-HARD-NOT:  .eabi_attribute 22
728; CORTEX-A8-HARD:  .eabi_attribute 23, 3
729; CORTEX-A8-HARD:  .eabi_attribute 24, 1
730; CORTEX-A8-HARD:  .eabi_attribute 25, 1
731; CORTEX-A8-HARD:  .eabi_attribute 28, 1
732; CORTEX-A8-HARD:  .eabi_attribute 38, 1
733
734
735
736; CORTEX-A9-HARD:  .cpu cortex-a9
737; CORTEX-A9-HARD:  .eabi_attribute 6, 10
738; CORTEX-A9-HARD:  .eabi_attribute 7, 65
739; CORTEX-A9-HARD:  .eabi_attribute 8, 1
740; CORTEX-A9-HARD:  .eabi_attribute 9, 2
741; CORTEX-A9-HARD:  .fpu neon
742; CORTEX-A9-HARD-NOT:  .eabi_attribute 27
743; CORTEX-A9-HARD:  .eabi_attribute 36, 1
744; CORTEX-A9-HARD:  .eabi_attribute 42, 1
745; CORTEX-A9-HARD:  .eabi_attribute 68, 1
746; CORTEX-A9-HARD-NOT:   .eabi_attribute 19
747;; We default to IEEE 754 compliance
748; CORTEX-A9-HARD:  .eabi_attribute 20, 1
749; CORTEX-A9-HARD:  .eabi_attribute 21, 1
750; CORTEX-A9-HARD-NOT:  .eabi_attribute 22
751; CORTEX-A9-HARD:  .eabi_attribute 23, 3
752; CORTEX-A9-HARD:  .eabi_attribute 24, 1
753; CORTEX-A9-HARD:  .eabi_attribute 25, 1
754; CORTEX-A9-HARD:  .eabi_attribute 28, 1
755; CORTEX-A9-HARD:  .eabi_attribute 38, 1
756
757; CORTEX-A8-HARD-FAST-NOT:   .eabi_attribute 19
758;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when
759;; -ffast-math is specified.
760; CORTEX-A8-HARD-FAST:  .eabi_attribute 20, 2
761; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 21
762; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 22
763; CORTEX-A8-HARD-FAST:  .eabi_attribute 23, 1
764
765; CORTEX-A9-HARD-FAST-NOT:   .eabi_attribute 19
766;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
767;; -ffast-math is specified.
768; CORTEX-A9-HARD-FAST:  .eabi_attribute 20, 2
769; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 21
770; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 22
771; CORTEX-A9-HARD-FAST:  .eabi_attribute 23, 1
772
773; CORTEX-A12-DEFAULT:  .cpu cortex-a12
774; CORTEX-A12-DEFAULT:  .eabi_attribute 6, 10
775; CORTEX-A12-DEFAULT:  .eabi_attribute 7, 65
776; CORTEX-A12-DEFAULT:  .eabi_attribute 8, 1
777; CORTEX-A12-DEFAULT:  .eabi_attribute 9, 2
778; CORTEX-A12-DEFAULT:  .fpu neon-vfpv4
779; CORTEX-A12-DEFAULT:  .eabi_attribute 42, 1
780; CORTEX-A12-DEFAULT:  .eabi_attribute 44, 2
781; CORTEX-A12-DEFAULT:  .eabi_attribute 68, 3
782; CORTEX-A12-DEFAULT-NOT:   .eabi_attribute 19
783;; We default to IEEE 754 compliance
784; CORTEX-A12-DEFAULT:  .eabi_attribute 20, 1
785; CORTEX-A12-DEFAULT:  .eabi_attribute 21, 1
786; CORTEX-A12-DEFAULT-NOT:  .eabi_attribute 22
787; CORTEX-A12-DEFAULT:  .eabi_attribute 23, 3
788; CORTEX-A12-DEFAULT:  .eabi_attribute 24, 1
789; CORTEX-A12-DEFAULT:  .eabi_attribute 25, 1
790
791; CORTEX-A12-DEFAULT-FAST-NOT:   .eabi_attribute 19
792;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when
793;; -ffast-math is specified.
794; CORTEX-A12-DEFAULT-FAST:  .eabi_attribute 20, 2
795; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 21
796; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 22
797; CORTEX-A12-HARD-FAST:  .eabi_attribute 23, 1
798
799; CORTEX-A12-NOFPU:  .cpu cortex-a12
800; CORTEX-A12-NOFPU:  .eabi_attribute 6, 10
801; CORTEX-A12-NOFPU:  .eabi_attribute 7, 65
802; CORTEX-A12-NOFPU:  .eabi_attribute 8, 1
803; CORTEX-A12-NOFPU:  .eabi_attribute 9, 2
804; CORTEX-A12-NOFPU-NOT:  .fpu
805; CORTEX-A12-NOFPU:  .eabi_attribute 42, 1
806; CORTEX-A12-NOFPU:  .eabi_attribute 44, 2
807; CORTEX-A12-NOFPU:  .eabi_attribute 68, 3
808; CORTEX-A12-NOFPU-NOT:   .eabi_attribute 19
809;; We default to IEEE 754 compliance
810; CORTEX-A12-NOFPU:  .eabi_attribute 20, 1
811; CORTEX-A12-NOFPU:  .eabi_attribute 21, 1
812; CORTEX-A12-NOFPU-NOT:  .eabi_attribute 22
813; CORTEX-A12-NOFPU:  .eabi_attribute 23, 3
814; CORTEX-A12-NOFPU:  .eabi_attribute 24, 1
815; CORTEX-A12-NOFPU:  .eabi_attribute 25, 1
816
817; CORTEX-A12-NOFPU-FAST-NOT:   .eabi_attribute 19
818;; Despite there being no FPU, we chose to flush to zero preserving
819;; sign. This matches what the hardware would do for this architecture
820;; revision.
821; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 20, 2
822; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 21
823; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 22
824; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 23, 1
825
826; CORTEX-A15: .cpu cortex-a15
827; CORTEX-A15: .eabi_attribute 6, 10
828; CORTEX-A15: .eabi_attribute 7, 65
829; CORTEX-A15: .eabi_attribute 8, 1
830; CORTEX-A15: .eabi_attribute 9, 2
831; CORTEX-A15: .fpu neon-vfpv4
832; CORTEX-A15-NOT: .eabi_attribute 27
833; CORTEX-A15: .eabi_attribute 36, 1
834; CORTEX-A15: .eabi_attribute 42, 1
835; CORTEX-A15: .eabi_attribute 44, 2
836; CORTEX-A15: .eabi_attribute 68, 3
837; CORTEX-A15-NOT:   .eabi_attribute 19
838;; We default to IEEE 754 compliance
839; CORTEX-A15: .eabi_attribute 20, 1
840; CORTEX-A15: .eabi_attribute 21, 1
841; CORTEX-A15-NOT: .eabi_attribute 22
842; CORTEX-A15: .eabi_attribute 23, 3
843; CORTEX-A15: .eabi_attribute 24, 1
844; CORTEX-A15: .eabi_attribute 25, 1
845; CORTEX-A15-NOT: .eabi_attribute 28
846; CORTEX-A15: .eabi_attribute 38, 1
847
848; CORTEX-A15-FAST-NOT:   .eabi_attribute 19
849;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when
850;; -ffast-math is specified.
851; CORTEX-A15-FAST: .eabi_attribute 20, 2
852; CORTEX-A15-FAST-NOT:  .eabi_attribute 21
853; CORTEX-A15-FAST-NOT:  .eabi_attribute 22
854; CORTEX-A15-FAST:  .eabi_attribute 23, 1
855
856; CORTEX-A17-DEFAULT:  .cpu cortex-a17
857; CORTEX-A17-DEFAULT:  .eabi_attribute 6, 10
858; CORTEX-A17-DEFAULT:  .eabi_attribute 7, 65
859; CORTEX-A17-DEFAULT:  .eabi_attribute 8, 1
860; CORTEX-A17-DEFAULT:  .eabi_attribute 9, 2
861; CORTEX-A17-DEFAULT:  .fpu neon-vfpv4
862; CORTEX-A17-DEFAULT:  .eabi_attribute 42, 1
863; CORTEX-A17-DEFAULT:  .eabi_attribute 44, 2
864; CORTEX-A17-DEFAULT:  .eabi_attribute 68, 3
865; CORTEX-A17-DEFAULT-NOT:   .eabi_attribute 19
866;; We default to IEEE 754 compliance
867; CORTEX-A17-DEFAULT:  .eabi_attribute 20, 1
868; CORTEX-A17-DEFAULT:  .eabi_attribute 21, 1
869; CORTEX-A17-DEFAULT-NOT:  .eabi_attribute 22
870; CORTEX-A17-DEFAULT:  .eabi_attribute 23, 3
871; CORTEX-A17-DEFAULT:  .eabi_attribute 24, 1
872; CORTEX-A17-DEFAULT:  .eabi_attribute 25, 1
873
874; CORTEX-A17-FAST-NOT:   .eabi_attribute 19
875;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when
876;; -ffast-math is specified.
877; CORTEX-A17-FAST:  .eabi_attribute 20, 2
878; CORTEX-A17-FAST-NOT:  .eabi_attribute 21
879; CORTEX-A17-FAST-NOT:  .eabi_attribute 22
880; CORTEX-A17-FAST:  .eabi_attribute 23, 1
881
882; CORTEX-A17-NOFPU:  .cpu cortex-a17
883; CORTEX-A17-NOFPU:  .eabi_attribute 6, 10
884; CORTEX-A17-NOFPU:  .eabi_attribute 7, 65
885; CORTEX-A17-NOFPU:  .eabi_attribute 8, 1
886; CORTEX-A17-NOFPU:  .eabi_attribute 9, 2
887; CORTEX-A17-NOFPU-NOT:  .fpu
888; CORTEX-A17-NOFPU:  .eabi_attribute 42, 1
889; CORTEX-A17-NOFPU:  .eabi_attribute 44, 2
890; CORTEX-A17-NOFPU:  .eabi_attribute 68, 3
891; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
892;; We default to IEEE 754 compliance
893; CORTEX-A17-NOFPU:  .eabi_attribute 20, 1
894; CORTEX-A17-NOFPU:  .eabi_attribute 21, 1
895; CORTEX-A17-NOFPU-NOT:  .eabi_attribute 22
896; CORTEX-A17-NOFPU:  .eabi_attribute 23, 3
897; CORTEX-A17-NOFPU:  .eabi_attribute 24, 1
898; CORTEX-A17-NOFPU:  .eabi_attribute 25, 1
899
900; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
901;; Despite there being no FPU, we chose to flush to zero preserving
902;; sign. This matches what the hardware would do for this architecture
903;; revision.
904; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 20, 2
905; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 21
906; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 22
907; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 23, 1
908
909; Test flags -enable-no-trapping-fp-math and -denormal-fp-math:
910; NO-TRAPPING-MATH:  .eabi_attribute 21, 0
911; DENORMAL-IEEE:  .eabi_attribute 20, 1
912; DENORMAL-PRESERVE-SIGN:  .eabi_attribute 20, 2
913; DENORMAL-POSITIVE-ZERO:  .eabi_attribute 20, 0
914
915; CORTEX-M0:  .cpu cortex-m0
916; CORTEX-M0:  .eabi_attribute 6, 12
917; CORTEX-M0:  .eabi_attribute 7, 77
918; CORTEX-M0:  .eabi_attribute 8, 0
919; CORTEX-M0:  .eabi_attribute 9, 1
920; CORTEX-M0-NOT:  .eabi_attribute 27
921; CORTEX-M0-NOT:  .eabi_attribute 36
922; CORTEX-M0: .eabi_attribute 34, 0
923; CORTEX-M0-NOT:  .eabi_attribute 42
924; CORTEX-M0-NOT:  .eabi_attribute 44
925; CORTEX-M0-NOT:  .eabi_attribute 68
926; CORTEX-M0-NOT:   .eabi_attribute 19
927;; We default to IEEE 754 compliance
928; CORTEX-M0:  .eabi_attribute 20, 1
929; CORTEX-M0:  .eabi_attribute 21, 1
930; CORTEX-M0-NOT:  .eabi_attribute 22
931; CORTEX-M0:  .eabi_attribute 23, 3
932; CORTEX-M0:  .eabi_attribute 24, 1
933; CORTEX-M0:  .eabi_attribute 25, 1
934; CORTEX-M0-NOT:  .eabi_attribute 28
935; CORTEX-M0:  .eabi_attribute 38, 1
936
937; CORTEX-M0-FAST-NOT:   .eabi_attribute 19
938;; Despite the M0 CPU having no FPU in this scenario, we chose to
939;; flush to positive zero here. There's no hardware support doing
940;; this, but the fast maths software library might and such behaviour
941;; would match hardware support on this architecture revision if it
942;; existed.
943; CORTEX-M0-FAST-NOT:  .eabi_attribute 20
944; CORTEX-M0-FAST-NOT:  .eabi_attribute 21
945; CORTEX-M0-FAST-NOT:  .eabi_attribute 22
946; CORTEX-M0-FAST:  .eabi_attribute 23, 1
947
948; CORTEX-M0PLUS:  .cpu cortex-m0plus
949; CORTEX-M0PLUS:  .eabi_attribute 6, 12
950; CORTEX-M0PLUS:  .eabi_attribute 7, 77
951; CORTEX-M0PLUS:  .eabi_attribute 8, 0
952; CORTEX-M0PLUS:  .eabi_attribute 9, 1
953; CORTEX-M0PLUS-NOT:  .eabi_attribute 27
954; CORTEX-M0PLUS-NOT:  .eabi_attribute 36
955; CORTEX-M0PLUS-NOT:  .eabi_attribute 42
956; CORTEX-M0PLUS-NOT:  .eabi_attribute 44
957; CORTEX-M0PLUS-NOT:  .eabi_attribute 68
958; CORTEX-M0PLUS-NOT:   .eabi_attribute 19
959;; We default to IEEE 754 compliance
960; CORTEX-M0PLUS:  .eabi_attribute 20, 1
961; CORTEX-M0PLUS:  .eabi_attribute 21, 1
962; CORTEX-M0PLUS-NOT:  .eabi_attribute 22
963; CORTEX-M0PLUS:  .eabi_attribute 23, 3
964; CORTEX-M0PLUS:  .eabi_attribute 24, 1
965; CORTEX-M0PLUS:  .eabi_attribute 25, 1
966; CORTEX-M0PLUS-NOT:  .eabi_attribute 28
967; CORTEX-M0PLUS:  .eabi_attribute 38, 1
968
969; CORTEX-M0PLUS-FAST-NOT:   .eabi_attribute 19
970;; Despite the M0+ CPU having no FPU in this scenario, we chose to
971;; flush to positive zero here. There's no hardware support doing
972;; this, but the fast maths software library might and such behaviour
973;; would match hardware support on this architecture revision if it
974;; existed.
975; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 20
976; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 21
977; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 22
978; CORTEX-M0PLUS-FAST:  .eabi_attribute 23, 1
979
980; CORTEX-M1:  .cpu cortex-m1
981; CORTEX-M1:  .eabi_attribute 6, 12
982; CORTEX-M1:  .eabi_attribute 7, 77
983; CORTEX-M1:  .eabi_attribute 8, 0
984; CORTEX-M1:  .eabi_attribute 9, 1
985; CORTEX-M1-NOT:  .eabi_attribute 27
986; CORTEX-M1-NOT:  .eabi_attribute 36
987; CORTEX-M1-NOT:  .eabi_attribute 42
988; CORTEX-M1-NOT:  .eabi_attribute 44
989; CORTEX-M1-NOT:  .eabi_attribute 68
990; CORTEX-M1-NOT:   .eabi_attribute 19
991;; We default to IEEE 754 compliance
992; CORTEX-M1:  .eabi_attribute 20, 1
993; CORTEX-M1:  .eabi_attribute 21, 1
994; CORTEX-M1-NOT:  .eabi_attribute 22
995; CORTEX-M1:  .eabi_attribute 23, 3
996; CORTEX-M1:  .eabi_attribute 24, 1
997; CORTEX-M1:  .eabi_attribute 25, 1
998; CORTEX-M1-NOT:  .eabi_attribute 28
999; CORTEX-M1:  .eabi_attribute 38, 1
1000
1001; CORTEX-M1-FAST-NOT:   .eabi_attribute 19
1002;; Despite the M1 CPU having no FPU in this scenario, we chose to
1003;; flush to positive zero here. There's no hardware support doing
1004;; this, but the fast maths software library might and such behaviour
1005;; would match hardware support on this architecture revision if it
1006;; existed.
1007; CORTEX-M1-FAST-NOT:  .eabi_attribute 20
1008; CORTEX-M1-FAST-NOT:  .eabi_attribute 21
1009; CORTEX-M1-FAST-NOT:  .eabi_attribute 22
1010; CORTEX-M1-FAST:  .eabi_attribute 23, 1
1011
1012; SC000:  .cpu sc000
1013; SC000:  .eabi_attribute 6, 12
1014; SC000:  .eabi_attribute 7, 77
1015; SC000:  .eabi_attribute 8, 0
1016; SC000:  .eabi_attribute 9, 1
1017; SC000-NOT:  .eabi_attribute 27
1018; SC000-NOT:  .eabi_attribute 42
1019; SC000-NOT:  .eabi_attribute 44
1020; SC000-NOT:  .eabi_attribute 68
1021; SC000-NOT:   .eabi_attribute 19
1022;; We default to IEEE 754 compliance
1023; SC000:  .eabi_attribute 20, 1
1024; SC000:  .eabi_attribute 21, 1
1025; SC000-NOT:  .eabi_attribute 22
1026; SC000:  .eabi_attribute 23, 3
1027; SC000:  .eabi_attribute 24, 1
1028; SC000:  .eabi_attribute 25, 1
1029; SC000-NOT:  .eabi_attribute 28
1030; SC000:  .eabi_attribute 38, 1
1031
1032; SC000-FAST-NOT:   .eabi_attribute 19
1033;; Despite the SC000 CPU having no FPU in this scenario, we chose to
1034;; flush to positive zero here. There's no hardware support doing
1035;; this, but the fast maths software library might and such behaviour
1036;; would match hardware support on this architecture revision if it
1037;; existed.
1038; SC000-FAST-NOT:  .eabi_attribute 20
1039; SC000-FAST-NOT:  .eabi_attribute 21
1040; SC000-FAST-NOT:  .eabi_attribute 22
1041; SC000-FAST:  .eabi_attribute 23, 1
1042
1043; CORTEX-M3:  .cpu cortex-m3
1044; CORTEX-M3:  .eabi_attribute 6, 10
1045; CORTEX-M3:  .eabi_attribute 7, 77
1046; CORTEX-M3:  .eabi_attribute 8, 0
1047; CORTEX-M3:  .eabi_attribute 9, 2
1048; CORTEX-M3-NOT:  .eabi_attribute 27
1049; CORTEX-M3-NOT:  .eabi_attribute 36
1050; CORTEX-M3-NOT:  .eabi_attribute 42
1051; CORTEX-M3-NOT:  .eabi_attribute 44
1052; CORTEX-M3-NOT:  .eabi_attribute 68
1053; CORTEX-M3-NOT:   .eabi_attribute 19
1054;; We default to IEEE 754 compliance
1055; CORTEX-M3:  .eabi_attribute 20, 1
1056; CORTEX-M3:  .eabi_attribute 21, 1
1057; CORTEX-M3-NOT:  .eabi_attribute 22
1058; CORTEX-M3:  .eabi_attribute 23, 3
1059; CORTEX-M3:  .eabi_attribute 24, 1
1060; CORTEX-M3:  .eabi_attribute 25, 1
1061; CORTEX-M3-NOT:  .eabi_attribute 28
1062; CORTEX-M3:  .eabi_attribute 38, 1
1063
1064; CORTEX-M3-FAST-NOT:   .eabi_attribute 19
1065;; Despite there being no FPU, we chose to flush to zero preserving
1066;; sign. This matches what the hardware would do for this architecture
1067;; revision.
1068; CORTEX-M3-FAST:  .eabi_attribute 20, 2
1069; CORTEX-M3-FAST-NOT:  .eabi_attribute 21
1070; CORTEX-M3-FAST-NOT:  .eabi_attribute 22
1071; CORTEX-M3-FAST:  .eabi_attribute 23, 1
1072
1073; SC300:  .cpu sc300
1074; SC300:  .eabi_attribute 6, 10
1075; SC300:  .eabi_attribute 7, 77
1076; SC300:  .eabi_attribute 8, 0
1077; SC300:  .eabi_attribute 9, 2
1078; SC300-NOT:  .eabi_attribute 27
1079; SC300-NOT:  .eabi_attribute 36
1080; SC300-NOT:  .eabi_attribute 42
1081; SC300-NOT:  .eabi_attribute 44
1082; SC300-NOT:  .eabi_attribute 68
1083; SC300-NOT:   .eabi_attribute 19
1084;; We default to IEEE 754 compliance
1085; SC300:  .eabi_attribute 20, 1
1086; SC300:  .eabi_attribute 21, 1
1087; SC300-NOT:  .eabi_attribute 22
1088; SC300:  .eabi_attribute 23, 3
1089; SC300:  .eabi_attribute 24, 1
1090; SC300:  .eabi_attribute 25, 1
1091; SC300-NOT:  .eabi_attribute 28
1092; SC300:  .eabi_attribute 38, 1
1093
1094; SC300-FAST-NOT:   .eabi_attribute 19
1095;; Despite there being no FPU, we chose to flush to zero preserving
1096;; sign. This matches what the hardware would do for this architecture
1097;; revision.
1098; SC300-FAST:  .eabi_attribute 20, 2
1099; SC300-FAST-NOT:  .eabi_attribute 21
1100; SC300-FAST-NOT:  .eabi_attribute 22
1101; SC300-FAST:  .eabi_attribute 23, 1
1102
1103; CORTEX-M4-SOFT:  .cpu cortex-m4
1104; CORTEX-M4-SOFT:  .eabi_attribute 6, 13
1105; CORTEX-M4-SOFT:  .eabi_attribute 7, 77
1106; CORTEX-M4-SOFT:  .eabi_attribute 8, 0
1107; CORTEX-M4-SOFT:  .eabi_attribute 9, 2
1108; CORTEX-M4-SOFT:  .fpu fpv4-sp-d16
1109; CORTEX-M4-SOFT:  .eabi_attribute 27, 1
1110; CORTEX-M4-SOFT:  .eabi_attribute 36, 1
1111; CORTEX-M4-SOFT-NOT:  .eabi_attribute 42
1112; CORTEX-M4-SOFT-NOT:  .eabi_attribute 44
1113; CORTEX-M4-SOFT-NOT:  .eabi_attribute 68
1114; CORTEX-M4-SOFT-NOT:   .eabi_attribute 19
1115;; We default to IEEE 754 compliance
1116; CORTEX-M4-SOFT:  .eabi_attribute 20, 1
1117; CORTEX-M4-SOFT:  .eabi_attribute 21, 1
1118; CORTEX-M4-SOFT-NOT:  .eabi_attribute 22
1119; CORTEX-M4-SOFT:  .eabi_attribute 23, 3
1120; CORTEX-M4-SOFT:  .eabi_attribute 24, 1
1121; CORTEX-M4-SOFT:  .eabi_attribute 25, 1
1122; CORTEX-M4-SOFT-NOT:  .eabi_attribute 28
1123; CORTEX-M4-SOFT:  .eabi_attribute 38, 1
1124
1125; CORTEX-M4-SOFT-FAST-NOT:   .eabi_attribute 19
1126;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1127;; -ffast-math is specified.
1128; CORTEX-M4-SOFT-FAST:  .eabi_attribute 20, 2
1129; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 21
1130; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 22
1131; CORTEX-M4-SOFT-FAST:  .eabi_attribute 23, 1
1132
1133; CORTEX-M4-HARD:  .cpu cortex-m4
1134; CORTEX-M4-HARD:  .eabi_attribute 6, 13
1135; CORTEX-M4-HARD:  .eabi_attribute 7, 77
1136; CORTEX-M4-HARD:  .eabi_attribute 8, 0
1137; CORTEX-M4-HARD:  .eabi_attribute 9, 2
1138; CORTEX-M4-HARD:  .fpu fpv4-sp-d16
1139; CORTEX-M4-HARD:  .eabi_attribute 27, 1
1140; CORTEX-M4-HARD:  .eabi_attribute 36, 1
1141; CORTEX-M4-HARD-NOT:  .eabi_attribute 42
1142; CORTEX-M4-HARD-NOT:  .eabi_attribute 44
1143; CORTEX-M4-HARD-NOT:  .eabi_attribute 68
1144; CORTEX-M4-HARD-NOT:   .eabi_attribute 19
1145;; We default to IEEE 754 compliance
1146; CORTEX-M4-HARD:  .eabi_attribute 20, 1
1147; CORTEX-M4-HARD:  .eabi_attribute 21, 1
1148; CORTEX-M4-HARD-NOT:  .eabi_attribute 22
1149; CORTEX-M4-HARD:  .eabi_attribute 23, 3
1150; CORTEX-M4-HARD:  .eabi_attribute 24, 1
1151; CORTEX-M4-HARD:  .eabi_attribute 25, 1
1152; CORTEX-M4-HARD:  .eabi_attribute 28, 1
1153; CORTEX-M4-HARD:  .eabi_attribute 38, 1
1154
1155; CORTEX-M4-HARD-FAST-NOT:   .eabi_attribute 19
1156;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1157;; -ffast-math is specified.
1158; CORTEX-M4-HARD-FAST:  .eabi_attribute 20, 2
1159; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 21
1160; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 22
1161; CORTEX-M4-HARD-FAST:  .eabi_attribute 23, 1
1162
1163; CORTEX-M7:  .cpu    cortex-m7
1164; CORTEX-M7:  .eabi_attribute 6, 13
1165; CORTEX-M7:  .eabi_attribute 7, 77
1166; CORTEX-M7:  .eabi_attribute 8, 0
1167; CORTEX-M7:  .eabi_attribute 9, 2
1168; CORTEX-M7-SOFT-NOT: .fpu
1169; CORTEX-M7-SINGLE:  .fpu fpv5-sp-d16
1170; CORTEX-M7-DOUBLE:  .fpu fpv5-d16
1171; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
1172; CORTEX-M7-SINGLE:  .eabi_attribute 27, 1
1173; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
1174; CORTEX-M7:  .eabi_attribute 36, 1
1175; CORTEX-M7-NOT:  .eabi_attribute 44
1176; CORTEX-M7:  .eabi_attribute 17, 1
1177; CORTEX-M7-NOT:   .eabi_attribute 19
1178;; We default to IEEE 754 compliance
1179; CORTEX-M7:  .eabi_attribute 20, 1
1180; CORTEX-M7:  .eabi_attribute 21, 1
1181; CORTEX-M7-NOT:  .eabi_attribute 22
1182; CORTEX-M7:  .eabi_attribute 23, 3
1183; CORTEX-M7:  .eabi_attribute 24, 1
1184; CORTEX-M7:  .eabi_attribute 25, 1
1185; CORTEX-M7:  .eabi_attribute 38, 1
1186; CORTEX-M7:  .eabi_attribute 14, 0
1187
1188; CORTEX-M7-NOFPU-FAST-NOT:   .eabi_attribute 19
1189;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1190; CORTEX-M7-FAST:  .eabi_attribute 20, 2
1191;; Despite there being no FPU, we chose to flush to zero preserving
1192;; sign. This matches what the hardware would do for this architecture
1193;; revision.
1194; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
1195; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 21
1196; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 22
1197; CORTEX-M7-NOFPU-FAST:  .eabi_attribute 23, 1
1198
1199; CORTEX-R4:  .cpu cortex-r4
1200; CORTEX-R4:  .eabi_attribute 6, 10
1201; CORTEX-R4:  .eabi_attribute 7, 82
1202; CORTEX-R4:  .eabi_attribute 8, 1
1203; CORTEX-R4:  .eabi_attribute 9, 2
1204; CORTEX-R4-NOT:  .fpu vfpv3-d16
1205; CORTEX-R4-NOT:  .eabi_attribute 36
1206; CORTEX-R4-NOT:  .eabi_attribute 42
1207; CORTEX-R4-NOT:  .eabi_attribute 44
1208; CORTEX-R4-NOT:  .eabi_attribute 68
1209; CORTEX-R4-NOT:   .eabi_attribute 19
1210;; We default to IEEE 754 compliance
1211; CORTEX-R4:  .eabi_attribute 20, 1
1212; CORTEX-R4:  .eabi_attribute 21, 1
1213; CORTEX-R4-NOT:  .eabi_attribute 22
1214; CORTEX-R4:  .eabi_attribute 23, 3
1215; CORTEX-R4:  .eabi_attribute 24, 1
1216; CORTEX-R4:  .eabi_attribute 25, 1
1217; CORTEX-R4-NOT:  .eabi_attribute 28
1218; CORTEX-R4:  .eabi_attribute 38, 1
1219
1220; CORTEX-R4F:  .cpu cortex-r4f
1221; CORTEX-R4F:  .eabi_attribute 6, 10
1222; CORTEX-R4F:  .eabi_attribute 7, 82
1223; CORTEX-R4F:  .eabi_attribute 8, 1
1224; CORTEX-R4F:  .eabi_attribute 9, 2
1225; CORTEX-R4F:  .fpu vfpv3-d16
1226; CORTEX-R4F-NOT:  .eabi_attribute 27, 1
1227; CORTEX-R4F-NOT:  .eabi_attribute 36
1228; CORTEX-R4F-NOT:  .eabi_attribute 42
1229; CORTEX-R4F-NOT:  .eabi_attribute 44
1230; CORTEX-R4F-NOT:  .eabi_attribute 68
1231; CORTEX-R4F-NOT:   .eabi_attribute 19
1232;; We default to IEEE 754 compliance
1233; CORTEX-R4F:  .eabi_attribute 20, 1
1234; CORTEX-R4F:  .eabi_attribute 21, 1
1235; CORTEX-R4F-NOT:  .eabi_attribute 22
1236; CORTEX-R4F:  .eabi_attribute 23, 3
1237; CORTEX-R4F:  .eabi_attribute 24, 1
1238; CORTEX-R4F:  .eabi_attribute 25, 1
1239; CORTEX-R4F-NOT:  .eabi_attribute 28
1240; CORTEX-R4F:  .eabi_attribute 38, 1
1241
1242; CORTEX-R5:  .cpu cortex-r5
1243; CORTEX-R5:  .eabi_attribute 6, 10
1244; CORTEX-R5:  .eabi_attribute 7, 82
1245; CORTEX-R5:  .eabi_attribute 8, 1
1246; CORTEX-R5:  .eabi_attribute 9, 2
1247; CORTEX-R5:  .fpu vfpv3-d16
1248; CORTEX-R5-NOT:  .eabi_attribute 27, 1
1249; CORTEX-R5-NOT:  .eabi_attribute 36
1250; CORTEX-R5:  .eabi_attribute 44, 2
1251; CORTEX-R5-NOT:  .eabi_attribute 42
1252; CORTEX-R5-NOT:  .eabi_attribute 68
1253; CORTEX-R5-NOT:   .eabi_attribute 19
1254;; We default to IEEE 754 compliance
1255; CORTEX-R5:  .eabi_attribute 20, 1
1256; CORTEX-R5:  .eabi_attribute 21, 1
1257; CORTEX-R5-NOT:  .eabi_attribute 22
1258; CORTEX-R5:  .eabi_attribute 23, 3
1259; CORTEX-R5:  .eabi_attribute 24, 1
1260; CORTEX-R5:  .eabi_attribute 25, 1
1261; CORTEX-R5-NOT:  .eabi_attribute 28
1262; CORTEX-R5:  .eabi_attribute 38, 1
1263
1264; CORTEX-R5-FAST-NOT:   .eabi_attribute 19
1265;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
1266; CORTEX-R5-FAST:  .eabi_attribute 20, 2
1267; CORTEX-R5-FAST-NOT:  .eabi_attribute 21
1268; CORTEX-R5-FAST-NOT:  .eabi_attribute 22
1269; CORTEX-R5-FAST:  .eabi_attribute 23, 1
1270
1271; CORTEX-R7:  .cpu cortex-r7
1272; CORTEX-R7:  .eabi_attribute 6, 10
1273; CORTEX-R7:  .eabi_attribute 7, 82
1274; CORTEX-R7:  .eabi_attribute 8, 1
1275; CORTEX-R7:  .eabi_attribute 9, 2
1276; CORTEX-R7:  .fpu vfpv3-d16-fp16
1277; CORTEX-R7:  .eabi_attribute 36, 1
1278; CORTEX-R7:  .eabi_attribute 42, 1
1279; CORTEX-R7:  .eabi_attribute 44, 2
1280; CORTEX-R7-NOT:  .eabi_attribute 68
1281; CORTEX-R7-NOT:   .eabi_attribute 19
1282;; We default to IEEE 754 compliance
1283; CORTEX-R7:  .eabi_attribute 20, 1
1284; CORTEX-R7:  .eabi_attribute 21, 1
1285; CORTEX-R7-NOT:  .eabi_attribute 22
1286; CORTEX-R7:  .eabi_attribute 23, 3
1287; CORTEX-R7:  .eabi_attribute 24, 1
1288; CORTEX-R7:  .eabi_attribute 25, 1
1289; CORTEX-R7-NOT:  .eabi_attribute 28
1290; CORTEX-R7:  .eabi_attribute 38, 1
1291
1292; CORTEX-R7-FAST-NOT:   .eabi_attribute 19
1293;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
1294; CORTEX-R7-FAST:  .eabi_attribute 20, 2
1295; CORTEX-R7-FAST-NOT:  .eabi_attribute 21
1296; CORTEX-R7-FAST-NOT:  .eabi_attribute 22
1297; CORTEX-R7-FAST:  .eabi_attribute 23, 1
1298
1299; CORTEX-R8:  .cpu cortex-r8
1300; CORTEX-R8:  .eabi_attribute 6, 10
1301; CORTEX-R8:  .eabi_attribute 7, 82
1302; CORTEX-R8:  .eabi_attribute 8, 1
1303; CORTEX-R8:  .eabi_attribute 9, 2
1304; CORTEX-R8:  .fpu vfpv3-d16-fp16
1305; CORTEX-R8:  .eabi_attribute 36, 1
1306; CORTEX-R8:  .eabi_attribute 42, 1
1307; CORTEX-R8:  .eabi_attribute 44, 2
1308; CORTEX-R8-NOT:  .eabi_attribute 68
1309; CORTEX-R8-NOT:   .eabi_attribute 19
1310;; We default to IEEE 754 compliance
1311; CORTEX-R8:  .eabi_attribute 20, 1
1312; CORTEX-R8:  .eabi_attribute 21, 1
1313; CORTEX-R8-NOT:  .eabi_attribute 22
1314; CORTEX-R8:  .eabi_attribute 23, 3
1315; CORTEX-R8:  .eabi_attribute 24, 1
1316; CORTEX-R8:  .eabi_attribute 25, 1
1317; CORTEX-R8-NOT:  .eabi_attribute 28
1318; CORTEX-R8:  .eabi_attribute 38, 1
1319
1320; CORTEX-R8-FAST-NOT:   .eabi_attribute 19
1321;; The R8 has the VFPv3 FP unit, which always flushes preserving sign.
1322; CORTEX-R8-FAST:  .eabi_attribute 20, 2
1323; CORTEX-R8-FAST-NOT:  .eabi_attribute 21
1324; CORTEX-R8-FAST-NOT:  .eabi_attribute 22
1325; CORTEX-R8-FAST:  .eabi_attribute 23, 1
1326
1327; CORTEX-A32:  .cpu cortex-a32
1328; CORTEX-A32:  .eabi_attribute 6, 14
1329; CORTEX-A32:  .eabi_attribute 7, 65
1330; CORTEX-A32:  .eabi_attribute 8, 1
1331; CORTEX-A32:  .eabi_attribute 9, 2
1332; CORTEX-A32:  .fpu crypto-neon-fp-armv8
1333; CORTEX-A32:  .eabi_attribute 12, 3
1334; CORTEX-A32-NOT:  .eabi_attribute 27
1335; CORTEX-A32:  .eabi_attribute 36, 1
1336; CORTEX-A32:  .eabi_attribute 42, 1
1337; CORTEX-A32-NOT:  .eabi_attribute 44
1338; CORTEX-A32:  .eabi_attribute 68, 3
1339; CORTEX-A32-NOT:   .eabi_attribute 19
1340;; We default to IEEE 754 compliance
1341; CORTEX-A32:  .eabi_attribute 20, 1
1342; CORTEX-A32:  .eabi_attribute 21, 1
1343; CORTEX-A32-NOT:  .eabi_attribute 22
1344; CORTEX-A32:  .eabi_attribute 23, 3
1345; CORTEX-A32:  .eabi_attribute 24, 1
1346; CORTEX-A32:  .eabi_attribute 25, 1
1347; CORTEX-A32-NOT:  .eabi_attribute 28
1348; CORTEX-A32:  .eabi_attribute 38, 1
1349
1350; CORTEX-A32-FAST-NOT:   .eabi_attribute 19
1351;; The A32 has the ARMv8 FP unit, which always flushes preserving sign.
1352; CORTEX-A32-FAST:  .eabi_attribute 20, 2
1353; CORTEX-A32-FAST-NOT:  .eabi_attribute 21
1354; CORTEX-A32-FAST-NOT:  .eabi_attribute 22
1355; CORTEX-A32-FAST:  .eabi_attribute 23, 1
1356
1357; CORTEX-M23:  .cpu cortex-m23
1358; CORTEX-M23:  .eabi_attribute 6, 16
1359; CORTEX-M23:  .eabi_attribute 7, 77
1360; CORTEX-M23:  .eabi_attribute 8, 0
1361; CORTEX-M23:  .eabi_attribute 9, 3
1362; CORTEX-M23-NOT:  .eabi_attribute 27
1363; CORTEX-M23:  .eabi_attribute 34, 0
1364; CORTEX-M23-NOT:  .eabi_attribute 44
1365; CORTEX-M23:  .eabi_attribute 17, 1
1366;; We default to IEEE 754 compliance
1367; CORTEX-M23-NOT:   .eabi_attribute 19
1368; CORTEX-M23:  .eabi_attribute 20, 1
1369; CORTEX-M23:  .eabi_attribute 21, 1
1370; CORTEX-M23:  .eabi_attribute 23, 3
1371; CORTEX-M23:  .eabi_attribute 24, 1
1372; CORTEX-M23-NOT:  .eabi_attribute 28
1373; CORTEX-M23:  .eabi_attribute 25, 1
1374; CORTEX-M23:  .eabi_attribute 38, 1
1375; CORTEX-M23:  .eabi_attribute 14, 0
1376
1377; CORTEX-M33:  .cpu cortex-m33
1378; CORTEX-M33:  .eabi_attribute 6, 17
1379; CORTEX-M33:  .eabi_attribute 7, 77
1380; CORTEX-M33:  .eabi_attribute 8, 0
1381; CORTEX-M33:  .eabi_attribute 9, 3
1382; CORTEX-M33:  .fpu fpv5-sp-d16
1383; CORTEX-M33:  .eabi_attribute 27, 1
1384; CORTEX-M33:  .eabi_attribute 36, 1
1385; CORTEX-M33-NOT:  .eabi_attribute 44
1386; CORTEX-M33:  .eabi_attribute 46, 1
1387; CORTEX-M33:  .eabi_attribute 34, 1
1388; CORTEX-M33:  .eabi_attribute 17, 1
1389;; We default to IEEE 754 compliance
1390; CORTEX-M23-NOT:   .eabi_attribute 19
1391; CORTEX-M33:  .eabi_attribute 20, 1
1392; CORTEX-M33:  .eabi_attribute 21, 1
1393; CORTEX-M33:  .eabi_attribute 23, 3
1394; CORTEX-M33:  .eabi_attribute 24, 1
1395; CORTEX-M33:  .eabi_attribute 25, 1
1396; CORTEX-M33-NOT:  .eabi_attribute 28
1397; CORTEX-M33:  .eabi_attribute 38, 1
1398; CORTEX-M33:  .eabi_attribute 14, 0
1399
1400; CORTEX-M35P:  .cpu cortex-m35p
1401; CORTEX-M35P:  .eabi_attribute 6, 17
1402; CORTEX-M35P:  .eabi_attribute 7, 77
1403; CORTEX-M35P:  .eabi_attribute 8, 0
1404; CORTEX-M35P:  .eabi_attribute 9, 3
1405; CORTEX-M35P:  .fpu fpv5-sp-d16
1406; CORTEX-M35P:  .eabi_attribute 27, 1
1407; CORTEX-M35P:  .eabi_attribute 36, 1
1408; CORTEX-M35P-NOT:  .eabi_attribute 44
1409; CORTEX-M35P:  .eabi_attribute 46, 1
1410; CORTEX-M35P:  .eabi_attribute 34, 1
1411; CORTEX-M35P:  .eabi_attribute 17, 1
1412; CORTEX-M35P:  .eabi_attribute 20, 1
1413; CORTEX-M35P:  .eabi_attribute 21, 1
1414; CORTEX-M35P:  .eabi_attribute 23, 3
1415; CORTEX-M35P:  .eabi_attribute 24, 1
1416; CORTEX-M35P:  .eabi_attribute 25, 1
1417; CORTEX-M35P-NOT:  .eabi_attribute 28
1418; CORTEX-M35P:  .eabi_attribute 38, 1
1419; CORTEX-M35P:  .eabi_attribute 14, 0
1420
1421; CORTEX-M33-FAST-NOT:   .eabi_attribute 19
1422; CORTEX-M33-FAST:  .eabi_attribute 20, 2
1423; CORTEX-M33-FAST-NOT:  .eabi_attribute 21
1424; CORTEX-M33-FAST-NOT:  .eabi_attribute 22
1425; CORTEX-M33-FAST:  .eabi_attribute 23, 1
1426
1427; CORTEX-A35:  .cpu cortex-a35
1428; CORTEX-A35:  .eabi_attribute 6, 14
1429; CORTEX-A35:  .eabi_attribute 7, 65
1430; CORTEX-A35:  .eabi_attribute 8, 1
1431; CORTEX-A35:  .eabi_attribute 9, 2
1432; CORTEX-A35:  .fpu crypto-neon-fp-armv8
1433; CORTEX-A35:  .eabi_attribute 12, 3
1434; CORTEX-A35-NOT:  .eabi_attribute 27
1435; CORTEX-A35:  .eabi_attribute 36, 1
1436; CORTEX-A35:  .eabi_attribute 42, 1
1437; CORTEX-A35-NOT:  .eabi_attribute 44
1438; CORTEX-A35:  .eabi_attribute 68, 3
1439; CORTEX-A35-NOT:   .eabi_attribute 19
1440;; We default to IEEE 754 compliance
1441; CORTEX-A35:  .eabi_attribute 20, 1
1442; CORTEX-A35:  .eabi_attribute 21, 1
1443; CORTEX-A35-NOT:  .eabi_attribute 22
1444; CORTEX-A35:  .eabi_attribute 23, 3
1445; CORTEX-A35:  .eabi_attribute 24, 1
1446; CORTEX-A35:  .eabi_attribute 25, 1
1447; CORTEX-A35-NOT:  .eabi_attribute 28
1448; CORTEX-A35:  .eabi_attribute 38, 1
1449
1450; CORTEX-A35-FAST-NOT:   .eabi_attribute 19
1451;; The A35 has the ARMv8 FP unit, which always flushes preserving sign.
1452; CORTEX-A35-FAST:  .eabi_attribute 20, 2
1453; CORTEX-A35-FAST-NOT:  .eabi_attribute 21
1454; CORTEX-A35-FAST-NOT:  .eabi_attribute 22
1455; CORTEX-A35-FAST:  .eabi_attribute 23, 1
1456
1457; CORTEX-A53:  .cpu cortex-a53
1458; CORTEX-A53:  .eabi_attribute 6, 14
1459; CORTEX-A53:  .eabi_attribute 7, 65
1460; CORTEX-A53:  .eabi_attribute 8, 1
1461; CORTEX-A53:  .eabi_attribute 9, 2
1462; CORTEX-A53:  .fpu crypto-neon-fp-armv8
1463; CORTEX-A53:  .eabi_attribute 12, 3
1464; CORTEX-A53-NOT:  .eabi_attribute 27
1465; CORTEX-A53:  .eabi_attribute 36, 1
1466; CORTEX-A53:  .eabi_attribute 42, 1
1467; CORTEX-A53-NOT:  .eabi_attribute 44
1468; CORTEX-A53:  .eabi_attribute 68, 3
1469; CORTEX-A53-NOT:   .eabi_attribute 19
1470;; We default to IEEE 754 compliance
1471; CORTEX-A53:  .eabi_attribute 20, 1
1472; CORTEX-A53:  .eabi_attribute 21, 1
1473; CORTEX-A53-NOT:  .eabi_attribute 22
1474; CORTEX-A53:  .eabi_attribute 23, 3
1475; CORTEX-A53:  .eabi_attribute 24, 1
1476; CORTEX-A53:  .eabi_attribute 25, 1
1477; CORTEX-A53-NOT:  .eabi_attribute 28
1478; CORTEX-A53:  .eabi_attribute 38, 1
1479
1480; CORTEX-A53-FAST-NOT:   .eabi_attribute 19
1481;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1482; CORTEX-A53-FAST:  .eabi_attribute 20, 2
1483; CORTEX-A53-FAST-NOT:  .eabi_attribute 21
1484; CORTEX-A53-FAST-NOT:  .eabi_attribute 22
1485; CORTEX-A53-FAST:  .eabi_attribute 23, 1
1486
1487; CORTEX-A57:  .cpu cortex-a57
1488; CORTEX-A57:  .eabi_attribute 6, 14
1489; CORTEX-A57:  .eabi_attribute 7, 65
1490; CORTEX-A57:  .eabi_attribute 8, 1
1491; CORTEX-A57:  .eabi_attribute 9, 2
1492; CORTEX-A57:  .fpu crypto-neon-fp-armv8
1493; CORTEX-A57:  .eabi_attribute 12, 3
1494; CORTEX-A57-NOT:  .eabi_attribute 27
1495; CORTEX-A57:  .eabi_attribute 36, 1
1496; CORTEX-A57:  .eabi_attribute 42, 1
1497; CORTEX-A57-NOT:  .eabi_attribute 44
1498; CORTEX-A57:  .eabi_attribute 68, 3
1499; CORTEX-A57-NOT:   .eabi_attribute 19
1500;; We default to IEEE 754 compliance
1501; CORTEX-A57:  .eabi_attribute 20, 1
1502; CORTEX-A57:  .eabi_attribute 21, 1
1503; CORTEX-A57-NOT:  .eabi_attribute 22
1504; CORTEX-A57:  .eabi_attribute 23, 3
1505; CORTEX-A57:  .eabi_attribute 24, 1
1506; CORTEX-A57:  .eabi_attribute 25, 1
1507; CORTEX-A57-NOT:  .eabi_attribute 28
1508; CORTEX-A57:  .eabi_attribute 38, 1
1509
1510; CORTEX-A57-FAST-NOT:   .eabi_attribute 19
1511;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1512; CORTEX-A57-FAST:  .eabi_attribute 20, 2
1513; CORTEX-A57-FAST-NOT:  .eabi_attribute 21
1514; CORTEX-A57-FAST-NOT:  .eabi_attribute 22
1515; CORTEX-A57-FAST:  .eabi_attribute 23, 1
1516
1517; CORTEX-A72:  .cpu cortex-a72
1518; CORTEX-A72:  .eabi_attribute 6, 14
1519; CORTEX-A72:  .eabi_attribute 7, 65
1520; CORTEX-A72:  .eabi_attribute 8, 1
1521; CORTEX-A72:  .eabi_attribute 9, 2
1522; CORTEX-A72:  .fpu crypto-neon-fp-armv8
1523; CORTEX-A72:  .eabi_attribute 12, 3
1524; CORTEX-A72-NOT:  .eabi_attribute 27
1525; CORTEX-A72:  .eabi_attribute 36, 1
1526; CORTEX-A72:  .eabi_attribute 42, 1
1527; CORTEX-A72-NOT:  .eabi_attribute 44
1528; CORTEX-A72:  .eabi_attribute 68, 3
1529; CORTEX-A72-NOT:   .eabi_attribute 19
1530;; We default to IEEE 754 compliance
1531; CORTEX-A72:  .eabi_attribute 20, 1
1532; CORTEX-A72:  .eabi_attribute 21, 1
1533; CORTEX-A72-NOT:  .eabi_attribute 22
1534; CORTEX-A72:  .eabi_attribute 23, 3
1535; CORTEX-A72:  .eabi_attribute 24, 1
1536; CORTEX-A72:  .eabi_attribute 25, 1
1537; CORTEX-A72-NOT:  .eabi_attribute 28
1538; CORTEX-A72:  .eabi_attribute 38, 1
1539
1540; CORTEX-A72-FAST-NOT:   .eabi_attribute 19
1541;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1542; CORTEX-A72-FAST:  .eabi_attribute 20, 2
1543; CORTEX-A72-FAST-NOT:  .eabi_attribute 21
1544; CORTEX-A72-FAST-NOT:  .eabi_attribute 22
1545; CORTEX-A72-FAST:  .eabi_attribute 23, 1
1546
1547; CORTEX-A73:  .cpu cortex-a73
1548; CORTEX-A73:  .eabi_attribute 6, 14
1549; CORTEX-A73:  .eabi_attribute 7, 65
1550; CORTEX-A73:  .eabi_attribute 8, 1
1551; CORTEX-A73:  .eabi_attribute 9, 2
1552; CORTEX-A73:  .fpu  crypto-neon-fp-armv8
1553; CORTEX-A73:  .eabi_attribute 12, 3
1554; CORTEX-A73-NOT: .eabi_attribute 27
1555; CORTEX-A73:  .eabi_attribute 36, 1
1556; CORTEX-A73:  .eabi_attribute 42, 1
1557; CORTEX-A73-NOT: .eabi_attribute 44
1558; CORTEX-A73:  .eabi_attribute 68, 3
1559; CORTEX-A73-NOT: .eabi_attribute 19
1560;; We default to IEEE 754 compliance
1561; CORTEX-A73:  .eabi_attribute 20, 1
1562; CORTEX-A73:  .eabi_attribute 21, 1
1563; CORTEX-A73-NOT:  .eabi_attribute 22
1564; CORTEX-A73:  .eabi_attribute 23, 3
1565; CORTEX-A73:  .eabi_attribute 24, 1
1566; CORTEX-A73:  .eabi_attribute 25, 1
1567; CORTEX-A73-NOT: .eabi_attribute 28
1568; CORTEX-A73:  .eabi_attribute 38, 1
1569; CORTEX-A73:  .eabi_attribute 14, 0
1570
1571; EXYNOS-FAST-NOT:   .eabi_attribute 19
1572;; The Exynos processors have the ARMv8 FP unit, which always flushes preserving sign.
1573; EXYNOS-FAST:  .eabi_attribute 20, 2
1574; EXYNOS-FAST-NOT:  .eabi_attribute 21
1575; EXYNOS-FAST-NOT:  .eabi_attribute 22
1576; EXYNOS-FAST:  .eabi_attribute 23, 1
1577
1578; EXYNOS-M3:  .cpu exynos-m3
1579; EXYNOS-M3:  .eabi_attribute 6, 14
1580; EXYNOS-M3:  .eabi_attribute 7, 65
1581; EXYNOS-M3:  .eabi_attribute 8, 1
1582; EXYNOS-M3:  .eabi_attribute 9, 2
1583; EXYNOS-M3:  .fpu crypto-neon-fp-armv8
1584; EXYNOS-M3:  .eabi_attribute 12, 3
1585; EXYNOS-M3-NOT:  .eabi_attribute 27
1586; EXYNOS-M3:  .eabi_attribute 36, 1
1587; EXYNOS-M3:  .eabi_attribute 42, 1
1588; EXYNOS-M3-NOT:  .eabi_attribute 44
1589; EXYNOS-M3:  .eabi_attribute 68, 3
1590; EXYNOS-M3-NOT:   .eabi_attribute 19
1591;; We default to IEEE 754 compliance
1592; EXYNOS-M3:  .eabi_attribute 20, 1
1593; EXYNOS-M3:  .eabi_attribute 21, 1
1594; EXYNOS-M3-NOT:  .eabi_attribute 22
1595; EXYNOS-M3:  .eabi_attribute 23, 3
1596; EXYNOS-M3:  .eabi_attribute 24, 1
1597; EXYNOS-M3:  .eabi_attribute 25, 1
1598; EXYNOS-M3-NOT:  .eabi_attribute 28
1599; EXYNOS-M3:  .eabi_attribute 38, 1
1600
1601; EXYNOS-M4:  .cpu exynos-m4
1602; EXYNOS-M4:  .eabi_attribute 6, 14
1603; EXYNOS-M4:  .eabi_attribute 7, 65
1604; EXYNOS-M4:  .eabi_attribute 8, 1
1605; EXYNOS-M4:  .eabi_attribute 9, 2
1606; EXYNOS-M4:  .fpu crypto-neon-fp-armv8
1607; EXYNOS-M4:  .eabi_attribute 12, 4
1608; EXYNOS-M4-NOT:  .eabi_attribute 27
1609; EXYNOS-M4:  .eabi_attribute 36, 1
1610; EXYNOS-M4:  .eabi_attribute 42, 1
1611; EXYNOS-M4-NOT:  .eabi_attribute 44
1612; EXYNOS-M4:  .eabi_attribute 68, 3
1613; EXYNOS-M4-NOT:   .eabi_attribute 19
1614;; We default to IEEE 754 compliance
1615; EXYNOS-M4:  .eabi_attribute 20, 1
1616; EXYNOS-M4:  .eabi_attribute 21, 1
1617; EXYNOS-M4-NOT:  .eabi_attribute 22
1618; EXYNOS-M4:  .eabi_attribute 23, 3
1619; EXYNOS-M4:  .eabi_attribute 24, 1
1620; EXYNOS-M4:  .eabi_attribute 25, 1
1621; EXYNOS-M4-NOT:  .eabi_attribute 28
1622; EXYNOS-M4:  .eabi_attribute 38, 1
1623
1624; EXYNOS-M5:  .cpu exynos-m5
1625; EXYNOS-M5:  .eabi_attribute 6, 14
1626; EXYNOS-M5:  .eabi_attribute 7, 65
1627; EXYNOS-M5:  .eabi_attribute 8, 1
1628; EXYNOS-M5:  .eabi_attribute 9, 2
1629; EXYNOS-M5:  .fpu crypto-neon-fp-armv8
1630; EXYNOS-M5:  .eabi_attribute 12, 4
1631; EXYNOS-M5-NOT:  .eabi_attribute 27
1632; EXYNOS-M5:  .eabi_attribute 36, 1
1633; EXYNOS-M5:  .eabi_attribute 42, 1
1634; EXYNOS-M5-NOT:  .eabi_attribute 44
1635; EXYNOS-M5:  .eabi_attribute 68, 3
1636; EXYNOS-M5-NOT:   .eabi_attribute 19
1637;; We default to IEEE 754 compliance
1638; EXYNOS-M5:  .eabi_attribute 20, 1
1639; EXYNOS-M5:  .eabi_attribute 21, 1
1640; EXYNOS-M5-NOT:  .eabi_attribute 22
1641; EXYNOS-M5:  .eabi_attribute 23, 3
1642; EXYNOS-M5:  .eabi_attribute 24, 1
1643; EXYNOS-M5:  .eabi_attribute 25, 1
1644; EXYNOS-M5-NOT:  .eabi_attribute 28
1645; EXYNOS-M5:  .eabi_attribute 38, 1
1646
1647; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
1648; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
1649; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
1650; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16
1651; GENERIC-FPU-NEON-FP16: .fpu neon-fp16
1652
1653; GENERIC-ARMV8_1-A:  .eabi_attribute 6, 14
1654; GENERIC-ARMV8_1-A:  .eabi_attribute 7, 65
1655; GENERIC-ARMV8_1-A:  .eabi_attribute 8, 1
1656; GENERIC-ARMV8_1-A:  .eabi_attribute 9, 2
1657; GENERIC-ARMV8_1-A:  .fpu crypto-neon-fp-armv8
1658; GENERIC-ARMV8_1-A:  .eabi_attribute 12, 4
1659; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 27
1660; GENERIC-ARMV8_1-A:  .eabi_attribute 36, 1
1661; GENERIC-ARMV8_1-A:  .eabi_attribute 42, 1
1662; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 44
1663; GENERIC-ARMV8_1-A:  .eabi_attribute 68, 3
1664; GENERIC-ARMV8_1-A-NOT:   .eabi_attribute 19
1665;; We default to IEEE 754 compliance
1666; GENERIC-ARMV8_1-A:  .eabi_attribute 20, 1
1667; GENERIC-ARMV8_1-A:  .eabi_attribute 21, 1
1668; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 22
1669; GENERIC-ARMV8_1-A:  .eabi_attribute 23, 3
1670; GENERIC-ARMV8_1-A:  .eabi_attribute 24, 1
1671; GENERIC-ARMV8_1-A:  .eabi_attribute 25, 1
1672; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 28
1673; GENERIC-ARMV8_1-A:  .eabi_attribute 38, 1
1674
1675; GENERIC-ARMV8_1-A-FAST-NOT:   .eabi_attribute 19
1676;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign.
1677; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 20, 2
1678; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 21
1679; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 22
1680; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 23, 1
1681
1682; RELOC-PIC:  .eabi_attribute 15, 1
1683; RELOC-PIC:  .eabi_attribute 16, 1
1684; RELOC-PIC:  .eabi_attribute 17, 2
1685; RELOC-OTHER:  .eabi_attribute 17, 1
1686; RELOC-ROPI-NOT:  .eabi_attribute 15,
1687; RELOC-ROPI:      .eabi_attribute 16, 1
1688; RELOC-ROPI:      .eabi_attribute 17, 1
1689; RELOC-RWPI:      .eabi_attribute 15, 2
1690; RELOC-RWPI-NOT:  .eabi_attribute 16,
1691; RELOC-RWPI:      .eabi_attribute 17, 1
1692; RELOC-ROPI-RWPI: .eabi_attribute 15, 2
1693; RELOC-ROPI-RWPI: .eabi_attribute 16, 1
1694; RELOC-ROPI-RWPI:  .eabi_attribute 17, 1
1695
1696; PCS-R9-USE:  .eabi_attribute 14, 0
1697; PCS-R9-RESERVE:  .eabi_attribute 14, 3
1698
1699; ARMv8R: .eabi_attribute 67, "2.09"      @ Tag_conformance
1700; ARMv8R: .eabi_attribute 6, 15   @ Tag_CPU_arch
1701; ARMv8R: .eabi_attribute 7, 82   @ Tag_CPU_arch_profile
1702; ARMv8R: .eabi_attribute 8, 1    @ Tag_ARM_ISA_use
1703; ARMv8R: .eabi_attribute 9, 2    @ Tag_THUMB_ISA_use
1704; ARMv8R-NOFPU-NOT: .fpu
1705; ARMv8R-NOFPU-NOT: .eabi_attribute 12
1706; ARMv8R-SP: .fpu fpv5-sp-d16
1707; ARMv8R-SP-NOT: .eabi_attribute 12
1708; ARMv8R-NEON: .fpu    neon-fp-armv8
1709; ARMv8R-NEON: .eabi_attribute 12, 3   @ Tag_Advanced_SIMD_arch
1710; ARMv8R-NOFPU-NOT: .eabi_attribute 27
1711; ARMv8R-SP: .eabi_attribute 27, 1   @ Tag_ABI_HardFP_use
1712; ARMv8R-NEON-NOT: .eabi_attribute 27
1713; ARMv8R-NOFPU-NOT: .eabi_attribute 36
1714; ARMv8R-SP: .eabi_attribute 36, 1   @ Tag_FP_HP_extension
1715; ARMv8R-NEON: .eabi_attribute 36, 1   @ Tag_FP_HP_extension
1716; ARMv8R: .eabi_attribute 42, 1   @ Tag_MPextension_use
1717; ARMv8R: .eabi_attribute 68, 2   @ Tag_Virtualization_use
1718; ARMv8R: .eabi_attribute 38, 1   @ Tag_ABI_FP_16bit_format
1719; ARMv8R: .eabi_attribute 14, 0   @ Tag_ABI_PCS_R9_use
1720
1721; ARMv81M-MAIN: .eabi_attribute 6, 21 @ Tag_CPU_arch
1722; ARMv81M-MAIN-NOT: .eabi_attribute 48
1723; ARMv81M-MAIN-MVEINT: .eabi_attribute 6, 21 @ Tag_CPU_arch
1724; ARMv81M-MAIN-MVEINT: .eabi_attribute 48, 1 @ Tag_MVE_arch
1725; ARMv81M-MAIN-MVEFP: .eabi_attribute 6, 21 @ Tag_CPU_arch
1726; ARMv81M-MAIN-MVEFP: .eabi_attribute 48, 2 @ Tag_MVE_arch
1727; ARMv81M-MAIN-PACBTI: .eabi_attribute 50, 2 @ Tag_PAC_extension
1728; ARMv81M-MAIN-PACBTI: .eabi_attribute 52, 2 @ Tag_BTI_extension
1729
1730; CORTEX-M55: .cpu cortex-m55
1731; CORTEX-M55: .eabi_attribute 6, 21
1732; CORTEX-M55: .eabi_attribute 7, 77
1733; CORTEX-M55: .eabi_attribute 8, 0
1734; CORTEX-M55: .eabi_attribute 9, 3
1735; CORTEX-M55: .fpu fpv5-d16
1736; CORTEX-M55: .eabi_attribute 36, 1
1737; CORTEX-M55-NOT: .eabi_attribute 44
1738; CORTEX-M55: .eabi_attribute 46, 1
1739; CORTEX-M55: .eabi_attribute 34, 1
1740; CORTEX-M55: .eabi_attribute 17, 1
1741; CORTEX-M55-NOT: .eabi_attribute 19
1742; CORTEX-M55: .eabi_attribute 20, 1
1743; CORTEX-M55: .eabi_attribute 21, 1
1744; CORTEX-M55: .eabi_attribute 23, 3
1745; CORTEX-M55: .eabi_attribute 24, 1
1746; CORTEX-M55: .eabi_attribute 25, 1
1747; CORTEX-M55-NOT: .eabi_attribute 28
1748; CORTEX-M55: .eabi_attribute 38, 1
1749; CORTEX-M55: .eabi_attribute 14, 0
1750
1751define i32 @f(i64 %z) {
1752    ret i32 0
1753}
1754