1; This tests that MC/asm header conversion is smooth and that the
2; build attributes are correct
3
4; RUN: llc < %s -mtriple=thumbv5-linux-gnueabi -mcpu=xscale -mattr=+strict-align | FileCheck %s --check-prefix=XSCALE
5; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6
6; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6-FAST
7; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
8; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
9; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
10; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=V6M
11; RUN: llc < %s -mtriple=thumbv6sm-linux-gnueabi -mattr=+strict-align -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V6M-FAST
12; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align | FileCheck %s --check-prefix=ARM1156T2F-S
13; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast  | FileCheck %s --check-prefix=ARM1156T2F-S-FAST
14; RUN: llc < %s -mtriple=armv6-linux-gnueabi -mcpu=arm1156t2f-s -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
15; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi | FileCheck %s --check-prefix=V7M
16; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7M-FAST
17; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
18; RUN: llc < %s -mtriple=armv7-linux-gnueabi | FileCheck %s --check-prefix=V7
19; RUN: llc < %s -mtriple=armv7-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
20; RUN: llc < %s -mtriple=armv7-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V7-FAST
21; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8
22; RUN: llc < %s -mtriple=armv8-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=V8-FAST
23; RUN: llc < %s -mtriple=armv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
24; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi | FileCheck %s --check-prefix=Vt8
25; RUN: llc < %s -mtriple=thumbv8-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
26; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-neon,-crypto | FileCheck %s --check-prefix=V8-FPARMv8
27; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-fp-armv8,-crypto | FileCheck %s --check-prefix=V8-NEON
28; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mattr=-crypto | FileCheck %s --check-prefix=V8-FPARMv8-NEON
29; RUN: llc < %s -mtriple=armv8-linux-gnueabi | FileCheck %s --check-prefix=V8-FPARMv8-NEON-CRYPTO
30; RUN: llc < %s -mtriple=thumbv8m.base-linux-gnueabi | FileCheck %s --check-prefix=V8MBASELINE
31; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi | FileCheck %s --check-prefix=V8MMAINLINE
32; RUN: llc < %s -mtriple=thumbv8m.main-linux-gnueabi -mattr=+dsp | FileCheck %s --check-prefix=V8MMAINLINE_DSP
33; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT
34; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-DEFAULT-FAST
35; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
36; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-neon,+d16 | FileCheck %s --check-prefix=CORTEX-A5-NONEON
37; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A5-NOFPU
38; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a5 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A5-NOFPU-FAST
39; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
40; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-SOFT-FAST
41; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A8-HARD
42; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A8-HARD-FAST
43; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
44; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a8 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A8-SOFT
45; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
46; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-SOFT-FAST
47; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-A9-HARD
48; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A9-HARD-FAST
49; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
50; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT
51; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a9 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-A9-SOFT
52; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-DEFAULT-FAST
53; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A12-NOFPU
54; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A12-NOFPU-FAST
55; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a12 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
56; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 | FileCheck %s --check-prefix=CORTEX-A15
57; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A15-FAST
58; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
59; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 | FileCheck %s --check-prefix=CORTEX-A17-DEFAULT
60; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-FAST
61; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-A17-NOFPU
62; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A17-NOFPU-FAST
63
64; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -enable-no-trapping-fp-math | FileCheck %s --check-prefix=NO-TRAPPING-MATH
65; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=ieee | FileCheck %s --check-prefix=DENORMAL-IEEE
66; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=preserve-sign | FileCheck %s --check-prefix=DENORMAL-PRESERVE-SIGN
67; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a15 -denormal-fp-math=positive-zero | FileCheck %s --check-prefix=DENORMAL-POSITIVE-ZERO
68
69; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-FP16
70; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3-D16-FP16
71; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD
72; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=-neon,+vfp3,+fp-only-sp,+d16,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-VFPV3XD-FP16
73; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mattr=+neon,+fp16 | FileCheck %s --check-prefix=GENERIC-FPU-NEON-FP16
74
75; RUN: llc < %s -mtriple=armv7-linux-gnueabi -mcpu=cortex-a17 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
76; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0
77; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0-FAST
78; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
79; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M0PLUS
80; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M0PLUS-FAST
81; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m0plus -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
82; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align | FileCheck %s --check-prefix=CORTEX-M1
83; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M1-FAST
84; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=cortex-m1 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
85; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align | FileCheck %s --check-prefix=SC000
86; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC000-FAST
87; RUN: llc < %s -mtriple=thumbv6m-linux-gnueabi -mcpu=sc000 -mattr=+strict-align -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
88; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=CORTEX-M3
89; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M3-FAST
90; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
91; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 | FileCheck %s --check-prefix=SC300
92; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=SC300-FAST
93; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=sc300 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
94; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft | FileCheck %s --check-prefix=CORTEX-M4-SOFT
95; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=soft  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-SOFT-FAST
96; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard | FileCheck %s --check-prefix=CORTEX-M4-HARD
97; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -float-abi=hard  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M4-HARD-FAST
98; RUN: llc < %s -mtriple=thumbv7m-linux-gnueabi -mcpu=cortex-m4 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
99; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2 | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SOFT
100; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=-vfp2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-NOFPU-FAST
101; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp | FileCheck %s --check-prefix=CORTEX-M7 --check-prefix=CORTEX-M7-SINGLE
102; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -mattr=+fp-only-sp  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-M7-FAST
103; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 | FileCheck %s --check-prefix=CORTEX-M7-DOUBLE
104; RUN: llc < %s -mtriple=thumbv7em-linux-gnueabi -mcpu=cortex-m7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
105; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4 | FileCheck %s --check-prefix=CORTEX-R4
106; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r4f | FileCheck %s --check-prefix=CORTEX-R4F
107; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=CORTEX-R5
108; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R5-FAST
109; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r5 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
110; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 | FileCheck %s --check-prefix=CORTEX-R7
111; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R7-FAST
112; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
113; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 | FileCheck %s --check-prefix=CORTEX-R8
114; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-R8-FAST
115; RUN: llc < %s -mtriple=armv7r-linux-gnueabi -mcpu=cortex-r8 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
116; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=CORTEX-A32
117; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A32-FAST
118; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a32 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
119; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=CORTEX-A35
120; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A35-FAST
121; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a35 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
122; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 | FileCheck %s --check-prefix=CORTEX-A53
123; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A53-FAST
124; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a53 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
125; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=CORTEX-A57
126; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A57-FAST
127; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a57 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
128; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=CORTEX-A72
129; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
130; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
131; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a73 | FileCheck %s --check-prefix=CORTEX-A73
132; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
133; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=EXYNOS-M1
134; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
135; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
136; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2 | FileCheck %s --check-prefix=EXYNOS-M2
137; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
138; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m2 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
139; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=EXYNOS-M3
140; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
141; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m3 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
142; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
143; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
144; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s  --check-prefix=CORTEX-A7-CHECK
145; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s  --check-prefix=CORTEX-A7-CHECK-FAST
146; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16 | FileCheck %s --check-prefix=CORTEX-A7-NOFPU
147; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=-vfp2,-vfp3,-vfp4,-neon,-fp16  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-NOFPU-FAST
148; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
149; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
150; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,-neon  -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A7-FPUV4-FAST
151; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+vfp4,,+d16,-neon | FileCheck %s --check-prefix=CORTEX-A7-FPUV4
152; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=pic | FileCheck %s --check-prefix=RELOC-PIC
153; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=static | FileCheck %s --check-prefix=RELOC-OTHER
154; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=dynamic-no-pic | FileCheck %s --check-prefix=RELOC-OTHER
155; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=RELOC-OTHER
156; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=PCS-R9-USE
157; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+reserve-r9,+strict-align | FileCheck %s --check-prefix=PCS-R9-RESERVE
158; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi | FileCheck %s --check-prefix=RELOC-ROPI
159; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=rwpi | FileCheck %s --check-prefix=RELOC-RWPI
160; RUN: llc < %s -mtriple=arm-none-linux-gnueabi -mattr=+strict-align -relocation-model=ropi-rwpi | FileCheck %s --check-prefix=RELOC-ROPI-RWPI
161
162; ARMv8.1a (AArch32)
163; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
164; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
165; RUN: llc < %s -mtriple=armv8.1a-none-linux-gnueabi | FileCheck %s --check-prefix=NO-STRICT-ALIGN
166; ARMv8a (AArch32)
167; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
168; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a32 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
169; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
170; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a35 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
171; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
172; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
173; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
174; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
175; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
176; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
177; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m2 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
178; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m2 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
179; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
180; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
181
182; ARMv7a
183; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
184; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
185; ARMv7r
186; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
187; RUN: llc < %s -mtriple=armv7r-none-linux-gnueabi -mcpu=cortex-r5 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
188; ARMv7m
189; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
190; RUN: llc < %s -mtriple=thumbv7m-none-linux-gnueabi -mcpu=cortex-m3 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
191; ARMv6
192; RUN: llc < %s -mtriple=armv6-none-netbsd-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
193; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
194; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
195; ARMv6k
196; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
197; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
198; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
199; ARMv6m
200; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
201; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
202; RUN: llc < %s -mtriple=thumbv6m-none-linux-gnueabi -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
203; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
204; ARMv5
205; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e | FileCheck %s --check-prefix=NO-STRICT-ALIGN
206; RUN: llc < %s -mtriple=armv5-none-linux-gnueabi -mcpu=arm1022e -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
207
208; ARMv8-R
209; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-vfp2,-fp16 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NOFPU
210; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 -mattr=-neon,+fp-only-sp,+d16 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-SP
211; RUN: llc < %s -mtriple=arm-none-none-eabi -mcpu=cortex-r52 | FileCheck %s --check-prefix=ARMv8R --check-prefix=ARMv8R-NEON
212
213; XSCALE:      .eabi_attribute 6, 5
214; XSCALE:      .eabi_attribute 8, 1
215; XSCALE:      .eabi_attribute 9, 1
216
217; DYN-ROUNDING: .eabi_attribute 19, 1
218
219; V6:   .eabi_attribute 6, 6
220; V6:   .eabi_attribute 8, 1
221;; We assume round-to-nearest by default (matches GCC)
222; V6-NOT:   .eabi_attribute 19
223;; The default choice made by llc is for a V6 CPU without an FPU.
224;; This is not an interesting detail, but for such CPUs, the default intention is to use
225;; software floating-point support. The choice is not important for targets without
226;; FPU support!
227; V6:   .eabi_attribute 20, 1
228; V6:   .eabi_attribute 21, 1
229; V6-NOT:   .eabi_attribute 22
230; V6:   .eabi_attribute 23, 3
231; V6:   .eabi_attribute 24, 1
232; V6:   .eabi_attribute 25, 1
233; V6-NOT:   .eabi_attribute 27
234; V6-NOT:   .eabi_attribute 28
235; V6-NOT:    .eabi_attribute 36
236; V6:    .eabi_attribute 38, 1
237; V6-NOT:    .eabi_attribute 42
238; V6-NOT:  .eabi_attribute 44
239; V6-NOT:    .eabi_attribute 68
240
241; V6-FAST-NOT:   .eabi_attribute 19
242;; Despite the V6 CPU having no FPU by default, we chose to flush to
243;; positive zero here. There's no hardware support doing this, but the
244;; fast maths software library might.
245; V6-FAST-NOT:   .eabi_attribute 20
246; V6-FAST-NOT:   .eabi_attribute 21
247; V6-FAST-NOT:   .eabi_attribute 22
248; V6-FAST:   .eabi_attribute 23, 1
249
250;; We emit 6, 12 for both v6-M and v6S-M, technically this is incorrect for
251;; V6-M, however we don't model the OS extension so this is fine.
252; V6M:  .eabi_attribute 6, 12
253; V6M-NOT:  .eabi_attribute 7
254; V6M:  .eabi_attribute 8, 0
255; V6M:  .eabi_attribute 9, 1
256; V6M-NOT:   .eabi_attribute 19
257;; The default choice made by llc is for a V6M CPU without an FPU.
258;; This is not an interesting detail, but for such CPUs, the default intention is to use
259;; software floating-point support. The choice is not important for targets without
260;; FPU support!
261; V6M:  .eabi_attribute 20, 1
262; V6M:   .eabi_attribute 21, 1
263; V6M-NOT:   .eabi_attribute 22
264; V6M:   .eabi_attribute 23, 3
265; V6M:  .eabi_attribute 24, 1
266; V6M:  .eabi_attribute 25, 1
267; V6M-NOT:  .eabi_attribute 27
268; V6M-NOT:  .eabi_attribute 28
269; V6M-NOT:  .eabi_attribute 36
270; V6M:  .eabi_attribute 38, 1
271; V6M-NOT:  .eabi_attribute 42
272; V6M-NOT:  .eabi_attribute 44
273; V6M-NOT:  .eabi_attribute 68
274
275; V6M-FAST-NOT:   .eabi_attribute 19
276;; Despite the V6M CPU having no FPU by default, we chose to flush to
277;; positive zero here. There's no hardware support doing this, but the
278;; fast maths software library might.
279; V6M-FAST-NOT:  .eabi_attribute 20
280; V6M-FAST-NOT:   .eabi_attribute 21
281; V6M-FAST-NOT:   .eabi_attribute 22
282; V6M-FAST:   .eabi_attribute 23, 1
283
284; ARM1156T2F-S: .cpu arm1156t2f-s
285; ARM1156T2F-S: .eabi_attribute 6, 8
286; ARM1156T2F-S: .eabi_attribute 8, 1
287; ARM1156T2F-S: .eabi_attribute 9, 2
288; ARM1156T2F-S: .fpu vfpv2
289; ARM1156T2F-S-NOT:   .eabi_attribute 19
290;; We default to IEEE 754 compliance
291; ARM1156T2F-S: .eabi_attribute 20, 1
292; ARM1156T2F-S: .eabi_attribute 21, 1
293; ARM1156T2F-S-NOT: .eabi_attribute 22
294; ARM1156T2F-S: .eabi_attribute 23, 3
295; ARM1156T2F-S: .eabi_attribute 24, 1
296; ARM1156T2F-S: .eabi_attribute 25, 1
297; ARM1156T2F-S-NOT: .eabi_attribute 27
298; ARM1156T2F-S-NOT: .eabi_attribute 28
299; ARM1156T2F-S-NOT: .eabi_attribute 36
300; ARM1156T2F-S: .eabi_attribute 38, 1
301; ARM1156T2F-S-NOT:    .eabi_attribute 42
302; ARM1156T2F-S-NOT:    .eabi_attribute 44
303; ARM1156T2F-S-NOT:    .eabi_attribute 68
304
305; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 19
306;; V6 cores default to flush to positive zero (value 0). Note that value 2 is also equally
307;; valid for this core, it's an implementation defined question as to which of 0 and 2 you
308;; select. LLVM historically picks 0.
309; ARM1156T2F-S-FAST-NOT: .eabi_attribute 20
310; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 21
311; ARM1156T2F-S-FAST-NOT:   .eabi_attribute 22
312; ARM1156T2F-S-FAST:   .eabi_attribute 23, 1
313
314; V7M:  .eabi_attribute 6, 10
315; V7M:  .eabi_attribute 7, 77
316; V7M:  .eabi_attribute 8, 0
317; V7M:  .eabi_attribute 9, 2
318; V7M-NOT:   .eabi_attribute 19
319;; The default choice made by llc is for a V7M CPU without an FPU.
320;; This is not an interesting detail, but for such CPUs, the default intention is to use
321;; software floating-point support. The choice is not important for targets without
322;; FPU support!
323; V7M:  .eabi_attribute 20, 1
324; V7M: .eabi_attribute 21, 1
325; V7M-NOT: .eabi_attribute 22
326; V7M: .eabi_attribute 23, 3
327; V7M:  .eabi_attribute 24, 1
328; V7M:  .eabi_attribute 25, 1
329; V7M-NOT:  .eabi_attribute 27
330; V7M-NOT:  .eabi_attribute 28
331; V7M-NOT:  .eabi_attribute 36
332; V7M:  .eabi_attribute 38, 1
333; V7M-NOT:  .eabi_attribute 42
334; V7M-NOT:  .eabi_attribute 44
335; V7M-NOT:  .eabi_attribute 68
336
337; V7M-FAST-NOT:   .eabi_attribute 19
338;; Despite the V7M CPU having no FPU by default, we chose to flush
339;; preserving sign. This matches what the hardware would do in the
340;; architecture revision were to exist on the current target.
341; V7M-FAST:  .eabi_attribute 20, 2
342; V7M-FAST-NOT:   .eabi_attribute 21
343; V7M-FAST-NOT:   .eabi_attribute 22
344; V7M-FAST:   .eabi_attribute 23, 1
345
346; V7:      .syntax unified
347; V7: .eabi_attribute 6, 10
348; V7-NOT:   .eabi_attribute 19
349;; In safe-maths mode we default to an IEEE 754 compliant choice.
350; V7: .eabi_attribute 20, 1
351; V7: .eabi_attribute 21, 1
352; V7-NOT: .eabi_attribute 22
353; V7: .eabi_attribute 23, 3
354; V7: .eabi_attribute 24, 1
355; V7: .eabi_attribute 25, 1
356; V7-NOT: .eabi_attribute 27
357; V7-NOT: .eabi_attribute 28
358; V7-NOT: .eabi_attribute 36
359; V7: .eabi_attribute 38, 1
360; V7-NOT:    .eabi_attribute 42
361; V7-NOT:    .eabi_attribute 44
362; V7-NOT:    .eabi_attribute 68
363
364; V7-FAST-NOT:   .eabi_attribute 19
365;; The default CPU does have an FPU and it must be VFPv3 or better, so it flushes
366;; denormals to zero preserving the sign.
367; V7-FAST: .eabi_attribute 20, 2
368; V7-FAST-NOT:   .eabi_attribute 21
369; V7-FAST-NOT:   .eabi_attribute 22
370; V7-FAST:   .eabi_attribute 23, 1
371
372; V8:      .syntax unified
373; V8: .eabi_attribute 67, "2.09"
374; V8: .eabi_attribute 6, 14
375; V8-NOT:   .eabi_attribute 19
376; V8: .eabi_attribute 20, 1
377; V8: .eabi_attribute 21, 1
378; V8-NOT: .eabi_attribute 22
379; V8: .eabi_attribute 23, 3
380; V8-NOT: .eabi_attribute 44
381
382; V8-FAST-NOT:   .eabi_attribute 19
383;; The default does have an FPU, and for V8-A, it flushes preserving sign.
384; V8-FAST: .eabi_attribute 20, 2
385; V8-FAST-NOT: .eabi_attribute 21
386; V8-FAST-NOT: .eabi_attribute 22
387; V8-FAST: .eabi_attribute 23, 1
388
389; Vt8:     .syntax unified
390; Vt8: .eabi_attribute 6, 14
391; Vt8-NOT:   .eabi_attribute 19
392; Vt8: .eabi_attribute 20, 1
393; Vt8: .eabi_attribute 21, 1
394; Vt8-NOT: .eabi_attribute 22
395; Vt8: .eabi_attribute 23, 3
396
397; V8-FPARMv8:      .syntax unified
398; V8-FPARMv8: .eabi_attribute 6, 14
399; V8-FPARMv8: .fpu fp-armv8
400
401; V8-NEON:      .syntax unified
402; V8-NEON: .eabi_attribute 6, 14
403; V8-NEON: .fpu neon
404; V8-NEON: .eabi_attribute 12, 3
405
406; V8-FPARMv8-NEON:      .syntax unified
407; V8-FPARMv8-NEON: .eabi_attribute 6, 14
408; V8-FPARMv8-NEON: .fpu neon-fp-armv8
409; V8-FPARMv8-NEON: .eabi_attribute 12, 3
410
411; V8-FPARMv8-NEON-CRYPTO:      .syntax unified
412; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 6, 14
413; V8-FPARMv8-NEON-CRYPTO: .fpu crypto-neon-fp-armv8
414; V8-FPARMv8-NEON-CRYPTO: .eabi_attribute 12, 3
415
416; V8MBASELINE: .syntax unified
417; '6' is Tag_CPU_arch, '16' is ARM v8-M Baseline
418; V8MBASELINE: .eabi_attribute 6, 16
419; '7' is Tag_CPU_arch_profile, '77' is 'M'
420; V8MBASELINE: .eabi_attribute 7, 77
421; '8' is Tag_ARM_ISA_use
422; V8MBASELINE: .eabi_attribute 8, 0
423; '9' is Tag_Thumb_ISA_use
424; V8MBASELINE: .eabi_attribute 9, 3
425
426; V8MMAINLINE: .syntax unified
427; '6' is Tag_CPU_arch, '17' is ARM v8-M Mainline
428; V8MMAINLINE: .eabi_attribute 6, 17
429; V8MMAINLINE: .eabi_attribute 7, 77
430; V8MMAINLINE: .eabi_attribute 8, 0
431; V8MMAINLINE: .eabi_attribute 9, 3
432; V8MMAINLINE_DSP-NOT: .eabi_attribute 46
433
434; V8MMAINLINE_DSP: .syntax unified
435; V8MBASELINE_DSP: .eabi_attribute 6, 17
436; V8MBASELINE_DSP: .eabi_attribute 7, 77
437; V8MMAINLINE_DSP: .eabi_attribute 8, 0
438; V8MMAINLINE_DSP: .eabi_attribute 9, 3
439; V8MMAINLINE_DSP: .eabi_attribute 46, 1
440
441; Tag_CPU_unaligned_access
442; NO-STRICT-ALIGN: .eabi_attribute 34, 1
443; STRICT-ALIGN: .eabi_attribute 34, 0
444
445; Tag_CPU_arch  'ARMv7'
446; CORTEX-A7-CHECK: .eabi_attribute      6, 10
447; CORTEX-A7-NOFPU: .eabi_attribute      6, 10
448
449; CORTEX-A7-FPUV4: .eabi_attribute      6, 10
450
451; Tag_CPU_arch_profile 'A'
452; CORTEX-A7-CHECK: .eabi_attribute      7, 65
453; CORTEX-A7-NOFPU: .eabi_attribute      7, 65
454; CORTEX-A7-FPUV4: .eabi_attribute      7, 65
455
456; Tag_ARM_ISA_use
457; CORTEX-A7-CHECK: .eabi_attribute      8, 1
458; CORTEX-A7-NOFPU: .eabi_attribute      8, 1
459; CORTEX-A7-FPUV4: .eabi_attribute      8, 1
460
461; Tag_THUMB_ISA_use
462; CORTEX-A7-CHECK: .eabi_attribute      9, 2
463; CORTEX-A7-NOFPU: .eabi_attribute      9, 2
464; CORTEX-A7-FPUV4: .eabi_attribute      9, 2
465
466; CORTEX-A7-CHECK: .fpu neon-vfpv4
467; CORTEX-A7-NOFPU-NOT: .fpu
468; CORTEX-A7-FPUV4: .fpu vfpv4
469
470; CORTEX-A7-CHECK-NOT:   .eabi_attribute 19
471; Tag_ABI_FP_denormal
472;; We default to IEEE 754 compliance
473; CORTEX-A7-CHECK: .eabi_attribute      20, 1
474;; The A7 has VFPv3 support by default, so flush preserving sign.
475; CORTEX-A7-CHECK-FAST: .eabi_attribute 20, 2
476; CORTEX-A7-NOFPU: .eabi_attribute      20, 1
477;; Despite there being no FPU, we chose to flush to zero preserving
478;; sign. This matches what the hardware would do for this architecture
479;; revision.
480; CORTEX-A7-NOFPU-FAST: .eabi_attribute 20, 2
481; CORTEX-A7-FPUV4: .eabi_attribute      20, 1
482;; The VFPv4 FPU flushes preserving sign.
483; CORTEX-A7-FPUV4-FAST: .eabi_attribute 20, 2
484
485; Tag_ABI_FP_exceptions
486; CORTEX-A7-CHECK: .eabi_attribute      21, 1
487; CORTEX-A7-NOFPU: .eabi_attribute      21, 1
488; CORTEX-A7-FPUV4: .eabi_attribute      21, 1
489
490; Tag_ABI_FP_user_exceptions
491; CORTEX-A7-CHECK-NOT: .eabi_attribute      22
492; CORTEX-A7-NOFPU-NOT: .eabi_attribute      22
493; CORTEX-A7-FPUV4-NOT: .eabi_attribute      22
494
495; Tag_ABI_FP_number_model
496; CORTEX-A7-CHECK: .eabi_attribute      23, 3
497; CORTEX-A7-NOFPU: .eabi_attribute      23, 3
498; CORTEX-A7-FPUV4: .eabi_attribute      23, 3
499
500; Tag_ABI_align_needed
501; CORTEX-A7-CHECK: .eabi_attribute      24, 1
502; CORTEX-A7-NOFPU: .eabi_attribute      24, 1
503; CORTEX-A7-FPUV4: .eabi_attribute      24, 1
504
505; Tag_ABI_align_preserved
506; CORTEX-A7-CHECK: .eabi_attribute      25, 1
507; CORTEX-A7-NOFPU: .eabi_attribute      25, 1
508; CORTEX-A7-FPUV4: .eabi_attribute      25, 1
509
510; Tag_FP_HP_extension
511; CORTEX-A7-CHECK: .eabi_attribute      36, 1
512; CORTEX-A7-NOFPU-NOT: .eabi_attribute  36
513; CORTEX-A7-FPUV4: .eabi_attribute      36, 1
514
515; Tag_FP_16bit_format
516; CORTEX-A7-CHECK: .eabi_attribute      38, 1
517; CORTEX-A7-NOFPU: .eabi_attribute      38, 1
518; CORTEX-A7-FPUV4: .eabi_attribute      38, 1
519
520; Tag_MPextension_use
521; CORTEX-A7-CHECK: .eabi_attribute      42, 1
522; CORTEX-A7-NOFPU: .eabi_attribute      42, 1
523; CORTEX-A7-FPUV4: .eabi_attribute      42, 1
524
525; Tag_DIV_use
526; CORTEX-A7-CHECK: .eabi_attribute      44, 2
527; CORTEX-A7-NOFPU: .eabi_attribute      44, 2
528; CORTEX-A7-FPUV4: .eabi_attribute      44, 2
529
530; Tag_DSP_extension
531; CORTEX-A7-CHECK-NOT: .eabi_attribute      46
532
533; Tag_Virtualization_use
534; CORTEX-A7-CHECK: .eabi_attribute      68, 3
535; CORTEX-A7-NOFPU: .eabi_attribute      68, 3
536; CORTEX-A7-FPUV4: .eabi_attribute      68, 3
537
538; CORTEX-A5-DEFAULT:        .cpu    cortex-a5
539; CORTEX-A5-DEFAULT:        .eabi_attribute 6, 10
540; CORTEX-A5-DEFAULT:        .eabi_attribute 7, 65
541; CORTEX-A5-DEFAULT:        .eabi_attribute 8, 1
542; CORTEX-A5-DEFAULT:        .eabi_attribute 9, 2
543; CORTEX-A5-DEFAULT:        .fpu    neon-vfpv4
544; CORTEX-A5-NOT:   .eabi_attribute 19
545;; We default to IEEE 754 compliance
546; CORTEX-A5-DEFAULT:        .eabi_attribute 20, 1
547; CORTEX-A5-DEFAULT:        .eabi_attribute 21, 1
548; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 22
549; CORTEX-A5-DEFAULT:        .eabi_attribute 23, 3
550; CORTEX-A5-DEFAULT:        .eabi_attribute 24, 1
551; CORTEX-A5-DEFAULT:        .eabi_attribute 25, 1
552; CORTEX-A5-DEFAULT:        .eabi_attribute 42, 1
553; CORTEX-A5-DEFAULT-NOT:        .eabi_attribute 44
554; CORTEX-A5-DEFAULT:        .eabi_attribute 68, 1
555
556; CORTEX-A5-DEFAULT-FAST-NOT:   .eabi_attribute 19
557;; The A5 defaults to a VFPv4 FPU, so it flushed preserving the sign when -ffast-math
558;; is given.
559; CORTEX-A5-DEFAULT-FAST:        .eabi_attribute 20, 2
560; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 21
561; CORTEX-A5-DEFAULT-FAST-NOT: .eabi_attribute 22
562; CORTEX-A5-DEFAULT-FAST: .eabi_attribute 23, 1
563
564; CORTEX-A5-NONEON:        .cpu    cortex-a5
565; CORTEX-A5-NONEON:        .eabi_attribute 6, 10
566; CORTEX-A5-NONEON:        .eabi_attribute 7, 65
567; CORTEX-A5-NONEON:        .eabi_attribute 8, 1
568; CORTEX-A5-NONEON:        .eabi_attribute 9, 2
569; CORTEX-A5-NONEON:        .fpu    vfpv4-d16
570;; We default to IEEE 754 compliance
571; CORTEX-A5-NONEON:        .eabi_attribute 20, 1
572; CORTEX-A5-NONEON:        .eabi_attribute 21, 1
573; CORTEX-A5-NONEON-NOT:    .eabi_attribute 22
574; CORTEX-A5-NONEON:        .eabi_attribute 23, 3
575; CORTEX-A5-NONEON:        .eabi_attribute 24, 1
576; CORTEX-A5-NONEON:        .eabi_attribute 25, 1
577; CORTEX-A5-NONEON:        .eabi_attribute 42, 1
578; CORTEX-A5-NONEON:        .eabi_attribute 68, 1
579
580; CORTEX-A5-NONEON-FAST-NOT:   .eabi_attribute 19
581;; The A5 defaults to a VFPv4 FPU, so it flushed preserving sign when -ffast-math
582;; is given.
583; CORTEX-A5-NONEON-FAST:        .eabi_attribute 20, 2
584; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 21
585; CORTEX-A5-NONEON-FAST-NOT: .eabi_attribute 22
586; CORTEX-A5-NONEON-FAST: .eabi_attribute 23, 1
587
588; CORTEX-A5-NOFPU:        .cpu    cortex-a5
589; CORTEX-A5-NOFPU:        .eabi_attribute 6, 10
590; CORTEX-A5-NOFPU:        .eabi_attribute 7, 65
591; CORTEX-A5-NOFPU:        .eabi_attribute 8, 1
592; CORTEX-A5-NOFPU:        .eabi_attribute 9, 2
593; CORTEX-A5-NOFPU-NOT:    .fpu
594; CORTEX-A5-NOFPU-NOT:   .eabi_attribute 19
595;; We default to IEEE 754 compliance
596; CORTEX-A5-NOFPU:        .eabi_attribute 20, 1
597; CORTEX-A5-NOFPU:        .eabi_attribute 21, 1
598; CORTEX-A5-NOFPU-NOT:    .eabi_attribute 22
599; CORTEX-A5-NOFPU:        .eabi_attribute 23, 3
600; CORTEX-A5-NOFPU:        .eabi_attribute 24, 1
601; CORTEX-A5-NOFPU:        .eabi_attribute 25, 1
602; CORTEX-A5-NOFPU:        .eabi_attribute 42, 1
603; CORTEX-A5-NOFPU:        .eabi_attribute 68, 1
604
605; CORTEX-A5-NOFPU-FAST-NOT:   .eabi_attribute 19
606;; Despite there being no FPU, we chose to flush to zero preserving
607;; sign. This matches what the hardware would do for this architecture
608;; revision.
609; CORTEX-A5-NOFPU-FAST: .eabi_attribute 20, 2
610; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 21
611; CORTEX-A5-NOFPU-FAST-NOT: .eabi_attribute 22
612; CORTEX-A5-NOFPU-FAST: .eabi_attribute 23, 1
613
614; CORTEX-A8-SOFT:  .cpu cortex-a8
615; CORTEX-A8-SOFT:  .eabi_attribute 6, 10
616; CORTEX-A8-SOFT:  .eabi_attribute 7, 65
617; CORTEX-A8-SOFT:  .eabi_attribute 8, 1
618; CORTEX-A8-SOFT:  .eabi_attribute 9, 2
619; CORTEX-A8-SOFT:  .fpu neon
620; CORTEX-A8-SOFT-NOT:   .eabi_attribute 19
621;; We default to IEEE 754 compliance
622; CORTEX-A8-SOFT:  .eabi_attribute 20, 1
623; CORTEX-A8-SOFT:  .eabi_attribute 21, 1
624; CORTEX-A8-SOFT-NOT:  .eabi_attribute 22
625; CORTEX-A8-SOFT:  .eabi_attribute 23, 3
626; CORTEX-A8-SOFT:  .eabi_attribute 24, 1
627; CORTEX-A8-SOFT:  .eabi_attribute 25, 1
628; CORTEX-A8-SOFT-NOT:  .eabi_attribute 27
629; CORTEX-A8-SOFT-NOT:  .eabi_attribute 28
630; CORTEX-A8-SOFT-NOT:  .eabi_attribute 36, 1
631; CORTEX-A8-SOFT:  .eabi_attribute 38, 1
632; CORTEX-A8-SOFT-NOT:  .eabi_attribute 42, 1
633; CORTEX-A8-SOFT-NOT:  .eabi_attribute 44
634; CORTEX-A8-SOFT:  .eabi_attribute 68, 1
635
636; CORTEX-A9-SOFT:  .cpu cortex-a9
637; CORTEX-A9-SOFT:  .eabi_attribute 6, 10
638; CORTEX-A9-SOFT:  .eabi_attribute 7, 65
639; CORTEX-A9-SOFT:  .eabi_attribute 8, 1
640; CORTEX-A9-SOFT:  .eabi_attribute 9, 2
641; CORTEX-A9-SOFT:  .fpu neon
642; CORTEX-A9-SOFT-NOT:   .eabi_attribute 19
643;; We default to IEEE 754 compliance
644; CORTEX-A9-SOFT:  .eabi_attribute 20, 1
645; CORTEX-A9-SOFT:  .eabi_attribute 21, 1
646; CORTEX-A9-SOFT-NOT:  .eabi_attribute 22
647; CORTEX-A9-SOFT:  .eabi_attribute 23, 3
648; CORTEX-A9-SOFT:  .eabi_attribute 24, 1
649; CORTEX-A9-SOFT:  .eabi_attribute 25, 1
650; CORTEX-A9-SOFT-NOT:  .eabi_attribute 27
651; CORTEX-A9-SOFT-NOT:  .eabi_attribute 28
652; CORTEX-A9-SOFT:  .eabi_attribute 36, 1
653; CORTEX-A9-SOFT:  .eabi_attribute 38, 1
654; CORTEX-A9-SOFT:  .eabi_attribute 42, 1
655; CORTEX-A9-SOFT-NOT:  .eabi_attribute 44
656; CORTEX-A9-SOFT:  .eabi_attribute 68, 1
657
658; CORTEX-A8-SOFT-FAST-NOT:   .eabi_attribute 19
659; CORTEX-A9-SOFT-FAST-NOT:   .eabi_attribute 19
660;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
661;; -ffast-math is specified.
662; CORTEX-A8-SOFT-FAST:  .eabi_attribute 20, 2
663; CORTEX-A9-SOFT-FAST:  .eabi_attribute 20, 2
664; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 21
665; CORTEX-A5-SOFT-FAST-NOT: .eabi_attribute 22
666; CORTEX-A5-SOFT-FAST: .eabi_attribute 23, 1
667
668; CORTEX-A8-HARD:  .cpu cortex-a8
669; CORTEX-A8-HARD:  .eabi_attribute 6, 10
670; CORTEX-A8-HARD:  .eabi_attribute 7, 65
671; CORTEX-A8-HARD:  .eabi_attribute 8, 1
672; CORTEX-A8-HARD:  .eabi_attribute 9, 2
673; CORTEX-A8-HARD:  .fpu neon
674; CORTEX-A8-HARD-NOT:   .eabi_attribute 19
675;; We default to IEEE 754 compliance
676; CORTEX-A8-HARD:  .eabi_attribute 20, 1
677; CORTEX-A8-HARD:  .eabi_attribute 21, 1
678; CORTEX-A8-HARD-NOT:  .eabi_attribute 22
679; CORTEX-A8-HARD:  .eabi_attribute 23, 3
680; CORTEX-A8-HARD:  .eabi_attribute 24, 1
681; CORTEX-A8-HARD:  .eabi_attribute 25, 1
682; CORTEX-A8-HARD-NOT:  .eabi_attribute 27
683; CORTEX-A8-HARD:  .eabi_attribute 28, 1
684; CORTEX-A8-HARD-NOT:  .eabi_attribute 36, 1
685; CORTEX-A8-HARD:  .eabi_attribute 38, 1
686; CORTEX-A8-HARD-NOT:  .eabi_attribute 42, 1
687; CORTEX-A8-HARD:  .eabi_attribute 68, 1
688
689
690
691; CORTEX-A9-HARD:  .cpu cortex-a9
692; CORTEX-A9-HARD:  .eabi_attribute 6, 10
693; CORTEX-A9-HARD:  .eabi_attribute 7, 65
694; CORTEX-A9-HARD:  .eabi_attribute 8, 1
695; CORTEX-A9-HARD:  .eabi_attribute 9, 2
696; CORTEX-A9-HARD:  .fpu neon
697; CORTEX-A9-HARD-NOT:   .eabi_attribute 19
698;; We default to IEEE 754 compliance
699; CORTEX-A9-HARD:  .eabi_attribute 20, 1
700; CORTEX-A9-HARD:  .eabi_attribute 21, 1
701; CORTEX-A9-HARD-NOT:  .eabi_attribute 22
702; CORTEX-A9-HARD:  .eabi_attribute 23, 3
703; CORTEX-A9-HARD:  .eabi_attribute 24, 1
704; CORTEX-A9-HARD:  .eabi_attribute 25, 1
705; CORTEX-A9-HARD-NOT:  .eabi_attribute 27
706; CORTEX-A9-HARD:  .eabi_attribute 28, 1
707; CORTEX-A9-HARD:  .eabi_attribute 36, 1
708; CORTEX-A9-HARD:  .eabi_attribute 38, 1
709; CORTEX-A9-HARD:  .eabi_attribute 42, 1
710; CORTEX-A9-HARD:  .eabi_attribute 68, 1
711
712; CORTEX-A8-HARD-FAST-NOT:   .eabi_attribute 19
713;; The A8 defaults to a VFPv3 FPU, so it flushes preserving the sign when
714;; -ffast-math is specified.
715; CORTEX-A8-HARD-FAST:  .eabi_attribute 20, 2
716; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 21
717; CORTEX-A8-HARD-FAST-NOT:  .eabi_attribute 22
718; CORTEX-A8-HARD-FAST:  .eabi_attribute 23, 1
719
720; CORTEX-A9-HARD-FAST-NOT:   .eabi_attribute 19
721;; The A9 defaults to a VFPv3 FPU, so it flushes preserving the sign when
722;; -ffast-math is specified.
723; CORTEX-A9-HARD-FAST:  .eabi_attribute 20, 2
724; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 21
725; CORTEX-A9-HARD-FAST-NOT:  .eabi_attribute 22
726; CORTEX-A9-HARD-FAST:  .eabi_attribute 23, 1
727
728; CORTEX-A12-DEFAULT:  .cpu cortex-a12
729; CORTEX-A12-DEFAULT:  .eabi_attribute 6, 10
730; CORTEX-A12-DEFAULT:  .eabi_attribute 7, 65
731; CORTEX-A12-DEFAULT:  .eabi_attribute 8, 1
732; CORTEX-A12-DEFAULT:  .eabi_attribute 9, 2
733; CORTEX-A12-DEFAULT:  .fpu neon-vfpv4
734; CORTEX-A12-DEFAULT-NOT:   .eabi_attribute 19
735;; We default to IEEE 754 compliance
736; CORTEX-A12-DEFAULT:  .eabi_attribute 20, 1
737; CORTEX-A12-DEFAULT:  .eabi_attribute 21, 1
738; CORTEX-A12-DEFAULT-NOT:  .eabi_attribute 22
739; CORTEX-A12-DEFAULT:  .eabi_attribute 23, 3
740; CORTEX-A12-DEFAULT:  .eabi_attribute 24, 1
741; CORTEX-A12-DEFAULT:  .eabi_attribute 25, 1
742; CORTEX-A12-DEFAULT:  .eabi_attribute 42, 1
743; CORTEX-A12-DEFAULT:  .eabi_attribute 44, 2
744; CORTEX-A12-DEFAULT:  .eabi_attribute 68, 3
745
746; CORTEX-A12-DEFAULT-FAST-NOT:   .eabi_attribute 19
747;; The A12 defaults to a VFPv3 FPU, so it flushes preserving the sign when
748;; -ffast-math is specified.
749; CORTEX-A12-DEFAULT-FAST:  .eabi_attribute 20, 2
750; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 21
751; CORTEX-A12-HARD-FAST-NOT:  .eabi_attribute 22
752; CORTEX-A12-HARD-FAST:  .eabi_attribute 23, 1
753
754; CORTEX-A12-NOFPU:  .cpu cortex-a12
755; CORTEX-A12-NOFPU:  .eabi_attribute 6, 10
756; CORTEX-A12-NOFPU:  .eabi_attribute 7, 65
757; CORTEX-A12-NOFPU:  .eabi_attribute 8, 1
758; CORTEX-A12-NOFPU:  .eabi_attribute 9, 2
759; CORTEX-A12-NOFPU-NOT:  .fpu
760; CORTEX-A12-NOFPU-NOT:   .eabi_attribute 19
761;; We default to IEEE 754 compliance
762; CORTEX-A12-NOFPU:  .eabi_attribute 20, 1
763; CORTEX-A12-NOFPU:  .eabi_attribute 21, 1
764; CORTEX-A12-NOFPU-NOT:  .eabi_attribute 22
765; CORTEX-A12-NOFPU:  .eabi_attribute 23, 3
766; CORTEX-A12-NOFPU:  .eabi_attribute 24, 1
767; CORTEX-A12-NOFPU:  .eabi_attribute 25, 1
768; CORTEX-A12-NOFPU:  .eabi_attribute 42, 1
769; CORTEX-A12-NOFPU:  .eabi_attribute 44, 2
770; CORTEX-A12-NOFPU:  .eabi_attribute 68, 3
771
772; CORTEX-A12-NOFPU-FAST-NOT:   .eabi_attribute 19
773;; Despite there being no FPU, we chose to flush to zero preserving
774;; sign. This matches what the hardware would do for this architecture
775;; revision.
776; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 20, 2
777; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 21
778; CORTEX-A12-NOFPU-FAST-NOT:  .eabi_attribute 22
779; CORTEX-A12-NOFPU-FAST:  .eabi_attribute 23, 1
780
781; CORTEX-A15: .cpu cortex-a15
782; CORTEX-A15: .eabi_attribute 6, 10
783; CORTEX-A15: .eabi_attribute 7, 65
784; CORTEX-A15: .eabi_attribute 8, 1
785; CORTEX-A15: .eabi_attribute 9, 2
786; CORTEX-A15: .fpu neon-vfpv4
787; CORTEX-A15-NOT:   .eabi_attribute 19
788;; We default to IEEE 754 compliance
789; CORTEX-A15: .eabi_attribute 20, 1
790; CORTEX-A15: .eabi_attribute 21, 1
791; CORTEX-A15-NOT: .eabi_attribute 22
792; CORTEX-A15: .eabi_attribute 23, 3
793; CORTEX-A15: .eabi_attribute 24, 1
794; CORTEX-A15: .eabi_attribute 25, 1
795; CORTEX-A15-NOT: .eabi_attribute 27
796; CORTEX-A15-NOT: .eabi_attribute 28
797; CORTEX-A15: .eabi_attribute 36, 1
798; CORTEX-A15: .eabi_attribute 38, 1
799; CORTEX-A15: .eabi_attribute 42, 1
800; CORTEX-A15: .eabi_attribute 44, 2
801; CORTEX-A15: .eabi_attribute 68, 3
802
803; CORTEX-A15-FAST-NOT:   .eabi_attribute 19
804;; The A15 defaults to a VFPv3 FPU, so it flushes preserving the sign when
805;; -ffast-math is specified.
806; CORTEX-A15-FAST: .eabi_attribute 20, 2
807; CORTEX-A15-FAST-NOT:  .eabi_attribute 21
808; CORTEX-A15-FAST-NOT:  .eabi_attribute 22
809; CORTEX-A15-FAST:  .eabi_attribute 23, 1
810
811; CORTEX-A17-DEFAULT:  .cpu cortex-a17
812; CORTEX-A17-DEFAULT:  .eabi_attribute 6, 10
813; CORTEX-A17-DEFAULT:  .eabi_attribute 7, 65
814; CORTEX-A17-DEFAULT:  .eabi_attribute 8, 1
815; CORTEX-A17-DEFAULT:  .eabi_attribute 9, 2
816; CORTEX-A17-DEFAULT:  .fpu neon-vfpv4
817; CORTEX-A17-DEFAULT-NOT:   .eabi_attribute 19
818;; We default to IEEE 754 compliance
819; CORTEX-A17-DEFAULT:  .eabi_attribute 20, 1
820; CORTEX-A17-DEFAULT:  .eabi_attribute 21, 1
821; CORTEX-A17-DEFAULT-NOT:  .eabi_attribute 22
822; CORTEX-A17-DEFAULT:  .eabi_attribute 23, 3
823; CORTEX-A17-DEFAULT:  .eabi_attribute 24, 1
824; CORTEX-A17-DEFAULT:  .eabi_attribute 25, 1
825; CORTEX-A17-DEFAULT:  .eabi_attribute 42, 1
826; CORTEX-A17-DEFAULT:  .eabi_attribute 44, 2
827; CORTEX-A17-DEFAULT:  .eabi_attribute 68, 3
828
829; CORTEX-A17-FAST-NOT:   .eabi_attribute 19
830;; The A17 defaults to a VFPv3 FPU, so it flushes preserving the sign when
831;; -ffast-math is specified.
832; CORTEX-A17-FAST:  .eabi_attribute 20, 2
833; CORTEX-A17-FAST-NOT:  .eabi_attribute 21
834; CORTEX-A17-FAST-NOT:  .eabi_attribute 22
835; CORTEX-A17-FAST:  .eabi_attribute 23, 1
836
837; CORTEX-A17-NOFPU:  .cpu cortex-a17
838; CORTEX-A17-NOFPU:  .eabi_attribute 6, 10
839; CORTEX-A17-NOFPU:  .eabi_attribute 7, 65
840; CORTEX-A17-NOFPU:  .eabi_attribute 8, 1
841; CORTEX-A17-NOFPU:  .eabi_attribute 9, 2
842; CORTEX-A17-NOFPU-NOT:  .fpu
843; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
844;; We default to IEEE 754 compliance
845; CORTEX-A17-NOFPU:  .eabi_attribute 20, 1
846; CORTEX-A17-NOFPU:  .eabi_attribute 21, 1
847; CORTEX-A17-NOFPU-NOT:  .eabi_attribute 22
848; CORTEX-A17-NOFPU:  .eabi_attribute 23, 3
849; CORTEX-A17-NOFPU:  .eabi_attribute 24, 1
850; CORTEX-A17-NOFPU:  .eabi_attribute 25, 1
851; CORTEX-A17-NOFPU:  .eabi_attribute 42, 1
852; CORTEX-A17-NOFPU:  .eabi_attribute 44, 2
853; CORTEX-A17-NOFPU:  .eabi_attribute 68, 3
854
855; CORTEX-A17-NOFPU-NOT:   .eabi_attribute 19
856;; Despite there being no FPU, we chose to flush to zero preserving
857;; sign. This matches what the hardware would do for this architecture
858;; revision.
859; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 20, 2
860; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 21
861; CORTEX-A17-NOFPU-FAST-NOT:  .eabi_attribute 22
862; CORTEX-A17-NOFPU-FAST:  .eabi_attribute 23, 1
863
864; Test flags -enable-no-trapping-fp-math and -denormal-fp-math:
865; NO-TRAPPING-MATH:  .eabi_attribute 21, 0
866; DENORMAL-IEEE:  .eabi_attribute 20, 1
867; DENORMAL-PRESERVE-SIGN:  .eabi_attribute 20, 2
868; DENORMAL-POSITIVE-ZERO:  .eabi_attribute 20, 0
869
870; CORTEX-M0:  .cpu cortex-m0
871; CORTEX-M0:  .eabi_attribute 6, 12
872; CORTEX-M0-NOT:  .eabi_attribute 7
873; CORTEX-M0:  .eabi_attribute 8, 0
874; CORTEX-M0:  .eabi_attribute 9, 1
875; CORTEX-M0-NOT:   .eabi_attribute 19
876;; We default to IEEE 754 compliance
877; CORTEX-M0:  .eabi_attribute 20, 1
878; CORTEX-M0:  .eabi_attribute 21, 1
879; CORTEX-M0-NOT:  .eabi_attribute 22
880; CORTEX-M0:  .eabi_attribute 23, 3
881; CORTEX-M0: .eabi_attribute 34, 0
882; CORTEX-M0:  .eabi_attribute 24, 1
883; CORTEX-M0:  .eabi_attribute 25, 1
884; CORTEX-M0-NOT:  .eabi_attribute 27
885; CORTEX-M0-NOT:  .eabi_attribute 28
886; CORTEX-M0-NOT:  .eabi_attribute 36
887; CORTEX-M0:  .eabi_attribute 38, 1
888; CORTEX-M0-NOT:  .eabi_attribute 42
889; CORTEX-M0-NOT:  .eabi_attribute 44
890; CORTEX-M0-NOT:  .eabi_attribute 68
891
892; CORTEX-M0-FAST-NOT:   .eabi_attribute 19
893;; Despite the M0 CPU having no FPU in this scenario, we chose to
894;; flush to positive zero here. There's no hardware support doing
895;; this, but the fast maths software library might and such behaviour
896;; would match hardware support on this architecture revision if it
897;; existed.
898; CORTEX-M0-FAST-NOT:  .eabi_attribute 20
899; CORTEX-M0-FAST-NOT:  .eabi_attribute 21
900; CORTEX-M0-FAST-NOT:  .eabi_attribute 22
901; CORTEX-M0-FAST:  .eabi_attribute 23, 1
902
903; CORTEX-M0PLUS:  .cpu cortex-m0plus
904; CORTEX-M0PLUS:  .eabi_attribute 6, 12
905; CORTEX-M0PLUS-NOT:  .eabi_attribute 7
906; CORTEX-M0PLUS:  .eabi_attribute 8, 0
907; CORTEX-M0PLUS:  .eabi_attribute 9, 1
908; CORTEX-M0PLUS-NOT:   .eabi_attribute 19
909;; We default to IEEE 754 compliance
910; CORTEX-M0PLUS:  .eabi_attribute 20, 1
911; CORTEX-M0PLUS:  .eabi_attribute 21, 1
912; CORTEX-M0PLUS-NOT:  .eabi_attribute 22
913; CORTEX-M0PLUS:  .eabi_attribute 23, 3
914; CORTEX-M0PLUS:  .eabi_attribute 24, 1
915; CORTEX-M0PLUS:  .eabi_attribute 25, 1
916; CORTEX-M0PLUS-NOT:  .eabi_attribute 27
917; CORTEX-M0PLUS-NOT:  .eabi_attribute 28
918; CORTEX-M0PLUS-NOT:  .eabi_attribute 36
919; CORTEX-M0PLUS:  .eabi_attribute 38, 1
920; CORTEX-M0PLUS-NOT:  .eabi_attribute 42
921; CORTEX-M0PLUS-NOT:  .eabi_attribute 44
922; CORTEX-M0PLUS-NOT:  .eabi_attribute 68
923
924; CORTEX-M0PLUS-FAST-NOT:   .eabi_attribute 19
925;; Despite the M0+ CPU having no FPU in this scenario, we chose to
926;; flush to positive zero here. There's no hardware support doing
927;; this, but the fast maths software library might and such behaviour
928;; would match hardware support on this architecture revision if it
929;; existed.
930; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 20
931; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 21
932; CORTEX-M0PLUS-FAST-NOT:  .eabi_attribute 22
933; CORTEX-M0PLUS-FAST:  .eabi_attribute 23, 1
934
935; CORTEX-M1:  .cpu cortex-m1
936; CORTEX-M1:  .eabi_attribute 6, 12
937; CORTEX-M1-NOT:  .eabi_attribute 7
938; CORTEX-M1:  .eabi_attribute 8, 0
939; CORTEX-M1:  .eabi_attribute 9, 1
940; CORTEX-M1-NOT:   .eabi_attribute 19
941;; We default to IEEE 754 compliance
942; CORTEX-M1:  .eabi_attribute 20, 1
943; CORTEX-M1:  .eabi_attribute 21, 1
944; CORTEX-M1-NOT:  .eabi_attribute 22
945; CORTEX-M1:  .eabi_attribute 23, 3
946; CORTEX-M1:  .eabi_attribute 24, 1
947; CORTEX-M1:  .eabi_attribute 25, 1
948; CORTEX-M1-NOT:  .eabi_attribute 27
949; CORTEX-M1-NOT:  .eabi_attribute 28
950; CORTEX-M1-NOT:  .eabi_attribute 36
951; CORTEX-M1:  .eabi_attribute 38, 1
952; CORTEX-M1-NOT:  .eabi_attribute 42
953; CORTEX-M1-NOT:  .eabi_attribute 44
954; CORTEX-M1-NOT:  .eabi_attribute 68
955
956; CORTEX-M1-FAST-NOT:   .eabi_attribute 19
957;; Despite the M1 CPU having no FPU in this scenario, we chose to
958;; flush to positive zero here. There's no hardware support doing
959;; this, but the fast maths software library might and such behaviour
960;; would match hardware support on this architecture revision if it
961;; existed.
962; CORTEX-M1-FAST-NOT:  .eabi_attribute 20
963; CORTEX-M1-FAST-NOT:  .eabi_attribute 21
964; CORTEX-M1-FAST-NOT:  .eabi_attribute 22
965; CORTEX-M1-FAST:  .eabi_attribute 23, 1
966
967; SC000:  .cpu sc000
968; SC000:  .eabi_attribute 6, 12
969; SC000-NOT:  .eabi_attribute 7
970; SC000:  .eabi_attribute 8, 0
971; SC000:  .eabi_attribute 9, 1
972; SC000-NOT:   .eabi_attribute 19
973;; We default to IEEE 754 compliance
974; SC000:  .eabi_attribute 20, 1
975; SC000:  .eabi_attribute 21, 1
976; SC000-NOT:  .eabi_attribute 22
977; SC000:  .eabi_attribute 23, 3
978; SC000:  .eabi_attribute 24, 1
979; SC000:  .eabi_attribute 25, 1
980; SC000-NOT:  .eabi_attribute 27
981; SC000-NOT:  .eabi_attribute 28
982; SC000-NOT:  .eabi_attribute 36
983; SC000:  .eabi_attribute 38, 1
984; SC000-NOT:  .eabi_attribute 42
985; SC000-NOT:  .eabi_attribute 44
986; SC000-NOT:  .eabi_attribute 68
987
988; SC000-FAST-NOT:   .eabi_attribute 19
989;; Despite the SC000 CPU having no FPU in this scenario, we chose to
990;; flush to positive zero here. There's no hardware support doing
991;; this, but the fast maths software library might and such behaviour
992;; would match hardware support on this architecture revision if it
993;; existed.
994; SC000-FAST-NOT:  .eabi_attribute 20
995; SC000-FAST-NOT:  .eabi_attribute 21
996; SC000-FAST-NOT:  .eabi_attribute 22
997; SC000-FAST:  .eabi_attribute 23, 1
998
999; CORTEX-M3:  .cpu cortex-m3
1000; CORTEX-M3:  .eabi_attribute 6, 10
1001; CORTEX-M3:  .eabi_attribute 7, 77
1002; CORTEX-M3:  .eabi_attribute 8, 0
1003; CORTEX-M3:  .eabi_attribute 9, 2
1004; CORTEX-M3-NOT:   .eabi_attribute 19
1005;; We default to IEEE 754 compliance
1006; CORTEX-M3:  .eabi_attribute 20, 1
1007; CORTEX-M3:  .eabi_attribute 21, 1
1008; CORTEX-M3-NOT:  .eabi_attribute 22
1009; CORTEX-M3:  .eabi_attribute 23, 3
1010; CORTEX-M3:  .eabi_attribute 24, 1
1011; CORTEX-M3:  .eabi_attribute 25, 1
1012; CORTEX-M3-NOT:  .eabi_attribute 27
1013; CORTEX-M3-NOT:  .eabi_attribute 28
1014; CORTEX-M3-NOT:  .eabi_attribute 36
1015; CORTEX-M3:  .eabi_attribute 38, 1
1016; CORTEX-M3-NOT:  .eabi_attribute 42
1017; CORTEX-M3-NOT:  .eabi_attribute 44
1018; CORTEX-M3-NOT:  .eabi_attribute 68
1019
1020; CORTEX-M3-FAST-NOT:   .eabi_attribute 19
1021;; Despite there being no FPU, we chose to flush to zero preserving
1022;; sign. This matches what the hardware would do for this architecture
1023;; revision.
1024; CORTEX-M3-FAST:  .eabi_attribute 20, 2
1025; CORTEX-M3-FAST-NOT:  .eabi_attribute 21
1026; CORTEX-M3-FAST-NOT:  .eabi_attribute 22
1027; CORTEX-M3-FAST:  .eabi_attribute 23, 1
1028
1029; SC300:  .cpu sc300
1030; SC300:  .eabi_attribute 6, 10
1031; SC300:  .eabi_attribute 7, 77
1032; SC300:  .eabi_attribute 8, 0
1033; SC300:  .eabi_attribute 9, 2
1034; SC300-NOT:   .eabi_attribute 19
1035;; We default to IEEE 754 compliance
1036; SC300:  .eabi_attribute 20, 1
1037; SC300:  .eabi_attribute 21, 1
1038; SC300-NOT:  .eabi_attribute 22
1039; SC300:  .eabi_attribute 23, 3
1040; SC300:  .eabi_attribute 24, 1
1041; SC300:  .eabi_attribute 25, 1
1042; SC300-NOT:  .eabi_attribute 27
1043; SC300-NOT:  .eabi_attribute 28
1044; SC300-NOT:  .eabi_attribute 36
1045; SC300:  .eabi_attribute 38, 1
1046; SC300-NOT:  .eabi_attribute 42
1047; SC300-NOT:  .eabi_attribute 44
1048; SC300-NOT:  .eabi_attribute 68
1049
1050; SC300-FAST-NOT:   .eabi_attribute 19
1051;; Despite there being no FPU, we chose to flush to zero preserving
1052;; sign. This matches what the hardware would do for this architecture
1053;; revision.
1054; SC300-FAST:  .eabi_attribute 20, 2
1055; SC300-FAST-NOT:  .eabi_attribute 21
1056; SC300-FAST-NOT:  .eabi_attribute 22
1057; SC300-FAST:  .eabi_attribute 23, 1
1058
1059; CORTEX-M4-SOFT:  .cpu cortex-m4
1060; CORTEX-M4-SOFT:  .eabi_attribute 6, 13
1061; CORTEX-M4-SOFT:  .eabi_attribute 7, 77
1062; CORTEX-M4-SOFT:  .eabi_attribute 8, 0
1063; CORTEX-M4-SOFT:  .eabi_attribute 9, 2
1064; CORTEX-M4-SOFT:  .fpu fpv4-sp-d16
1065; CORTEX-M4-SOFT-NOT:   .eabi_attribute 19
1066;; We default to IEEE 754 compliance
1067; CORTEX-M4-SOFT:  .eabi_attribute 20, 1
1068; CORTEX-M4-SOFT:  .eabi_attribute 21, 1
1069; CORTEX-M4-SOFT-NOT:  .eabi_attribute 22
1070; CORTEX-M4-SOFT:  .eabi_attribute 23, 3
1071; CORTEX-M4-SOFT:  .eabi_attribute 24, 1
1072; CORTEX-M4-SOFT:  .eabi_attribute 25, 1
1073; CORTEX-M4-SOFT:  .eabi_attribute 27, 1
1074; CORTEX-M4-SOFT-NOT:  .eabi_attribute 28
1075; CORTEX-M4-SOFT:  .eabi_attribute 36, 1
1076; CORTEX-M4-SOFT:  .eabi_attribute 38, 1
1077; CORTEX-M4-SOFT-NOT:  .eabi_attribute 42
1078; CORTEX-M4-SOFT-NOT:  .eabi_attribute 44
1079; CORTEX-M4-SOFT-NOT:  .eabi_attribute 68
1080
1081; CORTEX-M4-SOFT-FAST-NOT:   .eabi_attribute 19
1082;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1083;; -ffast-math is specified.
1084; CORTEX-M4-SOFT-FAST:  .eabi_attribute 20, 2
1085; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 21
1086; CORTEX-M4-SOFT-FAST-NOT:  .eabi_attribute 22
1087; CORTEX-M4-SOFT-FAST:  .eabi_attribute 23, 1
1088
1089; CORTEX-M4-HARD:  .cpu cortex-m4
1090; CORTEX-M4-HARD:  .eabi_attribute 6, 13
1091; CORTEX-M4-HARD:  .eabi_attribute 7, 77
1092; CORTEX-M4-HARD:  .eabi_attribute 8, 0
1093; CORTEX-M4-HARD:  .eabi_attribute 9, 2
1094; CORTEX-M4-HARD:  .fpu fpv4-sp-d16
1095; CORTEX-M4-HARD-NOT:   .eabi_attribute 19
1096;; We default to IEEE 754 compliance
1097; CORTEX-M4-HARD:  .eabi_attribute 20, 1
1098; CORTEX-M4-HARD:  .eabi_attribute 21, 1
1099; CORTEX-M4-HARD-NOT:  .eabi_attribute 22
1100; CORTEX-M4-HARD:  .eabi_attribute 23, 3
1101; CORTEX-M4-HARD:  .eabi_attribute 24, 1
1102; CORTEX-M4-HARD:  .eabi_attribute 25, 1
1103; CORTEX-M4-HARD:  .eabi_attribute 27, 1
1104; CORTEX-M4-HARD:  .eabi_attribute 28, 1
1105; CORTEX-M4-HARD:  .eabi_attribute 36, 1
1106; CORTEX-M4-HARD:  .eabi_attribute 38, 1
1107; CORTEX-M4-HARD-NOT:  .eabi_attribute 42
1108; CORTEX-M4-HARD-NOT:  .eabi_attribute 44
1109; CORTEX-M4-HARD-NOT:  .eabi_attribute 68
1110
1111; CORTEX-M4-HARD-FAST-NOT:   .eabi_attribute 19
1112;; The M4 defaults to a VFPv4 FPU, so it flushes preserving the sign when
1113;; -ffast-math is specified.
1114; CORTEX-M4-HARD-FAST:  .eabi_attribute 20, 2
1115; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 21
1116; CORTEX-M4-HARD-FAST-NOT:  .eabi_attribute 22
1117; CORTEX-M4-HARD-FAST:  .eabi_attribute 23, 1
1118
1119; CORTEX-M7:  .cpu    cortex-m7
1120; CORTEX-M7:  .eabi_attribute 6, 13
1121; CORTEX-M7:  .eabi_attribute 7, 77
1122; CORTEX-M7:  .eabi_attribute 8, 0
1123; CORTEX-M7:  .eabi_attribute 9, 2
1124; CORTEX-M7-SOFT-NOT: .fpu
1125; CORTEX-M7-SINGLE:  .fpu fpv5-sp-d16
1126; CORTEX-M7-DOUBLE:  .fpu fpv5-d16
1127; CORTEX-M7:  .eabi_attribute 17, 1
1128; CORTEX-M7-NOT:   .eabi_attribute 19
1129;; We default to IEEE 754 compliance
1130; CORTEX-M7:  .eabi_attribute 20, 1
1131; CORTEX-M7:  .eabi_attribute 21, 1
1132; CORTEX-M7-NOT:  .eabi_attribute 22
1133; CORTEX-M7:  .eabi_attribute 23, 3
1134; CORTEX-M7:  .eabi_attribute 24, 1
1135; CORTEX-M7:  .eabi_attribute 25, 1
1136; CORTEX-M7-SOFT-NOT: .eabi_attribute 27
1137; CORTEX-M7-SINGLE:  .eabi_attribute 27, 1
1138; CORTEX-M7-DOUBLE-NOT: .eabi_attribute 27
1139; CORTEX-M7:  .eabi_attribute 36, 1
1140; CORTEX-M7:  .eabi_attribute 38, 1
1141; CORTEX-M7-NOT:  .eabi_attribute 44
1142; CORTEX-M7:  .eabi_attribute 14, 0
1143
1144; CORTEX-M7-NOFPU-FAST-NOT:   .eabi_attribute 19
1145;; The M7 has the ARMv8 FP unit, which always flushes preserving sign.
1146; CORTEX-M7-FAST:  .eabi_attribute 20, 2
1147;; Despite there being no FPU, we chose to flush to zero preserving
1148;; sign. This matches what the hardware would do for this architecture
1149;; revision.
1150; CORTEX-M7-NOFPU-FAST: .eabi_attribute 20, 2
1151; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 21
1152; CORTEX-M7-NOFPU-FAST-NOT:  .eabi_attribute 22
1153; CORTEX-M7-NOFPU-FAST:  .eabi_attribute 23, 1
1154
1155; CORTEX-R4:  .cpu cortex-r4
1156; CORTEX-R4:  .eabi_attribute 6, 10
1157; CORTEX-R4:  .eabi_attribute 7, 82
1158; CORTEX-R4:  .eabi_attribute 8, 1
1159; CORTEX-R4:  .eabi_attribute 9, 2
1160; CORTEX-R4-NOT:  .fpu vfpv3-d16
1161; CORTEX-R4-NOT:   .eabi_attribute 19
1162;; We default to IEEE 754 compliance
1163; CORTEX-R4:  .eabi_attribute 20, 1
1164; CORTEX-R4:  .eabi_attribute 21, 1
1165; CORTEX-R4-NOT:  .eabi_attribute 22
1166; CORTEX-R4:  .eabi_attribute 23, 3
1167; CORTEX-R4:  .eabi_attribute 24, 1
1168; CORTEX-R4:  .eabi_attribute 25, 1
1169; CORTEX-R4-NOT:  .eabi_attribute 28
1170; CORTEX-R4-NOT:  .eabi_attribute 36
1171; CORTEX-R4:  .eabi_attribute 38, 1
1172; CORTEX-R4-NOT:  .eabi_attribute 42
1173; CORTEX-R4-NOT:  .eabi_attribute 44
1174; CORTEX-R4-NOT:  .eabi_attribute 68
1175
1176; CORTEX-R4F:  .cpu cortex-r4f
1177; CORTEX-R4F:  .eabi_attribute 6, 10
1178; CORTEX-R4F:  .eabi_attribute 7, 82
1179; CORTEX-R4F:  .eabi_attribute 8, 1
1180; CORTEX-R4F:  .eabi_attribute 9, 2
1181; CORTEX-R4F:  .fpu vfpv3-d16
1182; CORTEX-R4F-NOT:   .eabi_attribute 19
1183;; We default to IEEE 754 compliance
1184; CORTEX-R4F:  .eabi_attribute 20, 1
1185; CORTEX-R4F:  .eabi_attribute 21, 1
1186; CORTEX-R4F-NOT:  .eabi_attribute 22
1187; CORTEX-R4F:  .eabi_attribute 23, 3
1188; CORTEX-R4F:  .eabi_attribute 24, 1
1189; CORTEX-R4F:  .eabi_attribute 25, 1
1190; CORTEX-R4F-NOT:  .eabi_attribute 27, 1
1191; CORTEX-R4F-NOT:  .eabi_attribute 28
1192; CORTEX-R4F-NOT:  .eabi_attribute 36
1193; CORTEX-R4F:  .eabi_attribute 38, 1
1194; CORTEX-R4F-NOT:  .eabi_attribute 42
1195; CORTEX-R4F-NOT:  .eabi_attribute 44
1196; CORTEX-R4F-NOT:  .eabi_attribute 68
1197
1198; CORTEX-R5:  .cpu cortex-r5
1199; CORTEX-R5:  .eabi_attribute 6, 10
1200; CORTEX-R5:  .eabi_attribute 7, 82
1201; CORTEX-R5:  .eabi_attribute 8, 1
1202; CORTEX-R5:  .eabi_attribute 9, 2
1203; CORTEX-R5:  .fpu vfpv3-d16
1204; CORTEX-R5-NOT:   .eabi_attribute 19
1205;; We default to IEEE 754 compliance
1206; CORTEX-R5:  .eabi_attribute 20, 1
1207; CORTEX-R5:  .eabi_attribute 21, 1
1208; CORTEX-R5-NOT:  .eabi_attribute 22
1209; CORTEX-R5:  .eabi_attribute 23, 3
1210; CORTEX-R5:  .eabi_attribute 24, 1
1211; CORTEX-R5:  .eabi_attribute 25, 1
1212; CORTEX-R5-NOT:  .eabi_attribute 27, 1
1213; CORTEX-R5-NOT:  .eabi_attribute 28
1214; CORTEX-R5-NOT:  .eabi_attribute 36
1215; CORTEX-R5:  .eabi_attribute 38, 1
1216; CORTEX-R5-NOT:  .eabi_attribute 42
1217; CORTEX-R5:  .eabi_attribute 44, 2
1218; CORTEX-R5-NOT:  .eabi_attribute 68
1219
1220; CORTEX-R5-FAST-NOT:   .eabi_attribute 19
1221;; The R5 has the VFPv3 FP unit, which always flushes preserving sign.
1222; CORTEX-R5-FAST:  .eabi_attribute 20, 2
1223; CORTEX-R5-FAST-NOT:  .eabi_attribute 21
1224; CORTEX-R5-FAST-NOT:  .eabi_attribute 22
1225; CORTEX-R5-FAST:  .eabi_attribute 23, 1
1226
1227; CORTEX-R7:  .cpu cortex-r7
1228; CORTEX-R7:  .eabi_attribute 6, 10
1229; CORTEX-R7:  .eabi_attribute 7, 82
1230; CORTEX-R7:  .eabi_attribute 8, 1
1231; CORTEX-R7:  .eabi_attribute 9, 2
1232; CORTEX-R7:  .fpu vfpv3-d16-fp16
1233; CORTEX-R7-NOT:   .eabi_attribute 19
1234;; We default to IEEE 754 compliance
1235; CORTEX-R7:  .eabi_attribute 20, 1
1236; CORTEX-R7:  .eabi_attribute 21, 1
1237; CORTEX-R7-NOT:  .eabi_attribute 22
1238; CORTEX-R7:  .eabi_attribute 23, 3
1239; CORTEX-R7:  .eabi_attribute 24, 1
1240; CORTEX-R7:  .eabi_attribute 25, 1
1241; CORTEX-R7-NOT:  .eabi_attribute 28
1242; CORTEX-R7:  .eabi_attribute 36, 1
1243; CORTEX-R7:  .eabi_attribute 38, 1
1244; CORTEX-R7:  .eabi_attribute 42, 1
1245; CORTEX-R7:  .eabi_attribute 44, 2
1246; CORTEX-R7-NOT:  .eabi_attribute 68
1247
1248; CORTEX-R7-FAST-NOT:   .eabi_attribute 19
1249;; The R7 has the VFPv3 FP unit, which always flushes preserving sign.
1250; CORTEX-R7-FAST:  .eabi_attribute 20, 2
1251; CORTEX-R7-FAST-NOT:  .eabi_attribute 21
1252; CORTEX-R7-FAST-NOT:  .eabi_attribute 22
1253; CORTEX-R7-FAST:  .eabi_attribute 23, 1
1254
1255; CORTEX-R8:  .cpu cortex-r8
1256; CORTEX-R8:  .eabi_attribute 6, 10
1257; CORTEX-R8:  .eabi_attribute 7, 82
1258; CORTEX-R8:  .eabi_attribute 8, 1
1259; CORTEX-R8:  .eabi_attribute 9, 2
1260; CORTEX-R8:  .fpu vfpv3-d16-fp16
1261; CORTEX-R8-NOT:   .eabi_attribute 19
1262;; We default to IEEE 754 compliance
1263; CORTEX-R8:  .eabi_attribute 20, 1
1264; CORTEX-R8:  .eabi_attribute 21, 1
1265; CORTEX-R8-NOT:  .eabi_attribute 22
1266; CORTEX-R8:  .eabi_attribute 23, 3
1267; CORTEX-R8:  .eabi_attribute 24, 1
1268; CORTEX-R8:  .eabi_attribute 25, 1
1269; CORTEX-R8-NOT:  .eabi_attribute 28
1270; CORTEX-R8:  .eabi_attribute 36, 1
1271; CORTEX-R8:  .eabi_attribute 38, 1
1272; CORTEX-R8:  .eabi_attribute 42, 1
1273; CORTEX-R8:  .eabi_attribute 44, 2
1274; CORTEX-R8-NOT:  .eabi_attribute 68
1275
1276; CORTEX-R8-FAST-NOT:   .eabi_attribute 19
1277;; The R8 has the VFPv3 FP unit, which always flushes preserving sign.
1278; CORTEX-R8-FAST:  .eabi_attribute 20, 2
1279; CORTEX-R8-FAST-NOT:  .eabi_attribute 21
1280; CORTEX-R8-FAST-NOT:  .eabi_attribute 22
1281; CORTEX-R8-FAST:  .eabi_attribute 23, 1
1282
1283; CORTEX-A32:  .cpu cortex-a32
1284; CORTEX-A32:  .eabi_attribute 6, 14
1285; CORTEX-A32:  .eabi_attribute 7, 65
1286; CORTEX-A32:  .eabi_attribute 8, 1
1287; CORTEX-A32:  .eabi_attribute 9, 2
1288; CORTEX-A32:  .fpu crypto-neon-fp-armv8
1289; CORTEX-A32:  .eabi_attribute 12, 3
1290; CORTEX-A32-NOT:   .eabi_attribute 19
1291;; We default to IEEE 754 compliance
1292; CORTEX-A32:  .eabi_attribute 20, 1
1293; CORTEX-A32:  .eabi_attribute 21, 1
1294; CORTEX-A32-NOT:  .eabi_attribute 22
1295; CORTEX-A32:  .eabi_attribute 23, 3
1296; CORTEX-A32:  .eabi_attribute 24, 1
1297; CORTEX-A32:  .eabi_attribute 25, 1
1298; CORTEX-A32-NOT:  .eabi_attribute 27
1299; CORTEX-A32-NOT:  .eabi_attribute 28
1300; CORTEX-A32:  .eabi_attribute 36, 1
1301; CORTEX-A32:  .eabi_attribute 38, 1
1302; CORTEX-A32:  .eabi_attribute 42, 1
1303; CORTEX-A32-NOT:  .eabi_attribute 44
1304; CORTEX-A32:  .eabi_attribute 68, 3
1305
1306; CORTEX-A32-FAST-NOT:   .eabi_attribute 19
1307;; The A32 has the ARMv8 FP unit, which always flushes preserving sign.
1308; CORTEX-A32-FAST:  .eabi_attribute 20, 2
1309; CORTEX-A32-FAST-NOT:  .eabi_attribute 21
1310; CORTEX-A32-FAST-NOT:  .eabi_attribute 22
1311; CORTEX-A32-FAST:  .eabi_attribute 23, 1
1312
1313; CORTEX-A35:  .cpu cortex-a35
1314; CORTEX-A35:  .eabi_attribute 6, 14
1315; CORTEX-A35:  .eabi_attribute 7, 65
1316; CORTEX-A35:  .eabi_attribute 8, 1
1317; CORTEX-A35:  .eabi_attribute 9, 2
1318; CORTEX-A35:  .fpu crypto-neon-fp-armv8
1319; CORTEX-A35:  .eabi_attribute 12, 3
1320; CORTEX-A35-NOT:   .eabi_attribute 19
1321;; We default to IEEE 754 compliance
1322; CORTEX-A35:  .eabi_attribute 20, 1
1323; CORTEX-A35:  .eabi_attribute 21, 1
1324; CORTEX-A35-NOT:  .eabi_attribute 22
1325; CORTEX-A35:  .eabi_attribute 23, 3
1326; CORTEX-A35:  .eabi_attribute 24, 1
1327; CORTEX-A35:  .eabi_attribute 25, 1
1328; CORTEX-A35-NOT:  .eabi_attribute 27
1329; CORTEX-A35-NOT:  .eabi_attribute 28
1330; CORTEX-A35:  .eabi_attribute 36, 1
1331; CORTEX-A35:  .eabi_attribute 38, 1
1332; CORTEX-A35:  .eabi_attribute 42, 1
1333; CORTEX-A35-NOT:  .eabi_attribute 44
1334; CORTEX-A35:  .eabi_attribute 68, 3
1335
1336; CORTEX-A35-FAST-NOT:   .eabi_attribute 19
1337;; The A35 has the ARMv8 FP unit, which always flushes preserving sign.
1338; CORTEX-A35-FAST:  .eabi_attribute 20, 2
1339; CORTEX-A35-FAST-NOT:  .eabi_attribute 21
1340; CORTEX-A35-FAST-NOT:  .eabi_attribute 22
1341; CORTEX-A35-FAST:  .eabi_attribute 23, 1
1342
1343; CORTEX-A53:  .cpu cortex-a53
1344; CORTEX-A53:  .eabi_attribute 6, 14
1345; CORTEX-A53:  .eabi_attribute 7, 65
1346; CORTEX-A53:  .eabi_attribute 8, 1
1347; CORTEX-A53:  .eabi_attribute 9, 2
1348; CORTEX-A53:  .fpu crypto-neon-fp-armv8
1349; CORTEX-A53:  .eabi_attribute 12, 3
1350; CORTEX-A53-NOT:   .eabi_attribute 19
1351;; We default to IEEE 754 compliance
1352; CORTEX-A53:  .eabi_attribute 20, 1
1353; CORTEX-A53:  .eabi_attribute 21, 1
1354; CORTEX-A53-NOT:  .eabi_attribute 22
1355; CORTEX-A53:  .eabi_attribute 23, 3
1356; CORTEX-A53:  .eabi_attribute 24, 1
1357; CORTEX-A53:  .eabi_attribute 25, 1
1358; CORTEX-A53-NOT:  .eabi_attribute 27
1359; CORTEX-A53-NOT:  .eabi_attribute 28
1360; CORTEX-A53:  .eabi_attribute 36, 1
1361; CORTEX-A53:  .eabi_attribute 38, 1
1362; CORTEX-A53:  .eabi_attribute 42, 1
1363; CORTEX-A53-NOT:  .eabi_attribute 44
1364; CORTEX-A53:  .eabi_attribute 68, 3
1365
1366; CORTEX-A53-FAST-NOT:   .eabi_attribute 19
1367;; The A53 has the ARMv8 FP unit, which always flushes preserving sign.
1368; CORTEX-A53-FAST:  .eabi_attribute 20, 2
1369; CORTEX-A53-FAST-NOT:  .eabi_attribute 21
1370; CORTEX-A53-FAST-NOT:  .eabi_attribute 22
1371; CORTEX-A53-FAST:  .eabi_attribute 23, 1
1372
1373; CORTEX-A57:  .cpu cortex-a57
1374; CORTEX-A57:  .eabi_attribute 6, 14
1375; CORTEX-A57:  .eabi_attribute 7, 65
1376; CORTEX-A57:  .eabi_attribute 8, 1
1377; CORTEX-A57:  .eabi_attribute 9, 2
1378; CORTEX-A57:  .fpu crypto-neon-fp-armv8
1379; CORTEX-A57:  .eabi_attribute 12, 3
1380; CORTEX-A57-NOT:   .eabi_attribute 19
1381;; We default to IEEE 754 compliance
1382; CORTEX-A57:  .eabi_attribute 20, 1
1383; CORTEX-A57:  .eabi_attribute 21, 1
1384; CORTEX-A57-NOT:  .eabi_attribute 22
1385; CORTEX-A57:  .eabi_attribute 23, 3
1386; CORTEX-A57:  .eabi_attribute 24, 1
1387; CORTEX-A57:  .eabi_attribute 25, 1
1388; CORTEX-A57-NOT:  .eabi_attribute 27
1389; CORTEX-A57-NOT:  .eabi_attribute 28
1390; CORTEX-A57:  .eabi_attribute 36, 1
1391; CORTEX-A57:  .eabi_attribute 38, 1
1392; CORTEX-A57:  .eabi_attribute 42, 1
1393; CORTEX-A57-NOT:  .eabi_attribute 44
1394; CORTEX-A57:  .eabi_attribute 68, 3
1395
1396; CORTEX-A57-FAST-NOT:   .eabi_attribute 19
1397;; The A57 has the ARMv8 FP unit, which always flushes preserving sign.
1398; CORTEX-A57-FAST:  .eabi_attribute 20, 2
1399; CORTEX-A57-FAST-NOT:  .eabi_attribute 21
1400; CORTEX-A57-FAST-NOT:  .eabi_attribute 22
1401; CORTEX-A57-FAST:  .eabi_attribute 23, 1
1402
1403; CORTEX-A72:  .cpu cortex-a72
1404; CORTEX-A72:  .eabi_attribute 6, 14
1405; CORTEX-A72:  .eabi_attribute 7, 65
1406; CORTEX-A72:  .eabi_attribute 8, 1
1407; CORTEX-A72:  .eabi_attribute 9, 2
1408; CORTEX-A72:  .fpu crypto-neon-fp-armv8
1409; CORTEX-A72:  .eabi_attribute 12, 3
1410; CORTEX-A72-NOT:   .eabi_attribute 19
1411;; We default to IEEE 754 compliance
1412; CORTEX-A72:  .eabi_attribute 20, 1
1413; CORTEX-A72:  .eabi_attribute 21, 1
1414; CORTEX-A72-NOT:  .eabi_attribute 22
1415; CORTEX-A72:  .eabi_attribute 23, 3
1416; CORTEX-A72:  .eabi_attribute 24, 1
1417; CORTEX-A72:  .eabi_attribute 25, 1
1418; CORTEX-A72-NOT:  .eabi_attribute 27
1419; CORTEX-A72-NOT:  .eabi_attribute 28
1420; CORTEX-A72:  .eabi_attribute 36, 1
1421; CORTEX-A72:  .eabi_attribute 38, 1
1422; CORTEX-A72:  .eabi_attribute 42, 1
1423; CORTEX-A72-NOT:  .eabi_attribute 44
1424; CORTEX-A72:  .eabi_attribute 68, 3
1425
1426; CORTEX-A72-FAST-NOT:   .eabi_attribute 19
1427;; The A72 has the ARMv8 FP unit, which always flushes preserving sign.
1428; CORTEX-A72-FAST:  .eabi_attribute 20, 2
1429; CORTEX-A72-FAST-NOT:  .eabi_attribute 21
1430; CORTEX-A72-FAST-NOT:  .eabi_attribute 22
1431; CORTEX-A72-FAST:  .eabi_attribute 23, 1
1432
1433; CORTEX-A73:  .cpu cortex-a73
1434; CORTEX-A73:  .eabi_attribute 6, 14
1435; CORTEX-A73:  .eabi_attribute 7, 65
1436; CORTEX-A73:  .eabi_attribute 8, 1
1437; CORTEX-A73:  .eabi_attribute 9, 2
1438; CORTEX-A73:  .fpu  crypto-neon-fp-armv8
1439; CORTEX-A73:  .eabi_attribute 12, 3
1440; CORTEX-A73-NOT: .eabi_attribute 19
1441;; We default to IEEE 754 compliance
1442; CORTEX-A73:  .eabi_attribute 20, 1
1443; CORTEX-A73:  .eabi_attribute 21, 1
1444; CORTEX-A73-NOT:  .eabi_attribute 22
1445; CORTEX-A73:  .eabi_attribute 23, 3
1446; CORTEX-A73:  .eabi_attribute 24, 1
1447; CORTEX-A73:  .eabi_attribute 25, 1
1448; CORTEX-A73-NOT: .eabi_attribute 27
1449; CORTEX-A73-NOT: .eabi_attribute 28
1450; CORTEX-A73:  .eabi_attribute 36, 1
1451; CORTEX-A73:  .eabi_attribute 38, 1
1452; CORTEX-A73:  .eabi_attribute 42, 1
1453; CORTEX-A73-NOT: .eabi_attribute 44
1454; CORTEX-A73:  .eabi_attribute 14, 0
1455; CORTEX-A73:  .eabi_attribute 68, 3
1456
1457; EXYNOS-M1:  .cpu exynos-m1
1458; EXYNOS-M1:  .eabi_attribute 6, 14
1459; EXYNOS-M1:  .eabi_attribute 7, 65
1460; EXYNOS-M1:  .eabi_attribute 8, 1
1461; EXYNOS-M1:  .eabi_attribute 9, 2
1462; EXYNOS-M1:  .fpu crypto-neon-fp-armv8
1463; EXYNOS-M1:  .eabi_attribute 12, 3
1464; EXYNOS-M1-NOT:   .eabi_attribute 19
1465;; We default to IEEE 754 compliance
1466; EXYNOS-M1:  .eabi_attribute 20, 1
1467; EXYNOS-M1:  .eabi_attribute 21, 1
1468; EXYNOS-M1-NOT:  .eabi_attribute 22
1469; EXYNOS-M1:  .eabi_attribute 23, 3
1470; EXYNOS-M1:  .eabi_attribute 24, 1
1471; EXYNOS-M1:  .eabi_attribute 25, 1
1472; EXYNOS-M1-NOT:  .eabi_attribute 27
1473; EXYNOS-M1-NOT:  .eabi_attribute 28
1474; EXYNOS-M1:  .eabi_attribute 36, 1
1475; EXYNOS-M1:  .eabi_attribute 38, 1
1476; EXYNOS-M1:  .eabi_attribute 42, 1
1477; EXYNOS-M1-NOT:  .eabi_attribute 44
1478; EXYNOS-M1:  .eabi_attribute 68, 3
1479
1480; EXYNOS-M1-FAST-NOT:   .eabi_attribute 19
1481;; The exynos-m1 has the ARMv8 FP unit, which always flushes preserving sign.
1482; EXYNOS-M1-FAST:  .eabi_attribute 20, 2
1483; EXYNOS-M1-FAST-NOT:  .eabi_attribute 21
1484; EXYNOS-M1-FAST-NOT:  .eabi_attribute 22
1485; EXYNOS-M1-FAST:  .eabi_attribute 23, 1
1486
1487; EXYNOS-M2:  .cpu exynos-m2
1488; EXYNOS-M2:  .eabi_attribute 6, 14
1489; EXYNOS-M2:  .eabi_attribute 7, 65
1490; EXYNOS-M2:  .eabi_attribute 8, 1
1491; EXYNOS-M2:  .eabi_attribute 9, 2
1492; EXYNOS-M2:  .fpu crypto-neon-fp-armv8
1493; EXYNOS-M2:  .eabi_attribute 12, 3
1494; EXYNOS-M2-NOT:   .eabi_attribute 19
1495;; We default to IEEE 754 compliance
1496; EXYNOS-M2:  .eabi_attribute 20, 1
1497; EXYNOS-M2:  .eabi_attribute 21, 1
1498; EXYNOS-M2-NOT:  .eabi_attribute 22
1499; EXYNOS-M2:  .eabi_attribute 23, 3
1500; EXYNOS-M2:  .eabi_attribute 24, 1
1501; EXYNOS-M2:  .eabi_attribute 25, 1
1502; EXYNOS-M2-NOT:  .eabi_attribute 27
1503; EXYNOS-M2-NOT:  .eabi_attribute 28
1504; EXYNOS-M2:  .eabi_attribute 36, 1
1505; EXYNOS-M2:  .eabi_attribute 38, 1
1506; EXYNOS-M2:  .eabi_attribute 42, 1
1507; EXYNOS-M2-NOT:  .eabi_attribute 44
1508; EXYNOS-M2:  .eabi_attribute 68, 3
1509
1510; EXYNOS-M3:  .cpu exynos-m3
1511; EXYNOS-M3:  .eabi_attribute 6, 14
1512; EXYNOS-M3:  .eabi_attribute 7, 65
1513; EXYNOS-M3:  .eabi_attribute 8, 1
1514; EXYNOS-M3:  .eabi_attribute 9, 2
1515; EXYNOS-M3:  .fpu crypto-neon-fp-armv8
1516; EXYNOS-M3:  .eabi_attribute 12, 3
1517; EXYNOS-M3-NOT:   .eabi_attribute 19
1518;; We default to IEEE 754 compliance
1519; EXYNOS-M3:  .eabi_attribute 20, 1
1520; EXYNOS-M3:  .eabi_attribute 21, 1
1521; EXYNOS-M3-NOT:  .eabi_attribute 22
1522; EXYNOS-M3:  .eabi_attribute 23, 3
1523; EXYNOS-M3:  .eabi_attribute 24, 1
1524; EXYNOS-M3:  .eabi_attribute 25, 1
1525; EXYNOS-M3-NOT:  .eabi_attribute 27
1526; EXYNOS-M3-NOT:  .eabi_attribute 28
1527; EXYNOS-M3:  .eabi_attribute 36, 1
1528; EXYNOS-M3:  .eabi_attribute 38, 1
1529; EXYNOS-M3:  .eabi_attribute 42, 1
1530; EXYNOS-M3-NOT:  .eabi_attribute 44
1531; EXYNOS-M3:  .eabi_attribute 68, 3
1532
1533; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
1534; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
1535; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
1536; GENERIC-FPU-VFPV3XD-FP16: .fpu vfpv3xd-fp16
1537; GENERIC-FPU-NEON-FP16: .fpu neon-fp16
1538
1539; GENERIC-ARMV8_1-A:  .eabi_attribute 6, 14
1540; GENERIC-ARMV8_1-A:  .eabi_attribute 7, 65
1541; GENERIC-ARMV8_1-A:  .eabi_attribute 8, 1
1542; GENERIC-ARMV8_1-A:  .eabi_attribute 9, 2
1543; GENERIC-ARMV8_1-A:  .fpu crypto-neon-fp-armv8
1544; GENERIC-ARMV8_1-A:  .eabi_attribute 12, 4
1545; GENERIC-ARMV8_1-A-NOT:   .eabi_attribute 19
1546;; We default to IEEE 754 compliance
1547; GENERIC-ARMV8_1-A:  .eabi_attribute 20, 1
1548; GENERIC-ARMV8_1-A:  .eabi_attribute 21, 1
1549; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 22
1550; GENERIC-ARMV8_1-A:  .eabi_attribute 23, 3
1551; GENERIC-ARMV8_1-A:  .eabi_attribute 24, 1
1552; GENERIC-ARMV8_1-A:  .eabi_attribute 25, 1
1553; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 27
1554; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 28
1555; GENERIC-ARMV8_1-A:  .eabi_attribute 36, 1
1556; GENERIC-ARMV8_1-A:  .eabi_attribute 38, 1
1557; GENERIC-ARMV8_1-A:  .eabi_attribute 42, 1
1558; GENERIC-ARMV8_1-A-NOT:  .eabi_attribute 44
1559; GENERIC-ARMV8_1-A:  .eabi_attribute 68, 3
1560
1561; GENERIC-ARMV8_1-A-FAST-NOT:   .eabi_attribute 19
1562;; GENERIC-ARMV8_1-A has the ARMv8 FP unit, which always flushes preserving sign.
1563; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 20, 2
1564; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 21
1565; GENERIC-ARMV8_1-A-FAST-NOT:  .eabi_attribute 22
1566; GENERIC-ARMV8_1-A-FAST:  .eabi_attribute 23, 1
1567
1568; RELOC-PIC:  .eabi_attribute 15, 1
1569; RELOC-PIC:  .eabi_attribute 16, 1
1570; RELOC-PIC:  .eabi_attribute 17, 2
1571; RELOC-OTHER:  .eabi_attribute 17, 1
1572; RELOC-ROPI-NOT:  .eabi_attribute 15,
1573; RELOC-ROPI:      .eabi_attribute 16, 1
1574; RELOC-ROPI:      .eabi_attribute 17, 1
1575; RELOC-RWPI:      .eabi_attribute 15, 2
1576; RELOC-RWPI-NOT:  .eabi_attribute 16,
1577; RELOC-RWPI:      .eabi_attribute 17, 1
1578; RELOC-ROPI-RWPI: .eabi_attribute 15, 2
1579; RELOC-ROPI-RWPI: .eabi_attribute 16, 1
1580; RELOC-ROPI-RWPI:  .eabi_attribute 17, 1
1581
1582; PCS-R9-USE:  .eabi_attribute 14, 0
1583; PCS-R9-RESERVE:  .eabi_attribute 14, 3
1584
1585; ARMv8R: .eabi_attribute 67, "2.09"      @ Tag_conformance
1586; ARMv8R: .eabi_attribute 6, 15   @ Tag_CPU_arch
1587; ARMv8R: .eabi_attribute 7, 82   @ Tag_CPU_arch_profile
1588; ARMv8R: .eabi_attribute 8, 1    @ Tag_ARM_ISA_use
1589; ARMv8R: .eabi_attribute 9, 2    @ Tag_THUMB_ISA_use
1590; ARMv8R-NOFPU-NOT: .fpu
1591; ARMv8R-NOFPU-NOT: .eabi_attribute 12
1592; ARMv8R-SP: .fpu fpv5-sp-d16
1593; ARMv8R-SP-NOT: .eabi_attribute 12
1594; ARMv8R-NEON: .fpu    neon-fp-armv8
1595; ARMv8R-NEON: .eabi_attribute 12, 3   @ Tag_Advanced_SIMD_arch
1596; ARMv8R: .eabi_attribute 17, 1   @ Tag_ABI_PCS_GOT_use
1597; ARMv8R: .eabi_attribute 20, 1   @ Tag_ABI_FP_denormal
1598; ARMv8R: .eabi_attribute 21, 1   @ Tag_ABI_FP_exceptions
1599; ARMv8R: .eabi_attribute 23, 3   @ Tag_ABI_FP_number_model
1600; ARMv8R: .eabi_attribute 34, 1   @ Tag_CPU_unaligned_access
1601; ARMv8R: .eabi_attribute 24, 1   @ Tag_ABI_align_needed
1602; ARMv8R: .eabi_attribute 25, 1   @ Tag_ABI_align_preserved
1603; ARMv8R-NOFPU-NOT: .eabi_attribute 27
1604; ARMv8R-SP: .eabi_attribute 27, 1   @ Tag_ABI_HardFP_use
1605; ARMv8R-NEON-NOT: .eabi_attribute 27
1606; ARMv8R-NOFPU-NOT: .eabi_attribute 36
1607; ARMv8R-SP: .eabi_attribute 36, 1   @ Tag_FP_HP_extension
1608; ARMv8R-NEON: .eabi_attribute 36, 1   @ Tag_FP_HP_extension
1609; ARMv8R: .eabi_attribute 38, 1   @ Tag_ABI_FP_16bit_format
1610; ARMv8R: .eabi_attribute 42, 1   @ Tag_MPextension_use
1611; ARMv8R: .eabi_attribute 14, 0   @ Tag_ABI_PCS_R9_use
1612; ARMv8R: .eabi_attribute 68, 2   @ Tag_Virtualization_use
1613
1614define i32 @f(i64 %z) {
1615    ret i32 0
1616}
1617