1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple thumbv6m-none-eabi -o - %s | FileCheck %s --check-prefix=CHECK-V6M
3; RUN: llc -mtriple thumbv7m-none-eabi -o - %s | FileCheck %s --check-prefix=CHECK-V7M
4; RUN: llc -mtriple thumbv8.1m.main-none-eabi -mattr=+mve,+lob -o - %s | FileCheck %s --check-prefix=CHECK-V81M
5; RUN: llc -mtriple armv7a-none-eabi -o - %s | FileCheck %s --check-prefix=CHECK-V7A
6
7define i32 @test_lshr(i32* nocapture %x, i32* nocapture readonly %y, i32 %n) {
8; CHECK-V6M-LABEL: test_lshr:
9; CHECK-V6M:       @ %bb.0: @ %entry
10; CHECK-V6M-NEXT:    lsrs r2, r2, #2
11; CHECK-V6M-NEXT:    beq .LBB0_2
12; CHECK-V6M-NEXT:  .LBB0_1: @ %while.body
13; CHECK-V6M-NEXT:    @ =>This Inner Loop Header: Depth=1
14; CHECK-V6M-NEXT:    ldm r1!, {r3}
15; CHECK-V6M-NEXT:    lsls r3, r3, #1
16; CHECK-V6M-NEXT:    stm r0!, {r3}
17; CHECK-V6M-NEXT:    subs r2, r2, #1
18; CHECK-V6M-NEXT:    bne .LBB0_1
19; CHECK-V6M-NEXT:  .LBB0_2: @ %while.end
20; CHECK-V6M-NEXT:    movs r0, #0
21; CHECK-V6M-NEXT:    bx lr
22;
23; CHECK-V7M-LABEL: test_lshr:
24; CHECK-V7M:       @ %bb.0: @ %entry
25; CHECK-V7M-NEXT:    lsrs r2, r2, #2
26; CHECK-V7M-NEXT:    beq .LBB0_3
27; CHECK-V7M-NEXT:  @ %bb.1: @ %while.body.preheader
28; CHECK-V7M-NEXT:    subs r1, #4
29; CHECK-V7M-NEXT:    subs r0, #4
30; CHECK-V7M-NEXT:  .LBB0_2: @ %while.body
31; CHECK-V7M-NEXT:    @ =>This Inner Loop Header: Depth=1
32; CHECK-V7M-NEXT:    ldr r3, [r1, #4]!
33; CHECK-V7M-NEXT:    subs r2, #1
34; CHECK-V7M-NEXT:    lsl.w r3, r3, #1
35; CHECK-V7M-NEXT:    str r3, [r0, #4]!
36; CHECK-V7M-NEXT:    bne .LBB0_2
37; CHECK-V7M-NEXT:  .LBB0_3: @ %while.end
38; CHECK-V7M-NEXT:    movs r0, #0
39; CHECK-V7M-NEXT:    bx lr
40;
41; CHECK-V81M-LABEL: test_lshr:
42; CHECK-V81M:       @ %bb.0: @ %entry
43; CHECK-V81M-NEXT:    .save {r7, lr}
44; CHECK-V81M-NEXT:    push {r7, lr}
45; CHECK-V81M-NEXT:    lsrs r2, r2, #2
46; CHECK-V81M-NEXT:    wls lr, r2, .LBB0_2
47; CHECK-V81M-NEXT:  .LBB0_1: @ %while.body
48; CHECK-V81M-NEXT:    @ =>This Inner Loop Header: Depth=1
49; CHECK-V81M-NEXT:    ldr r2, [r1], #4
50; CHECK-V81M-NEXT:    lsls r2, r2, #1
51; CHECK-V81M-NEXT:    str r2, [r0], #4
52; CHECK-V81M-NEXT:    le lr, .LBB0_1
53; CHECK-V81M-NEXT:  .LBB0_2: @ %while.end
54; CHECK-V81M-NEXT:    movs r0, #0
55; CHECK-V81M-NEXT:    pop {r7, pc}
56;
57; CHECK-V7A-LABEL: test_lshr:
58; CHECK-V7A:       @ %bb.0: @ %entry
59; CHECK-V7A-NEXT:    mov r3, #0
60; CHECK-V7A-NEXT:    cmp r3, r2, lsr #2
61; CHECK-V7A-NEXT:    beq .LBB0_3
62; CHECK-V7A-NEXT:  @ %bb.1: @ %while.body.preheader
63; CHECK-V7A-NEXT:    lsr r2, r2, #2
64; CHECK-V7A-NEXT:  .LBB0_2: @ %while.body
65; CHECK-V7A-NEXT:    @ =>This Inner Loop Header: Depth=1
66; CHECK-V7A-NEXT:    ldr r3, [r1], #4
67; CHECK-V7A-NEXT:    subs r2, r2, #1
68; CHECK-V7A-NEXT:    lsl r3, r3, #1
69; CHECK-V7A-NEXT:    str r3, [r0], #4
70; CHECK-V7A-NEXT:    bne .LBB0_2
71; CHECK-V7A-NEXT:  .LBB0_3: @ %while.end
72; CHECK-V7A-NEXT:    mov r0, #0
73; CHECK-V7A-NEXT:    bx lr
74entry:
75  %shr = lshr i32 %n, 2
76  %tobool.not4 = icmp eq i32 %shr, 0
77  br i1 %tobool.not4, label %while.end, label %while.body
78
79while.body:                                       ; preds = %entry, %while.body
80  %c.07 = phi i32 [ %dec, %while.body ], [ %shr, %entry ]
81  %x.addr.06 = phi i32* [ %incdec.ptr1, %while.body ], [ %x, %entry ]
82  %y.addr.05 = phi i32* [ %incdec.ptr, %while.body ], [ %y, %entry ]
83  %incdec.ptr = getelementptr inbounds i32, i32* %y.addr.05, i32 1
84  %0 = load i32, i32* %y.addr.05, align 4
85  %mul = shl nsw i32 %0, 1
86  %incdec.ptr1 = getelementptr inbounds i32, i32* %x.addr.06, i32 1
87  store i32 %mul, i32* %x.addr.06, align 4
88  %dec = add nsw i32 %c.07, -1
89  %tobool.not = icmp eq i32 %dec, 0
90  br i1 %tobool.not, label %while.end, label %while.body
91
92while.end:                                        ; preds = %while.body, %entry
93  ret i32 0
94}
95
96define i32 @test_lshr2(i32* nocapture %x, i32* nocapture readonly %y, i32 %n) {
97; CHECK-V6M-LABEL: test_lshr2:
98; CHECK-V6M:       @ %bb.0: @ %entry
99; CHECK-V6M-NEXT:    lsrs r2, r2, #2
100; CHECK-V6M-NEXT:    beq .LBB1_2
101; CHECK-V6M-NEXT:  .LBB1_1: @ %while.body
102; CHECK-V6M-NEXT:    @ =>This Inner Loop Header: Depth=1
103; CHECK-V6M-NEXT:    ldm r1!, {r3}
104; CHECK-V6M-NEXT:    lsls r3, r3, #1
105; CHECK-V6M-NEXT:    stm r0!, {r3}
106; CHECK-V6M-NEXT:    subs r2, r2, #1
107; CHECK-V6M-NEXT:    bne .LBB1_1
108; CHECK-V6M-NEXT:  .LBB1_2: @ %while.end
109; CHECK-V6M-NEXT:    movs r0, #0
110; CHECK-V6M-NEXT:    bx lr
111;
112; CHECK-V7M-LABEL: test_lshr2:
113; CHECK-V7M:       @ %bb.0: @ %entry
114; CHECK-V7M-NEXT:    lsrs r2, r2, #2
115; CHECK-V7M-NEXT:    beq .LBB1_3
116; CHECK-V7M-NEXT:  @ %bb.1: @ %while.body.preheader
117; CHECK-V7M-NEXT:    subs r1, #4
118; CHECK-V7M-NEXT:    subs r0, #4
119; CHECK-V7M-NEXT:  .LBB1_2: @ %while.body
120; CHECK-V7M-NEXT:    @ =>This Inner Loop Header: Depth=1
121; CHECK-V7M-NEXT:    ldr r3, [r1, #4]!
122; CHECK-V7M-NEXT:    subs r2, #1
123; CHECK-V7M-NEXT:    lsl.w r3, r3, #1
124; CHECK-V7M-NEXT:    str r3, [r0, #4]!
125; CHECK-V7M-NEXT:    bne .LBB1_2
126; CHECK-V7M-NEXT:  .LBB1_3: @ %while.end
127; CHECK-V7M-NEXT:    movs r0, #0
128; CHECK-V7M-NEXT:    bx lr
129;
130; CHECK-V81M-LABEL: test_lshr2:
131; CHECK-V81M:       @ %bb.0: @ %entry
132; CHECK-V81M-NEXT:    .save {r7, lr}
133; CHECK-V81M-NEXT:    push {r7, lr}
134; CHECK-V81M-NEXT:    lsrs r2, r2, #2
135; CHECK-V81M-NEXT:    wls lr, r2, .LBB1_2
136; CHECK-V81M-NEXT:  .LBB1_1: @ %while.body
137; CHECK-V81M-NEXT:    @ =>This Inner Loop Header: Depth=1
138; CHECK-V81M-NEXT:    ldr r2, [r1], #4
139; CHECK-V81M-NEXT:    lsls r2, r2, #1
140; CHECK-V81M-NEXT:    str r2, [r0], #4
141; CHECK-V81M-NEXT:    le lr, .LBB1_1
142; CHECK-V81M-NEXT:  .LBB1_2: @ %while.end
143; CHECK-V81M-NEXT:    movs r0, #0
144; CHECK-V81M-NEXT:    pop {r7, pc}
145;
146; CHECK-V7A-LABEL: test_lshr2:
147; CHECK-V7A:       @ %bb.0: @ %entry
148; CHECK-V7A-NEXT:    mov r3, #0
149; CHECK-V7A-NEXT:    cmp r3, r2, lsr #2
150; CHECK-V7A-NEXT:    beq .LBB1_3
151; CHECK-V7A-NEXT:  @ %bb.1: @ %while.body.preheader
152; CHECK-V7A-NEXT:    lsr r2, r2, #2
153; CHECK-V7A-NEXT:  .LBB1_2: @ %while.body
154; CHECK-V7A-NEXT:    @ =>This Inner Loop Header: Depth=1
155; CHECK-V7A-NEXT:    ldr r3, [r1], #4
156; CHECK-V7A-NEXT:    subs r2, r2, #1
157; CHECK-V7A-NEXT:    lsl r3, r3, #1
158; CHECK-V7A-NEXT:    str r3, [r0], #4
159; CHECK-V7A-NEXT:    bne .LBB1_2
160; CHECK-V7A-NEXT:  .LBB1_3: @ %while.end
161; CHECK-V7A-NEXT:    mov r0, #0
162; CHECK-V7A-NEXT:    bx lr
163entry:
164  %tobool.not4 = icmp ult i32 %n, 4
165  br i1 %tobool.not4, label %while.end, label %while.body.preheader
166
167while.body.preheader:                             ; preds = %entry
168  %shr = lshr i32 %n, 2
169  br label %while.body
170
171while.body:                                       ; preds = %while.body.preheader, %while.body
172  %c.07 = phi i32 [ %dec, %while.body ], [ %shr, %while.body.preheader ]
173  %x.addr.06 = phi i32* [ %incdec.ptr1, %while.body ], [ %x, %while.body.preheader ]
174  %y.addr.05 = phi i32* [ %incdec.ptr, %while.body ], [ %y, %while.body.preheader ]
175  %incdec.ptr = getelementptr inbounds i32, i32* %y.addr.05, i32 1
176  %0 = load i32, i32* %y.addr.05, align 4
177  %mul = shl nsw i32 %0, 1
178  %incdec.ptr1 = getelementptr inbounds i32, i32* %x.addr.06, i32 1
179  store i32 %mul, i32* %x.addr.06, align 4
180  %dec = add nsw i32 %c.07, -1
181  %tobool.not = icmp eq i32 %dec, 0
182  br i1 %tobool.not, label %while.end, label %while.body
183
184while.end:                                        ; preds = %while.body, %entry
185  ret i32 0
186}
187
188