1; RUN: llc -relocation-model=static -mtriple=armv7a--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM_RO_ABS --check-prefix=ARM_RW_ABS 2; RUN: llc -relocation-model=ropi -mtriple=armv7a--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM_RO_PC --check-prefix=ARM_RW_ABS 3; RUN: llc -relocation-model=rwpi -mtriple=armv7a--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM_RO_ABS --check-prefix=ARM_RW_SB 4; RUN: llc -relocation-model=ropi-rwpi -mtriple=armv7a--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=ARM_RO_PC --check-prefix=ARM_RW_SB 5 6; RUN: llc -relocation-model=static -mtriple=thumbv7m--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=THUMB2_RO_ABS --check-prefix=THUMB2_RW_ABS 7; RUN: llc -relocation-model=ropi -mtriple=thumbv7m--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=THUMB2_RO_PC --check-prefix=THUMB2_RW_ABS 8; RUN: llc -relocation-model=rwpi -mtriple=thumbv7m--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=THUMB2_RO_ABS --check-prefix=THUMB2_RW_SB 9; RUN: llc -relocation-model=ropi-rwpi -mtriple=thumbv7m--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=THUMB2_RO_PC --check-prefix=THUMB2_RW_SB 10 11; RUN: llc -relocation-model=static -mtriple=thumbv6m--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=THUMB1_RO_ABS --check-prefix=THUMB1_RW_ABS 12; RUN: llc -relocation-model=ropi -mtriple=thumbv6m--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=THUMB1_RO_PC --check-prefix=THUMB1_RW_ABS 13; RUN: llc -relocation-model=rwpi -mtriple=thumbv6m--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=THUMB1_RO_ABS --check-prefix=THUMB1_RW_SB 14; RUN: llc -relocation-model=ropi-rwpi -mtriple=thumbv6m--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=THUMB1_RO_PC --check-prefix=THUMB1_RW_SB 15 16target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" 17 18@a = external global i32, align 4 19@b = external constant i32, align 4 20 21define i32 @read() { 22entry: 23 %0 = load i32, i32* @a, align 4 24 ret i32 %0 25; CHECK-LABEL: read: 26 27; ARM_RW_ABS: movw r[[REG:[0-9]]], :lower16:a 28; ARM_RW_ABS: movt r[[REG]], :upper16:a 29; ARM_RW_ABS: ldr r0, [r[[REG]]] 30 31; ARM_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 32; ARM_RW_SB: ldr r0, [r9, r[[REG]]] 33 34; THUMB2_RW_ABS: movw r[[REG:[0-9]]], :lower16:a 35; THUMB2_RW_ABS: movt r[[REG]], :upper16:a 36; THUMB2_RW_ABS: ldr r0, [r[[REG]]] 37 38; THUMB2_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 39; THUMB2_RW_SB: ldr.w r0, [r9, r[[REG]]] 40 41; THUMB1_RW_ABS: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 42; THUMB1_RW_ABS: ldr r0, [r[[REG]]] 43 44; THUMB1_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 45; THUMB1_RW_SB: mov r[[REG_SB:[0-9]+]], r9 46; THUMB1_RW_SB: ldr r0, [r[[REG_SB]], r[[REG]]] 47 48; CHECK: {{(bx lr|pop)}} 49 50; ARM_RW_SB: [[LCPI]] 51; ARM_RW_SB: .long a(sbrel) 52 53; THUMB2_RW_SB: [[LCPI]] 54; THUMB2_RW_SB: .long a(sbrel) 55 56; THUMB1_RW_ABS: [[LCPI]] 57; THUMB1_RW_ABS-NEXT: .long a 58 59; THUMB1_RW_SB: [[LCPI]] 60; THUMB1_RW_SB: .long a(sbrel) 61} 62 63define void @write(i32 %v) { 64entry: 65 store i32 %v, i32* @a, align 4 66 ret void 67; CHECK-LABEL: write: 68 69; ARM_RW_ABS: movw r[[REG:[0-9]]], :lower16:a 70; ARM_RW_ABS: movt r[[REG]], :upper16:a 71; ARM_RW_ABS: str r0, [r[[REG:[0-9]]]] 72 73; ARM_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 74; ARM_RW_SB: str r0, [r9, r[[REG]]] 75 76; THUMB2_RW_ABS: movw r[[REG:[0-9]]], :lower16:a 77; THUMB2_RW_ABS: movt r[[REG]], :upper16:a 78; THUMB2_RW_ABS: str r0, [r[[REG]]] 79 80; THUMB2_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 81; THUMB2_RW_SB: str.w r0, [r9, r[[REG]]] 82 83; THUMB1_RW_ABS: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 84; THUMB1_RW_ABS: str r0, [r[[REG]]] 85 86; THUMB1_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 87; THUMB1_RW_SB: mov r[[REG_SB:[0-9]+]], r9 88; THUMB1_RW_SB: str r0, [r[[REG_SB]], r[[REG]]] 89 90; CHECK: {{(bx lr|pop)}} 91 92; ARM_RW_SB: [[LCPI]] 93; ARM_RW_SB: .long a(sbrel) 94 95; THUMB2_RW_SB: [[LCPI]] 96; THUMB2_RW_SB: .long a(sbrel) 97 98; THUMB1_RW_ABS: [[LCPI]] 99; THUMB1_RW_ABS-NEXT: .long a 100 101; THUMB1_RW_SB: [[LCPI]] 102; THUMB1_RW_SB: .long a(sbrel) 103} 104 105define i32 @read_const() { 106entry: 107 %0 = load i32, i32* @b, align 4 108 ret i32 %0 109; CHECK-LABEL: read_const: 110 111; ARM_RO_ABS: movw r[[reg:[0-9]]], :lower16:b 112; ARM_RO_ABS: movt r[[reg]], :upper16:b 113; ARM_RO_ABS: ldr r0, [r[[reg]]] 114 115; ARM_RO_PC: movw r[[REG:[0-9]]], :lower16:(b-([[LPC:.LPC[0-9]+_[0-9]+]]+8)) 116; ARM_RO_PC: movt r[[REG]], :upper16:(b-([[LPC]]+8)) 117; ARM_RO_PC: [[LPC]]: 118; ARM_RO_PC-NEXT: ldr r0, [pc, r[[REG]]] 119 120; THUMB2_RO_ABS: movw r[[REG:[0-9]]], :lower16:b 121; THUMB2_RO_ABS: movt r[[REG]], :upper16:b 122; THUMB2_RO_ABS: ldr r0, [r[[REG]]] 123 124; THUMB2_RO_PC: movw r[[REG:[0-9]]], :lower16:(b-([[LPC:.LPC[0-9]+_[0-9]+]]+4)) 125; THUMB2_RO_PC: movt r[[REG]], :upper16:(b-([[LPC]]+4)) 126; THUMB2_RO_PC: [[LPC]]: 127; THUMB2_RO_PC-NEXT: add r[[REG]], pc 128; THUMB2_RO_PC: ldr r0, [r[[REG]]] 129 130; THUMB1_RO_ABS: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 131; THUMB1_RO_ABS: ldr r0, [r[[REG]]] 132 133; THUMB1_RO_PC: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 134; THUMB1_RO_PC: [[LPC:.LPC[0-9]+_[0-9]+]]: 135; THUMB1_RO_PC-NEXT: add r[[REG]], pc 136; THUMB1_RO_PC: ldr r0, [r[[REG]]] 137 138; CHECK: {{(bx lr|pop)}} 139 140; THUMB1_RO_ABS: [[LCPI]] 141; THUMB1_RO_ABS-NEXT: .long b 142 143; THUMB1_RO_PC: [[LCPI]] 144; THUMB1_RO_PC-NEXT: .long b-([[LPC]]+4) 145} 146 147define i32* @take_addr() { 148entry: 149 ret i32* @a 150; CHECK-LABEL: take_addr: 151 152; ARM_RW_ABS: movw r[[REG:[0-9]]], :lower16:a 153; ARM_RW_ABS: movt r[[REG]], :upper16:a 154 155; ARM_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 156; ARM_RW_SB: add r0, r9, r[[REG]] 157 158; THUMB2_RW_ABS: movw r[[REG:[0-9]]], :lower16:a 159; THUMB2_RW_ABS: movt r[[REG]], :upper16:a 160 161; THUMB2_RW_SB: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]] 162; THUMB2_RW_SB: add r0, r9 163 164; THUMB1_RW_ABS: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]] 165 166; THUMB1_RW_SB: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 167; THUMB1_RW_SB: mov r[[REG_SB:[0-9]+]], r9 168; THUMB1_RW_SB: adds r[[REG]], r[[REG_SB]], r[[REG]] 169 170; CHECK: {{(bx lr|pop)}} 171 172; ARM_RW_SB: [[LCPI]] 173; ARM_RW_SB: .long a(sbrel) 174 175; THUMB2_RW_SB: [[LCPI]] 176; THUMB2_RW_SB: .long a(sbrel) 177 178; THUMB1_RW_ABS: [[LCPI]] 179; THUMB1_RW_ABS-NEXT: .long a 180 181; THUMB1_RW_SB: [[LCPI]] 182; THUMB1_RW_SB: .long a(sbrel) 183} 184 185define i32* @take_addr_const() { 186entry: 187 ret i32* @b 188; CHECK-LABEL: take_addr_const: 189 190; ARM_RO_ABS: movw r[[REG:[0-9]]], :lower16:b 191; ARM_RO_ABS: movt r[[REG]], :upper16:b 192 193; ARM_RO_PC: movw r[[REG:[0-9]]], :lower16:(b-([[LPC:.LPC[0-9]+_[0-9]+]]+8)) 194; ARM_RO_PC: movt r[[REG]], :upper16:(b-([[LPC]]+8)) 195; ARM_RO_PC: [[LPC]]: 196; ARM_RO_PC-NEXT: add r0, pc, r[[REG:[0-9]]] 197 198; THUMB2_RO_ABS: movw r[[REG:[0-9]]], :lower16:b 199; THUMB2_RO_ABS: movt r[[REG]], :upper16:b 200 201; THUMB2_RO_PC: movw r0, :lower16:(b-([[LPC:.LPC[0-9]+_[0-9]+]]+4)) 202; THUMB2_RO_PC: movt r0, :upper16:(b-([[LPC]]+4)) 203; THUMB2_RO_PC: [[LPC]]: 204; THUMB2_RO_PC-NEXT: add r0, pc 205 206; THUMB1_RO_ABS: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]] 207 208; THUMB1_RO_PC: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 209; THUMB1_RO_PC: [[LPC:.LPC[0-9]+_[0-9]+]]: 210; THUMB1_RO_PC-NEXT: add r[[REG]], pc 211 212; CHECK: {{(bx lr|pop)}} 213 214; THUMB1_RO_ABS: [[LCPI]] 215; THUMB1_RO_ABS-NEXT: .long b 216 217; THUMB1_RO_PC: [[LCPI]] 218; THUMB1_RO_PC-NEXT: .long b-([[LPC]]+4) 219} 220 221define i8* @take_addr_func() { 222entry: 223 ret i8* bitcast (i8* ()* @take_addr_func to i8*) 224; CHECK-LABEL: take_addr_func: 225 226; ARM_RO_ABS: movw r[[REG:[0-9]]], :lower16:take_addr_func 227; ARM_RO_ABS: movt r[[REG]], :upper16:take_addr_func 228 229; ARM_RO_PC: movw r[[REG:[0-9]]], :lower16:(take_addr_func-([[LPC:.LPC[0-9]+_[0-9]+]]+8)) 230; ARM_RO_PC: movt r[[REG]], :upper16:(take_addr_func-([[LPC]]+8)) 231; ARM_RO_PC: [[LPC]]: 232; ARM_RO_PC-NEXT: add r0, pc, r[[REG:[0-9]]] 233 234; THUMB2_RO_ABS: movw r[[REG:[0-9]]], :lower16:take_addr_func 235; THUMB2_RO_ABS: movt r[[REG]], :upper16:take_addr_func 236 237; THUMB2_RO_PC: movw r0, :lower16:(take_addr_func-([[LPC:.LPC[0-9]+_[0-9]+]]+4)) 238; THUMB2_RO_PC: movt r0, :upper16:(take_addr_func-([[LPC]]+4)) 239; THUMB2_RO_PC: [[LPC]]: 240; THUMB2_RO_PC-NEXT: add r0, pc 241 242; THUMB1_RO_ABS: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]] 243 244; THUMB1_RO_PC: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 245; THUMB1_RO_PC: [[LPC:.LPC[0-9]+_[0-9]+]]: 246; THUMB1_RO_PC-NEXT: add r[[REG]], pc 247 248; CHECK: {{(bx lr|pop)}} 249 250; THUMB1_RO_ABS: [[LCPI]] 251; THUMB1_RO_ABS-NEXT: .long take_addr_func 252 253; THUMB1_RO_PC: [[LCPI]] 254; THUMB1_RO_PC-NEXT: .long take_addr_func-([[LPC]]+4) 255} 256 257define i8* @block_addr() { 258entry: 259 br label %lab1 260 261lab1: 262 ret i8* blockaddress(@block_addr, %lab1) 263 264; CHECK-LABEL: block_addr: 265 266; ARM_RO_ABS: [[LTMP:.Ltmp[0-9]+]]: 267; ARM_RO_ABS: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]] 268 269; ARM_RO_PC: [[LTMP:.Ltmp[0-9]+]]: 270; ARM_RO_PC: ldr r[[REG:[0-9]]], [[LCPI:.LCPI[0-9]+_[0-9]+]] 271; ARM_RO_PC: [[LPC:.LPC[0-9]+_[0-9]+]]: 272; ARM_RO_PC: add r0, pc, r[[REG]] 273 274; THUMB2_RO_ABS: [[LTMP:.Ltmp[0-9]+]]: 275; THUMB2_RO_ABS: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]] 276 277; THUMB2_RO_PC: [[LTMP:.Ltmp[0-9]+]]: 278; THUMB2_RO_PC: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]] 279; THUMB2_RO_PC: [[LPC:.LPC[0-9]+_[0-9]+]]: 280; THUMB2_RO_PC: add r0, pc 281 282; THUMB1_RO_ABS: [[LTMP:.Ltmp[0-9]+]]: 283; THUMB1_RO_ABS: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]] 284 285; THUMB1_RO_PC: [[LTMP:.Ltmp[0-9]+]]: 286; THUMB1_RO_PC: ldr r0, [[LCPI:.LCPI[0-9]+_[0-9]+]] 287; THUMB1_RO_PC: [[LPC:.LPC[0-9]+_[0-9]+]]: 288; THUMB1_RO_PC: add r0, pc 289 290; CHECK: bx lr 291 292; ARM_RO_ABS: [[LCPI]] 293; ARM_RO_ABS-NEXT: .long [[LTMP]] 294 295; ARM_RO_PC: [[LCPI]] 296; ARM_RO_PC-NEXT: .long [[LTMP]]-([[LPC]]+8) 297 298; THUMB2_RO_ABS: [[LCPI]] 299; THUMB2_RO_ABS-NEXT: .long [[LTMP]] 300 301; THUMB2_RO_PC: [[LCPI]] 302; THUMB2_RO_PC-NEXT: .long [[LTMP]]-([[LPC]]+4) 303 304; THUMB1_RO_ABS: [[LCPI]] 305; THUMB1_RO_ABS-NEXT: .long [[LTMP]] 306 307; THUMB1_RO_PC: [[LCPI]] 308; THUMB1_RO_PC-NEXT: .long [[LTMP]]-([[LPC]]+4) 309} 310