1; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-DIV
2
3; int f(int n, int d) {
4;   if (n / d)
5;     return 1;
6;   return 0;
7; }
8
9define arm_aapcs_vfpcc i32 @f(i32 %n, i32 %d) {
10entry:
11  %retval = alloca i32, align 4
12  %n.addr = alloca i32, align 4
13  %d.addr = alloca i32, align 4
14  store i32 %n, i32* %n.addr, align 4
15  store i32 %d, i32* %d.addr, align 4
16  %0 = load i32, i32* %n.addr, align 4
17  %1 = load i32, i32* %d.addr, align 4
18  %div = sdiv i32 %0, %1
19  %tobool = icmp ne i32 %div, 0
20  br i1 %tobool, label %if.then, label %if.end
21
22if.then:
23  store i32 1, i32* %retval, align 4
24  br label %return
25
26if.end:
27  store i32 0, i32* %retval, align 4
28  br label %return
29
30return:
31  %2 = load i32, i32* %retval, align 4
32  ret i32 %2
33}
34
35; CHECK-DIV-DAG: BB#0
36; CHECK-DIV-DAG: Successors according to CFG: BB#5({{.*}}) BB#4
37; CHECK-DIV-DAG: BB#1
38; CHECK-DIV-DAG: Successors according to CFG: BB#3
39; CHECK-DIV-DAG: BB#2
40; CHECK-DIV-DAG: Successors according to CFG: BB#3
41; CHECK-DIV-DAG: BB#3
42; CHECK-DIV-DAG: BB#4
43; CHECK-DIV-DAG: Successors according to CFG: BB#1({{.*}}) BB#2
44; CHECK-DIV-DAG: BB#5
45
46; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-MOD
47
48; int r;
49; int g(int l, int m) {
50;   if (m <= 0)
51;     return 0;
52;   return (r = l % m);
53; }
54
55@r = common global i32 0, align 4
56
57define arm_aapcs_vfpcc i32 @g(i32 %l, i32 %m) {
58entry:
59  %cmp = icmp eq i32 %m, 0
60  br i1 %cmp, label %return, label %if.end
61
62if.end:
63  %rem = urem i32 %l, %m
64  store i32 %rem, i32* @r, align 4
65  br label %return
66
67return:
68  %retval.0 = phi i32 [ %rem, %if.end ], [ 0, %entry ]
69  ret i32 %retval.0
70}
71
72; CHECK-MOD-DAG: BB#0
73; CHECK-MOD-DAG: Successors according to CFG: BB#2({{.*}}) BB#1
74; CHECK-MOD-DAG: BB#1
75; CHECK-MOD-DAG: Successors according to CFG: BB#4({{.*}}) BB#3
76; CHECK-MOD-DAG: BB#2
77; CHECK-MOD-DAG: BB#3
78; CHECK-MOD-DAG: Successors according to CFG: BB#2
79; CHECK-MOD-DAG: BB#4
80
81; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -filetype asm -o - %s 2>&1 | FileCheck %s -check-prefix CHECK-CFG
82
83; unsigned c;
84; extern unsigned long g(void);
85; int f(unsigned u, signed char b) {
86;   if (b)
87;     c = g() % u;
88;   return c;
89; }
90
91@c = common global i32 0, align 4
92
93declare arm_aapcs_vfpcc i32 @i()
94
95define arm_aapcs_vfpcc i32 @h(i32 %u, i8 signext %b) #0 {
96entry:
97  %tobool = icmp eq i8 %b, 0
98  br i1 %tobool, label %entry.if.end_crit_edge, label %if.then
99
100entry.if.end_crit_edge:
101  %.pre = load i32, i32* @c, align 4
102  br label %if.end
103
104if.then:
105  %call = tail call arm_aapcs_vfpcc i32 @i()
106  %rem = urem i32 %call, %u
107  store i32 %rem, i32* @c, align 4
108  br label %if.end
109
110if.end:
111  %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %rem, %if.then ]
112  ret i32 %0
113}
114
115attributes #0 = { optsize }
116
117; CHECK-CFG-DAG: BB#0
118; CHECK-CFG_DAG: t2Bcc <BB#2>
119; CHECK-CFG-DAG: t2B <BB#1>
120
121; CHECK-CFG-DAG: BB#1
122; CHECK-CFG-DAG: t2B <BB#3>
123
124; CHECK-CFG-DAG: BB#2
125; CHECK-CFG-DAG: tCBZ %vreg{{[0-9]}}, <BB#5>
126; CHECK-CFG-DAG: t2B <BB#4>
127
128; CHECK-CFG-DAG: BB#4
129
130; CHECK-CFG-DAG: BB#3
131; CHECK-CFG-DAG: tBX_RET
132
133; CHECK-CFG-DAG: BB#5
134; CHECK-CFG-DAG: t2UDF 249
135
136; CHECK-CFG-LABEL: h:
137; CHECK-CFG: cbz r{{[0-9]}}, .LBB2_2
138; CHECK-CFG: b .LBB2_4
139; CHECK-CFG-LABEL: .LBB2_2:
140; CHECK-CFG-NEXT: udf.w #249
141; CHECK-CFG-LABEL: .LBB2_4:
142; CHECK-CFG: bl __rt_udiv
143; CHECK-CFG: pop.w {{{.*}}, r11, pc}
144
145