1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s 3 4; Test that when extracting the same unknown vector index from an 5; insertelement the dynamic indexing is folded away. 6 7declare i32 @llvm.amdgcn.workitem.id.x() #0 8 9; No dynamic indexing required 10define amdgpu_kernel void @extract_insert_same_dynelt_v4i32(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in, i32 %val, i32 %idx) #1 { 11; GCN-LABEL: extract_insert_same_dynelt_v4i32: 12; GCN: ; %bb.0: 13; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 14; GCN-NEXT: s_load_dword s0, s[0:1], 0xd 15; GCN-NEXT: s_waitcnt lgkmcnt(0) 16; GCN-NEXT: s_mov_b32 s7, 0xf000 17; GCN-NEXT: s_mov_b32 s6, 0 18; GCN-NEXT: v_lshlrev_b32_e32 v0, 2, v0 19; GCN-NEXT: v_mov_b32_e32 v1, 0 20; GCN-NEXT: v_mov_b32_e32 v2, s0 21; GCN-NEXT: buffer_store_dword v2, v[0:1], s[4:7], 0 addr64 22; GCN-NEXT: s_endpgm 23 %id = call i32 @llvm.amdgcn.workitem.id.x() 24 %id.ext = sext i32 %id to i64 25 %gep.in = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %in, i64 %id.ext 26 %gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %id.ext 27 %vec = load <4 x i32>, <4 x i32> addrspace(1)* %gep.in 28 %insert = insertelement <4 x i32> %vec, i32 %val, i32 %idx 29 %extract = extractelement <4 x i32> %insert, i32 %idx 30 store i32 %extract, i32 addrspace(1)* %gep.out 31 ret void 32} 33 34define amdgpu_kernel void @extract_insert_different_dynelt_v4i32(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in, i32 %val, i32 %idx0, i32 %idx1) #1 { 35; GCN-LABEL: extract_insert_different_dynelt_v4i32: 36; GCN: ; %bb.0: 37; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 38; GCN-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0xd 39; GCN-NEXT: v_mov_b32_e32 v5, 0 40; GCN-NEXT: s_mov_b32 s3, 0xf000 41; GCN-NEXT: s_mov_b32 s2, 0 42; GCN-NEXT: s_waitcnt lgkmcnt(0) 43; GCN-NEXT: s_mov_b64 s[0:1], s[6:7] 44; GCN-NEXT: v_lshlrev_b32_e32 v4, 4, v0 45; GCN-NEXT: buffer_load_dwordx4 v[1:4], v[4:5], s[0:3], 0 addr64 46; GCN-NEXT: v_lshlrev_b32_e32 v6, 2, v0 47; GCN-NEXT: v_mov_b32_e32 v0, s8 48; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s9, 3 49; GCN-NEXT: v_mov_b32_e32 v7, v5 50; GCN-NEXT: s_mov_b64 s[6:7], s[2:3] 51; GCN-NEXT: s_waitcnt vmcnt(0) 52; GCN-NEXT: v_cndmask_b32_e32 v4, v4, v0, vcc 53; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s9, 2 54; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc 55; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s9, 1 56; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc 57; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s9, 0 58; GCN-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc 59; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s10, 1 60; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc 61; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s10, 2 62; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc 63; GCN-NEXT: v_cmp_eq_u32_e64 vcc, s10, 3 64; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc 65; GCN-NEXT: buffer_store_dword v0, v[6:7], s[4:7], 0 addr64 66; GCN-NEXT: s_endpgm 67 %id = call i32 @llvm.amdgcn.workitem.id.x() 68 %id.ext = sext i32 %id to i64 69 %gep.in = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %in, i64 %id.ext 70 %gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %id.ext 71 %vec = load <4 x i32>, <4 x i32> addrspace(1)* %gep.in 72 %insert = insertelement <4 x i32> %vec, i32 %val, i32 %idx0 73 %extract = extractelement <4 x i32> %insert, i32 %idx1 74 store i32 %extract, i32 addrspace(1)* %gep.out 75 ret void 76} 77 78define amdgpu_kernel void @extract_insert_same_elt2_v4i32(i32 addrspace(1)* %out, <4 x i32> addrspace(1)* %in, i32 %val, i32 %idx) #1 { 79; GCN-LABEL: extract_insert_same_elt2_v4i32: 80; GCN: ; %bb.0: 81; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 82; GCN-NEXT: s_load_dword s0, s[0:1], 0xd 83; GCN-NEXT: s_waitcnt lgkmcnt(0) 84; GCN-NEXT: s_mov_b32 s7, 0xf000 85; GCN-NEXT: s_mov_b32 s6, 0 86; GCN-NEXT: v_lshlrev_b32_e32 v0, 2, v0 87; GCN-NEXT: v_mov_b32_e32 v1, 0 88; GCN-NEXT: v_mov_b32_e32 v2, s0 89; GCN-NEXT: buffer_store_dword v2, v[0:1], s[4:7], 0 addr64 90; GCN-NEXT: s_endpgm 91 %id = call i32 @llvm.amdgcn.workitem.id.x() 92 %id.ext = sext i32 %id to i64 93 %gep.in = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %in, i64 %id.ext 94 %gep.out = getelementptr inbounds i32, i32 addrspace(1)* %out, i64 %id.ext 95 %vec = load <4 x i32>, <4 x i32> addrspace(1)* %gep.in 96 %insert = insertelement <4 x i32> %vec, i32 %val, i32 %idx 97 %extract = extractelement <4 x i32> %insert, i32 %idx 98 store i32 %extract, i32 addrspace(1)* %gep.out 99 ret void 100} 101 102define amdgpu_kernel void @extract_insert_same_dynelt_v4f32(float addrspace(1)* %out, <4 x float> addrspace(1)* %in, float %val, i32 %idx) #1 { 103; GCN-LABEL: extract_insert_same_dynelt_v4f32: 104; GCN: ; %bb.0: 105; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 106; GCN-NEXT: s_load_dword s8, s[0:1], 0xd 107; GCN-NEXT: v_mov_b32_e32 v2, 0 108; GCN-NEXT: s_mov_b32 s3, 0xf000 109; GCN-NEXT: s_mov_b32 s2, 0 110; GCN-NEXT: s_waitcnt lgkmcnt(0) 111; GCN-NEXT: s_mov_b64 s[0:1], s[6:7] 112; GCN-NEXT: v_lshlrev_b32_e32 v1, 4, v0 113; GCN-NEXT: v_lshlrev_b32_e32 v4, 2, v0 114; GCN-NEXT: v_mov_b32_e32 v5, v2 115; GCN-NEXT: buffer_load_dwordx4 v[0:3], v[1:2], s[0:3], 0 addr64 116; GCN-NEXT: s_mov_b64 s[6:7], s[2:3] 117; GCN-NEXT: s_waitcnt vmcnt(0) 118; GCN-NEXT: v_mov_b32_e32 v0, s8 119; GCN-NEXT: buffer_store_dword v0, v[4:5], s[4:7], 0 addr64 120; GCN-NEXT: s_endpgm 121 %id = call i32 @llvm.amdgcn.workitem.id.x() 122 %id.ext = sext i32 %id to i64 123 %gep.in = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %in, i64 %id.ext 124 %gep.out = getelementptr inbounds float, float addrspace(1)* %out, i64 %id.ext 125 %vec = load volatile <4 x float>, <4 x float> addrspace(1)* %gep.in 126 %insert = insertelement <4 x float> %vec, float %val, i32 %idx 127 %extract = extractelement <4 x float> %insert, i32 %idx 128 store float %extract, float addrspace(1)* %gep.out 129 ret void 130} 131 132attributes #0 = { nounwind readnone } 133attributes #1 = { nounwind } 134