1# RUN: llc -run-pass=si-insert-waitcnts -march=amdgcn -mcpu=tahiti -o - %s | FileCheck %s -check-prefixes=CHECK,SI 2# RUN: llc -run-pass=si-insert-waitcnts -march=amdgcn -mcpu=gfx900 -o - %s | FileCheck %s -check-prefixes=CHECK,GFX9 3# RUN: llc -run-pass=si-insert-waitcnts -march=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -o - %s | FileCheck %s -check-prefixes=CHECK,GFX10 4--- 5# CHECK-LABEL: name: vccz_corrupt_workaround 6# CHECK: $vcc = V_CMP_EQ_F32 7# SI-NEXT: S_WAITCNT 127 8# SI-NEXT: $vcc = S_MOV_B64 $vcc 9# CHECK-NEXT: S_CBRANCH_VCCZ %bb.2, implicit killed $vcc 10 11name: vccz_corrupt_workaround 12tracksRegLiveness: true 13body: | 14 bb.0: 15 liveins: $sgpr0_sgpr1 16 17 $sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM killed $sgpr0_sgpr1, 11, 0, 0 18 $sgpr7 = S_MOV_B32 61440 19 $sgpr6 = S_MOV_B32 -1 20 $vcc = V_CMP_EQ_F32_e64 0, 0, 0, undef $sgpr2, 0, implicit $exec 21 S_CBRANCH_VCCZ %bb.1, implicit killed $vcc 22 23 bb.2: 24 liveins: $sgpr6, $sgpr7, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003 25 26 $vgpr0 = V_MOV_B32_e32 9, implicit $exec 27 BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, 0, 0, implicit $exec 28 $vgpr0 = V_MOV_B32_e32 0, implicit $exec 29 S_BRANCH %bb.3 30 31 bb.1: 32 liveins: $sgpr6, $sgpr7, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003 33 34 $vgpr0 = V_MOV_B32_e32 100, implicit $exec 35 BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, 0, 0, implicit $exec 36 $vgpr0 = V_MOV_B32_e32 1, implicit $exec 37 38 bb.3: 39 liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003 40 41 $sgpr3 = S_MOV_B32 61440 42 $sgpr2 = S_MOV_B32 -1 43 BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, 0, 0, implicit $exec 44 S_ENDPGM 0 45 46... 47--- 48# CHECK-LABEL: name: vccz_corrupt_undef_vcc 49# CHECK: BUFFER_STORE_DWORD_OFFSET 50# SI-NEXT: S_WAITCNT 3855 51# CHECK-NEXT: $vgpr0 = V_MOV_B32_e32 52 53name: vccz_corrupt_undef_vcc 54tracksRegLiveness: true 55body: | 56 bb.0: 57 liveins: $sgpr0_sgpr1 58 59 $sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM killed $sgpr0_sgpr1, 11, 0, 0 60 $sgpr7 = S_MOV_B32 61440 61 $sgpr6 = S_MOV_B32 -1 62 S_CBRANCH_VCCZ %bb.1, implicit undef $vcc 63 64 bb.2: 65 liveins: $sgpr6, $sgpr7, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003 66 67 $vgpr0 = V_MOV_B32_e32 9, implicit $exec 68 BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, 0, 0, implicit $exec 69 $vgpr0 = V_MOV_B32_e32 0, implicit $exec 70 S_BRANCH %bb.3 71 72 bb.1: 73 liveins: $sgpr6, $sgpr7, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003 74 75 $vgpr0 = V_MOV_B32_e32 100, implicit $exec 76 BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, 0, 0, implicit $exec 77 $vgpr0 = V_MOV_B32_e32 1, implicit $exec 78 79 bb.3: 80 liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3:0x00000003 81 82 $sgpr3 = S_MOV_B32 61440 83 $sgpr2 = S_MOV_B32 -1 84 BUFFER_STORE_DWORD_OFFSET killed $vgpr0, killed $sgpr0_sgpr1_sgpr2_sgpr3, 0, 0, 0, 0, 0, 0, 0, implicit $exec 85 S_ENDPGM 0 86 87... 88--- 89# Test that after reloading vcc spilled to a vgpr, we insert any necessary 90# instructions to fix vccz. 91 92# CHECK-LABEL: name: reload_vcc_from_vgpr 93# CHECK: $vcc_lo = V_READLANE_B32_vi $vgpr0, 8, implicit-def $vcc 94# CHECK: $vcc_hi = V_READLANE_B32_vi $vgpr0, 9 95# SI: $vcc = S_MOV_B64 $vcc 96# GFX9: $vcc = S_MOV_B64 $vcc 97# CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc 98 99name: reload_vcc_from_vgpr 100body: | 101 bb.0: 102 $vcc_lo = V_READLANE_B32_vi $vgpr0, 8, implicit-def $vcc 103 $vcc_hi = V_READLANE_B32_vi $vgpr0, 9 104 S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc 105 bb.1: 106 107... 108--- 109# Test that after reloading vcc spilled to memory, we insert any necessary 110# instructions to fix vccz. 111 112# CHECK-LABEL: name: reload_vcc_from_mem 113# CHECK: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 4, 0, 0, 0, 0, 0, implicit $exec 114# CHECK: $vcc_lo = V_READFIRSTLANE_B32 killed $vgpr0, implicit $exec, implicit-def $vcc 115# CHECK: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 8, 0, 0, 0, 0, 0, implicit $exec 116# CHECK: $vcc_hi = V_READFIRSTLANE_B32 killed $vgpr0, implicit $exec, implicit-def $vcc 117# SI: $vcc = S_MOV_B64 $vcc 118# GFX9: $vcc = S_MOV_B64 $vcc 119# CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc 120 121name: reload_vcc_from_mem 122body: | 123 bb.0: 124 $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 4, 0, 0, 0, 0, 0, implicit $exec 125 $vcc_lo = V_READFIRSTLANE_B32 killed $vgpr0, implicit $exec, implicit-def $vcc 126 $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4, 8, 0, 0, 0, 0, 0, implicit $exec 127 $vcc_hi = V_READFIRSTLANE_B32 killed $vgpr0, implicit $exec, implicit-def $vcc 128 S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc 129 bb.1: 130 131... 132--- 133# Test that after inline asm that defines vcc_lo, we insert any necessary 134# instructions to fix vccz. 135 136# CHECK-LABEL: name: inlineasm_def_vcc_lo 137# CHECK: INLINEASM &"; def vcc_lo", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vcc_lo 138# SI: $vcc = S_MOV_B64 $vcc 139# GFX9: $vcc = S_MOV_B64 $vcc 140# CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc 141 142name: inlineasm_def_vcc_lo 143body: | 144 bb.0: 145 INLINEASM &"; def vcc_lo", 1, 10, implicit-def $vcc_lo 146 S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc 147 bb.1: 148 149... 150--- 151# Test that after inline asm that defines vcc, no unnecessary instructions are 152# inserted to fix vccz. 153 154# CHECK-LABEL: name: inlineasm_def_vcc 155# CHECK: INLINEASM &"; def vcc", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vcc 156# CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc 157 158name: inlineasm_def_vcc 159body: | 160 bb.0: 161 INLINEASM &"; def vcc", 1, 10, implicit-def $vcc 162 S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc 163 bb.1: 164 165... 166