1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN %s 2; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s 3 4declare float @llvm.fma.f32(float, float, float) #1 5declare double @llvm.fma.f64(double, double, double) #1 6declare float @llvm.fmuladd.f32(float, float, float) #1 7declare float @llvm.amdgcn.div.fixup.f32(float, float, float) #1 8 9 10; GCN-LABEL: {{^}}test_sgpr_use_twice_binop: 11; GCN: s_load_dword [[SGPR:s[0-9]+]], 12; GCN: v_add_f32_e64 [[RESULT:v[0-9]+]], [[SGPR]], [[SGPR]] 13; GCN: buffer_store_dword [[RESULT]] 14define void @test_sgpr_use_twice_binop(float addrspace(1)* %out, float %a) #0 { 15 %dbl = fadd float %a, %a 16 store float %dbl, float addrspace(1)* %out, align 4 17 ret void 18} 19 20; GCN-LABEL: {{^}}test_sgpr_use_three_ternary_op: 21; GCN: s_load_dword [[SGPR:s[0-9]+]], 22; GCN: v_fma_f32 [[RESULT:v[0-9]+]], [[SGPR]], [[SGPR]], [[SGPR]] 23; GCN: buffer_store_dword [[RESULT]] 24define void @test_sgpr_use_three_ternary_op(float addrspace(1)* %out, float %a) #0 { 25 %fma = call float @llvm.fma.f32(float %a, float %a, float %a) #1 26 store float %fma, float addrspace(1)* %out, align 4 27 ret void 28} 29 30; GCN-LABEL: {{^}}test_sgpr_use_twice_ternary_op_a_a_b: 31; SI-DAG: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb 32; SI-DAG: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc 33; VI-DAG: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c 34; VI-DAG: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30 35; GCN: v_mov_b32_e32 [[VGPR1:v[0-9]+]], [[SGPR1]] 36; GCN: v_fma_f32 [[RESULT:v[0-9]+]], [[SGPR0]], [[SGPR0]], [[VGPR1]] 37; GCN: buffer_store_dword [[RESULT]] 38define void @test_sgpr_use_twice_ternary_op_a_a_b(float addrspace(1)* %out, float %a, float %b) #0 { 39 %fma = call float @llvm.fma.f32(float %a, float %a, float %b) #1 40 store float %fma, float addrspace(1)* %out, align 4 41 ret void 42} 43 44; GCN-LABEL: {{^}}test_use_s_v_s: 45; GCN-DAG: s_load_dword [[SA:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}} 46; GCN-DAG: s_load_dword [[SB:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xc|0x30}} 47; SI: buffer_load_dword [[VA0:v[0-9]+]] 48; SI: buffer_load_dword [[VA1:v[0-9]+]] 49 50; GCN-NOT: v_mov_b32 51; GCN: v_mov_b32_e32 [[VB:v[0-9]+]], [[SB]] 52; GCN-NOT: v_mov_b32 53 54; VI: buffer_load_dword [[VA0:v[0-9]+]] 55; VI: buffer_load_dword [[VA1:v[0-9]+]] 56 57; GCN-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], [[VA0]], [[SA]], [[VB]] 58; GCN-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], [[VA1]], [[SA]], [[VB]] 59; GCN: buffer_store_dword [[RESULT0]] 60; GCN: buffer_store_dword [[RESULT1]] 61define void @test_use_s_v_s(float addrspace(1)* %out, float %a, float %b, float addrspace(1)* %in) #0 { 62 %va0 = load volatile float, float addrspace(1)* %in 63 %va1 = load volatile float, float addrspace(1)* %in 64 %fma0 = call float @llvm.fma.f32(float %a, float %va0, float %b) #1 65 %fma1 = call float @llvm.fma.f32(float %a, float %va1, float %b) #1 66 store volatile float %fma0, float addrspace(1)* %out 67 store volatile float %fma1, float addrspace(1)* %out 68 ret void 69} 70 71; GCN-LABEL: {{^}}test_sgpr_use_twice_ternary_op_a_b_a: 72; SI-DAG: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb 73; SI-DAG: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc 74; VI-DAG: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c 75; VI-DAG: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30 76; GCN: v_mov_b32_e32 [[VGPR1:v[0-9]+]], [[SGPR1]] 77; GCN: v_fma_f32 [[RESULT:v[0-9]+]], [[VGPR1]], [[SGPR0]], [[SGPR0]] 78; GCN: buffer_store_dword [[RESULT]] 79define void @test_sgpr_use_twice_ternary_op_a_b_a(float addrspace(1)* %out, float %a, float %b) #0 { 80 %fma = call float @llvm.fma.f32(float %a, float %b, float %a) #1 81 store float %fma, float addrspace(1)* %out, align 4 82 ret void 83} 84 85; GCN-LABEL: {{^}}test_sgpr_use_twice_ternary_op_b_a_a: 86; SI-DAG: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb 87; SI-DAG: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xc 88; VI-DAG: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c 89; VI-DAG: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x30 90; GCN: v_mov_b32_e32 [[VGPR1:v[0-9]+]], [[SGPR1]] 91; GCN: v_fma_f32 [[RESULT:v[0-9]+]], [[SGPR0]], [[VGPR1]], [[SGPR0]] 92; GCN: buffer_store_dword [[RESULT]] 93define void @test_sgpr_use_twice_ternary_op_b_a_a(float addrspace(1)* %out, float %a, float %b) #0 { 94 %fma = call float @llvm.fma.f32(float %b, float %a, float %a) #1 95 store float %fma, float addrspace(1)* %out, align 4 96 ret void 97} 98 99; GCN-LABEL: {{^}}test_sgpr_use_twice_ternary_op_a_a_imm: 100; GCN: s_load_dword [[SGPR:s[0-9]+]] 101; GCN: v_fma_f32 [[RESULT:v[0-9]+]], [[SGPR]], [[SGPR]], 2.0 102; GCN: buffer_store_dword [[RESULT]] 103define void @test_sgpr_use_twice_ternary_op_a_a_imm(float addrspace(1)* %out, float %a) #0 { 104 %fma = call float @llvm.fma.f32(float %a, float %a, float 2.0) #1 105 store float %fma, float addrspace(1)* %out, align 4 106 ret void 107} 108 109; GCN-LABEL: {{^}}test_sgpr_use_twice_ternary_op_a_imm_a: 110; GCN: s_load_dword [[SGPR:s[0-9]+]] 111; GCN: v_fma_f32 [[RESULT:v[0-9]+]], [[SGPR]], 2.0, [[SGPR]] 112; GCN: buffer_store_dword [[RESULT]] 113define void @test_sgpr_use_twice_ternary_op_a_imm_a(float addrspace(1)* %out, float %a) #0 { 114 %fma = call float @llvm.fma.f32(float %a, float 2.0, float %a) #1 115 store float %fma, float addrspace(1)* %out, align 4 116 ret void 117} 118 119; Don't use fma since fma c, x, y is canonicalized to fma x, c, y 120; GCN-LABEL: {{^}}test_sgpr_use_twice_ternary_op_imm_a_a: 121; GCN: s_load_dword [[SGPR:s[0-9]+]] 122; GCN: v_div_fixup_f32 [[RESULT:v[0-9]+]], 2.0, [[SGPR]], [[SGPR]] 123; GCN: buffer_store_dword [[RESULT]] 124define void @test_sgpr_use_twice_ternary_op_imm_a_a(float addrspace(1)* %out, float %a) #0 { 125 %val = call float @llvm.amdgcn.div.fixup.f32(float 2.0, float %a, float %a) #1 126 store float %val, float addrspace(1)* %out, align 4 127 ret void 128} 129 130; GCN-LABEL: {{^}}test_sgpr_use_twice_ternary_op_a_a_kimm: 131; GCN-DAG: s_load_dword [[SGPR:s[0-9]+]] 132; GCN-DAG: v_mov_b32_e32 [[VK:v[0-9]+]], 0x44800000 133; GCN: v_fma_f32 [[RESULT:v[0-9]+]], [[SGPR]], [[SGPR]], [[VK]] 134; GCN: buffer_store_dword [[RESULT]] 135define void @test_sgpr_use_twice_ternary_op_a_a_kimm(float addrspace(1)* %out, float %a) #0 { 136 %fma = call float @llvm.fma.f32(float %a, float %a, float 1024.0) #1 137 store float %fma, float addrspace(1)* %out, align 4 138 ret void 139} 140 141; GCN-LABEL: {{^}}test_literal_use_twice_ternary_op_k_k_s: 142; GCN-DAG: s_load_dword [[SGPR:s[0-9]+]] 143; GCN-DAG: v_mov_b32_e32 [[VK:v[0-9]+]], 0x44800000 144; GCN: v_fma_f32 [[RESULT0:v[0-9]+]], [[VK]], [[VK]], [[SGPR]] 145; GCN: buffer_store_dword [[RESULT0]] 146define void @test_literal_use_twice_ternary_op_k_k_s(float addrspace(1)* %out, float %a) #0 { 147 %fma = call float @llvm.fma.f32(float 1024.0, float 1024.0, float %a) #1 148 store float %fma, float addrspace(1)* %out 149 ret void 150} 151 152; GCN-LABEL: {{^}}test_literal_use_twice_ternary_op_k_k_s_x2: 153; GCN-DAG: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}} 154; GCN-DAG: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xc|0x30}} 155; GCN-DAG: v_mov_b32_e32 [[VK:v[0-9]+]], 0x44800000 156; GCN-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], [[VK]], [[VK]], [[SGPR0]] 157; GCN-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], [[VK]], [[VK]], [[SGPR1]] 158; GCN: buffer_store_dword [[RESULT0]] 159; GCN: buffer_store_dword [[RESULT1]] 160; GCN: s_endpgm 161define void @test_literal_use_twice_ternary_op_k_k_s_x2(float addrspace(1)* %out, float %a, float %b) #0 { 162 %fma0 = call float @llvm.fma.f32(float 1024.0, float 1024.0, float %a) #1 163 %fma1 = call float @llvm.fma.f32(float 1024.0, float 1024.0, float %b) #1 164 store volatile float %fma0, float addrspace(1)* %out 165 store volatile float %fma1, float addrspace(1)* %out 166 ret void 167} 168 169; GCN-LABEL: {{^}}test_literal_use_twice_ternary_op_k_s_k: 170; GCN-DAG: s_load_dword [[SGPR:s[0-9]+]] 171; GCN-DAG: v_mov_b32_e32 [[VK:v[0-9]+]], 0x44800000 172; GCN: v_fma_f32 [[RESULT:v[0-9]+]], [[SGPR]], [[VK]], [[VK]] 173; GCN: buffer_store_dword [[RESULT]] 174define void @test_literal_use_twice_ternary_op_k_s_k(float addrspace(1)* %out, float %a) #0 { 175 %fma = call float @llvm.fma.f32(float 1024.0, float %a, float 1024.0) #1 176 store float %fma, float addrspace(1)* %out 177 ret void 178} 179 180; GCN-LABEL: {{^}}test_literal_use_twice_ternary_op_k_s_k_x2: 181; GCN-DAG: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}} 182; GCN-DAG: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xc|0x30}} 183; GCN-DAG: v_mov_b32_e32 [[VK:v[0-9]+]], 0x44800000 184; GCN-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], [[SGPR0]], [[VK]], [[VK]] 185; GCN-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], [[SGPR1]], [[VK]], [[VK]] 186; GCN: buffer_store_dword [[RESULT0]] 187; GCN: buffer_store_dword [[RESULT1]] 188; GCN: s_endpgm 189define void @test_literal_use_twice_ternary_op_k_s_k_x2(float addrspace(1)* %out, float %a, float %b) #0 { 190 %fma0 = call float @llvm.fma.f32(float 1024.0, float %a, float 1024.0) #1 191 %fma1 = call float @llvm.fma.f32(float 1024.0, float %b, float 1024.0) #1 192 store volatile float %fma0, float addrspace(1)* %out 193 store volatile float %fma1, float addrspace(1)* %out 194 ret void 195} 196 197; GCN-LABEL: {{^}}test_literal_use_twice_ternary_op_s_k_k: 198; GCN-DAG: s_load_dword [[SGPR:s[0-9]+]] 199; GCN-DAG: v_mov_b32_e32 [[VK:v[0-9]+]], 0x44800000 200; GCN: v_fma_f32 [[RESULT:v[0-9]+]], [[SGPR]], [[VK]], [[VK]] 201; GCN: buffer_store_dword [[RESULT]] 202define void @test_literal_use_twice_ternary_op_s_k_k(float addrspace(1)* %out, float %a) #0 { 203 %fma = call float @llvm.fma.f32(float %a, float 1024.0, float 1024.0) #1 204 store float %fma, float addrspace(1)* %out 205 ret void 206} 207 208; GCN-LABEL: {{^}}test_literal_use_twice_ternary_op_s_k_k_x2: 209; GCN-DAG: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}} 210; GCN-DAG: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xc|0x30}} 211; GCN-DAG: v_mov_b32_e32 [[VK:v[0-9]+]], 0x44800000 212; GCN-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], [[SGPR0]], [[VK]], [[VK]] 213; GCN-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], [[SGPR1]], [[VK]], [[VK]] 214; GCN: buffer_store_dword [[RESULT0]] 215; GCN: buffer_store_dword [[RESULT1]] 216; GCN: s_endpgm 217define void @test_literal_use_twice_ternary_op_s_k_k_x2(float addrspace(1)* %out, float %a, float %b) #0 { 218 %fma0 = call float @llvm.fma.f32(float %a, float 1024.0, float 1024.0) #1 219 %fma1 = call float @llvm.fma.f32(float %b, float 1024.0, float 1024.0) #1 220 store volatile float %fma0, float addrspace(1)* %out 221 store volatile float %fma1, float addrspace(1)* %out 222 ret void 223} 224 225; GCN-LABEL: {{^}}test_s0_s1_k_f32: 226; GCN-DAG: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}} 227; GCN-DAG: s_load_dword [[SGPR1:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xc|0x30}} 228; GCN-DAG: v_mov_b32_e32 [[VK0:v[0-9]+]], 0x44800000 229; GCN-DAG: v_mov_b32_e32 [[VS1:v[0-9]+]], [[SGPR1]] 230 231; GCN-DAG: v_fma_f32 [[RESULT0:v[0-9]+]], [[VS1]], [[SGPR0]], [[VK0]] 232; GCN-DAG: v_mov_b32_e32 [[VK1:v[0-9]+]], 0x45800000 233; GCN-DAG: v_fma_f32 [[RESULT1:v[0-9]+]], [[SGPR0]], [[VS1]], [[VK1]] 234 235; GCN: buffer_store_dword [[RESULT0]] 236; GCN: buffer_store_dword [[RESULT1]] 237define void @test_s0_s1_k_f32(float addrspace(1)* %out, float %a, float %b) #0 { 238 %fma0 = call float @llvm.fma.f32(float %a, float %b, float 1024.0) #1 239 %fma1 = call float @llvm.fma.f32(float %a, float %b, float 4096.0) #1 240 store volatile float %fma0, float addrspace(1)* %out 241 store volatile float %fma1, float addrspace(1)* %out 242 ret void 243} 244 245; FIXME: Immediate in SGPRs just copied to VGPRs 246; GCN-LABEL: {{^}}test_s0_s1_k_f64: 247; GCN-DAG: s_load_dwordx2 [[SGPR0:s\[[0-9]+:[0-9]+\]]], s{{\[[0-9]+:[0-9]+\]}}, {{0xb|0x2c}} 248; GCN-DAG: s_load_dwordx2 s{{\[}}[[SGPR1_SUB0:[0-9]+]]:[[SGPR1_SUB1:[0-9]+]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}}, {{0xd|0x34}} 249; GCN-DAG: v_mov_b32_e32 v[[VK0_SUB1:[0-9]+]], 0x40900000 250; GCN-DAG: v_mov_b32_e32 v[[VZERO:[0-9]+]], 0{{$}} 251 252; GCN-DAG: v_mov_b32_e32 v[[VS1_SUB0:[0-9]+]], s[[SGPR1_SUB0]] 253; GCN-DAG: v_mov_b32_e32 v[[VS1_SUB1:[0-9]+]], s[[SGPR1_SUB1]] 254; GCN: v_fma_f64 [[RESULT0:v\[[0-9]+:[0-9]+\]]], v{{\[}}[[VS1_SUB0]]:[[VS1_SUB1]]{{\]}}, [[SGPR0]], v{{\[}}[[VZERO]]:[[VK0_SUB1]]{{\]}} 255 256; Same zero component is re-used for half of each immediate. 257; GCN: v_mov_b32_e32 v[[VK1_SUB1:[0-9]+]], 0x40b00000 258; GCN: v_fma_f64 [[RESULT1:v\[[0-9]+:[0-9]+\]]], [[SGPR0]], v{{\[}}[[VS1_SUB0]]:[[VS1_SUB1]]{{\]}}, v{{\[}}[[VZERO]]:[[VK1_SUB1]]{{\]}} 259 260; GCN: buffer_store_dwordx2 [[RESULT0]] 261; GCN: buffer_store_dwordx2 [[RESULT1]] 262define void @test_s0_s1_k_f64(double addrspace(1)* %out, double %a, double %b) #0 { 263 %fma0 = call double @llvm.fma.f64(double %a, double %b, double 1024.0) #1 264 %fma1 = call double @llvm.fma.f64(double %a, double %b, double 4096.0) #1 265 store volatile double %fma0, double addrspace(1)* %out 266 store volatile double %fma1, double addrspace(1)* %out 267 ret void 268} 269 270attributes #0 = { nounwind } 271attributes #1 = { nounwind readnone } 272