1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -mtriple=amdgcn-- -S -amdgpu-unify-divergent-exit-nodes -verify %s | FileCheck -check-prefix=IR %s
3
4; Make sure that the phi in n28 is updated when the block is split by unify
5; divergent exit nodes.
6
7define amdgpu_ps void @_amdgpu_ps_main() local_unnamed_addr #3 {
8; IR-LABEL: @_amdgpu_ps_main(
9; IR-NEXT:  .entry:
10; IR-NEXT:    br label [[DOTLOOPEXIT:%.*]]
11; IR:       .loopexit:
12; IR-NEXT:    br label [[N28:%.*]]
13; IR:       n28:
14; IR-NEXT:    [[DOT01:%.*]] = phi float [ 0.000000e+00, [[DOTLOOPEXIT]] ], [ [[N29:%.*]], [[TRANSITIONBLOCK:%.*]] ]
15; IR-NEXT:    [[N29]] = fadd float [[DOT01]], 1.000000e+00
16; IR-NEXT:    [[N30:%.*]] = fcmp ogt float [[N29]], 4.000000e+00
17; IR-NEXT:    br i1 true, label [[TRANSITIONBLOCK]], label [[UNIFIEDRETURNBLOCK:%.*]]
18; IR:       TransitionBlock:
19; IR-NEXT:    br i1 [[N30]], label [[DOTLOOPEXIT]], label [[N28]]
20; IR:       UnifiedReturnBlock:
21; IR-NEXT:    call void @llvm.amdgcn.exp.f32(i32 9, i32 0, float undef, float undef, float undef, float undef, i1 true, i1 true)
22; IR-NEXT:    ret void
23;
24.entry:
25  br label %.loopexit
26
27.loopexit:                                        ; preds = %n28, %.entry
28  br label %n28
29
30n28:                                               ; preds = %.loopexit, %n28
31  %.01 = phi float [ 0.000000e+00, %.loopexit ], [ %n29, %n28 ]
32  %n29 = fadd float %.01, 1.0
33  %n30 = fcmp ogt float %n29, 4.000000e+00
34  br i1 %n30, label %.loopexit, label %n28
35
36n31:                                               ; preds =
37  ret void
38}
39