1; RUN: llc -march=amdgcn -mcpu=verde < %s | FileCheck %s
2
3; Test a simple uniform loop that lives inside non-uniform control flow.
4
5; CHECK-LABEL: {{^}}test1:
6; CHECK: v_cmp_ne_u32_e32 vcc, 0
7; CHECK: s_and_saveexec_b64
8; CHECK-NEXT: ; mask branch
9; CHECK-NEXT: s_cbranch_execz BB{{[0-9]+_[0-9]+}}
10
11; CHECK: [[LOOP_BODY_LABEL:BB[0-9]+_[0-9]+]]: ; %loop_body
12; CHECK: s_cbranch_scc0 [[LOOP_BODY_LABEL]]
13
14; CHECK: s_endpgm
15define amdgpu_ps void @test1(<8 x i32> inreg %rsrc, <2 x i32> %addr.base, i32 %y, i32 %p) {
16main_body:
17  %cc = icmp eq i32 %p, 0
18  br i1 %cc, label %out, label %loop_body
19
20loop_body:
21  %counter = phi i32 [ 0, %main_body ], [ %incr, %loop_body ]
22
23  ; Prevent the loop from being optimized out
24  call void asm sideeffect "", "" ()
25
26  %incr = add i32 %counter, 1
27  %lc = icmp sge i32 %incr, 1000
28  br i1 %lc, label %out, label %loop_body
29
30out:
31  ret void
32}
33
34; CHECK-LABEL: {{^}}test2:
35; CHECK: s_and_saveexec_b64
36; CHECK-NEXT: ; mask branch
37; CHECK-NEXT: s_cbranch_execz
38define amdgpu_kernel void @test2(i32 addrspace(1)* %out, i32 %a, i32 %b) {
39main_body:
40  %tid = call i32 @llvm.amdgcn.workitem.id.x() #1
41  %cc = icmp eq i32 %tid, 0
42  br i1 %cc, label %done1, label %if
43
44if:
45  %cmp = icmp eq i32 %a, 0
46  br i1 %cmp, label %done0, label %loop_body
47
48loop_body:
49  %counter = phi i32 [ 0, %if ], [0, %done0], [ %incr, %loop_body ]
50
51  ; Prevent the loop from being optimized out
52  call void asm sideeffect "", "" ()
53
54  %incr = add i32 %counter, 1
55  %lc = icmp sge i32 %incr, 1000
56  br i1 %lc, label %done1, label %loop_body
57
58done0:
59  %cmp0 = icmp eq i32 %b, 0
60  br i1 %cmp0, label %done1, label %loop_body
61
62done1:
63  ret void
64}
65
66declare i32 @llvm.amdgcn.workitem.id.x() #1
67
68attributes #1 = { nounwind readonly }
69