1; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck --check-prefix=SI %s 2; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI %s 3 4; SI-LABEL: {{^}}uniform_if_scc: 5; SI-DAG: s_cmp_eq_i32 s{{[0-9]+}}, 0 6; SI-DAG: v_mov_b32_e32 [[STORE_VAL:v[0-9]+]], 0 7; SI: s_cbranch_scc1 [[IF_LABEL:[0-9_A-Za-z]+]] 8 9; Fall-through to the else 10; SI: v_mov_b32_e32 [[STORE_VAL]], 1 11 12; SI: [[IF_LABEL]]: 13; SI: buffer_store_dword [[STORE_VAL]] 14define void @uniform_if_scc(i32 %cond, i32 addrspace(1)* %out) { 15entry: 16 %cmp0 = icmp eq i32 %cond, 0 17 br i1 %cmp0, label %if, label %else 18 19if: 20 br label %done 21 22else: 23 br label %done 24 25done: 26 %value = phi i32 [0, %if], [1, %else] 27 store i32 %value, i32 addrspace(1)* %out 28 ret void 29} 30 31; SI-LABEL: {{^}}uniform_if_vcc: 32; FIXME: We could use _e32 here if we re-used the 0 from [[STORE_VAL]], and 33; also scheduled the write first. 34; SI: v_cmp_eq_f32_e64 [[COND:vcc|s\[[0-9]+:[0-9]+\]]], 0, s{{[0-9]+}} 35; SI: s_and_b64 vcc, exec, [[COND]] 36; SI: v_mov_b32_e32 [[STORE_VAL:v[0-9]+]], 0 37; SI: s_cbranch_vccnz [[IF_LABEL:[0-9_A-Za-z]+]] 38 39; Fall-through to the else 40; SI: v_mov_b32_e32 [[STORE_VAL]], 1 41 42; SI: [[IF_LABEL]]: 43; SI: buffer_store_dword [[STORE_VAL]] 44define void @uniform_if_vcc(float %cond, i32 addrspace(1)* %out) { 45entry: 46 %cmp0 = fcmp oeq float %cond, 0.0 47 br i1 %cmp0, label %if, label %else 48 49if: 50 br label %done 51 52else: 53 br label %done 54 55done: 56 %value = phi i32 [0, %if], [1, %else] 57 store i32 %value, i32 addrspace(1)* %out 58 ret void 59} 60 61; SI-LABEL: {{^}}uniform_if_swap_br_targets_scc: 62; SI-DAG: s_cmp_lg_i32 s{{[0-9]+}}, 0 63; SI-DAG: v_mov_b32_e32 [[STORE_VAL:v[0-9]+]], 0 64; SI: s_cbranch_scc1 [[IF_LABEL:[0-9_A-Za-z]+]] 65 66; Fall-through to the else 67; SI: v_mov_b32_e32 [[STORE_VAL]], 1 68 69; SI: [[IF_LABEL]]: 70; SI: buffer_store_dword [[STORE_VAL]] 71define void @uniform_if_swap_br_targets_scc(i32 %cond, i32 addrspace(1)* %out) { 72entry: 73 %cmp0 = icmp eq i32 %cond, 0 74 br i1 %cmp0, label %else, label %if 75 76if: 77 br label %done 78 79else: 80 br label %done 81 82done: 83 %value = phi i32 [0, %if], [1, %else] 84 store i32 %value, i32 addrspace(1)* %out 85 ret void 86} 87 88; SI-LABEL: {{^}}uniform_if_swap_br_targets_vcc: 89; FIXME: We could use _e32 here if we re-used the 0 from [[STORE_VAL]], and 90; also scheduled the write first. 91; SI: v_cmp_neq_f32_e64 [[COND:vcc|s\[[0-9]+:[0-9]+\]]], 0, s{{[0-9]+}} 92; SI: s_and_b64 vcc, exec, [[COND]] 93; SI: v_mov_b32_e32 [[STORE_VAL:v[0-9]+]], 0 94; SI: s_cbranch_vccnz [[IF_LABEL:[0-9_A-Za-z]+]] 95 96; Fall-through to the else 97; SI: v_mov_b32_e32 [[STORE_VAL]], 1 98 99; SI: [[IF_LABEL]]: 100; SI: buffer_store_dword [[STORE_VAL]] 101define void @uniform_if_swap_br_targets_vcc(float %cond, i32 addrspace(1)* %out) { 102entry: 103 %cmp0 = fcmp oeq float %cond, 0.0 104 br i1 %cmp0, label %else, label %if 105 106if: 107 br label %done 108 109else: 110 br label %done 111 112done: 113 %value = phi i32 [0, %if], [1, %else] 114 store i32 %value, i32 addrspace(1)* %out 115 ret void 116} 117 118; SI-LABEL: {{^}}uniform_if_move_valu: 119; SI: v_add_f32_e32 [[CMP:v[0-9]+]] 120; Using a floating-point value in an integer compare will cause the compare to 121; be selected for the SALU and then later moved to the VALU. 122; SI: v_cmp_ne_i32_e32 [[COND:vcc|s\[[0-9]+:[0-9]+\]]], 5, [[CMP]] 123; SI: s_and_b64 vcc, exec, [[COND]] 124; SI: s_cbranch_vccnz [[ENDIF_LABEL:[0-9_A-Za-z]+]] 125; SI: buffer_store_dword 126; SI: [[ENDIF_LABEL]]: 127; SI: s_endpgm 128define void @uniform_if_move_valu(i32 addrspace(1)* %out, float %a) { 129entry: 130 %a.0 = fadd float %a, 10.0 131 %cond = bitcast float %a.0 to i32 132 %cmp = icmp eq i32 %cond, 5 133 br i1 %cmp, label %if, label %endif 134 135if: 136 store i32 0, i32 addrspace(1)* %out 137 br label %endif 138 139endif: 140 ret void 141} 142 143; SI-LABEL: {{^}}uniform_if_move_valu_commute: 144; SI: v_add_f32_e32 [[CMP:v[0-9]+]] 145; Using a floating-point value in an integer compare will cause the compare to 146; be selected for the SALU and then later moved to the VALU. 147; SI: v_cmp_gt_u32_e32 [[COND:vcc|s\[[0-9]+:[0-9]+\]]], 6, [[CMP]] 148; SI: s_and_b64 vcc, exec, [[COND]] 149; SI: s_cbranch_vccnz [[ENDIF_LABEL:[0-9_A-Za-z]+]] 150; SI: buffer_store_dword 151; SI: [[ENDIF_LABEL]]: 152; SI: s_endpgm 153define void @uniform_if_move_valu_commute(i32 addrspace(1)* %out, float %a) { 154entry: 155 %a.0 = fadd float %a, 10.0 156 %cond = bitcast float %a.0 to i32 157 %cmp = icmp ugt i32 %cond, 5 158 br i1 %cmp, label %if, label %endif 159 160if: 161 store i32 0, i32 addrspace(1)* %out 162 br label %endif 163 164endif: 165 ret void 166} 167 168 169; SI-LABEL: {{^}}uniform_if_else: 170; SI: s_cmp_lg_i32 s{{[0-9]+}}, 0 171; SI: s_cbranch_scc1 [[ELSE_LABEL:[0-9_A-Za-z]+]] 172; SI: v_mov_b32_e32 [[ONE:v[0-9]+]], 1 173; SI: buffer_store_dword [[ONE]] 174; SI: s_branch [[ENDIF_LABEL:[0-9_A-Za-z]+]] 175; SI: [[ELSE_LABEL]]: 176; SI: v_mov_b32_e32 [[TWO:v[0-9]+]], 2 177; SI: buffer_store_dword [[TWO]] 178; SI: [[ENDIF_LABEL]]: 179; SI: s_endpgm 180define void @uniform_if_else(i32 addrspace(1)* nocapture %out, i32 %a) { 181entry: 182 %cmp = icmp eq i32 %a, 0 183 br i1 %cmp, label %if.then, label %if.else 184 185if.then: ; preds = %entry 186 store i32 1, i32 addrspace(1)* %out 187 br label %if.end 188 189if.else: ; preds = %entry 190 store i32 2, i32 addrspace(1)* %out 191 br label %if.end 192 193if.end: ; preds = %if.else, %if.then 194 ret void 195} 196 197; SI-LABEL: {{^}}icmp_2_users: 198; SI: s_cmp_lt_i32 s{{[0-9]+}}, 1 199; SI: s_cbranch_scc1 [[LABEL:[a-zA-Z0-9_]+]] 200; SI: buffer_store_dword 201; SI: [[LABEL]]: 202; SI: s_endpgm 203define void @icmp_2_users(i32 addrspace(1)* %out, i32 %cond) { 204main_body: 205 %0 = icmp sgt i32 %cond, 0 206 %1 = sext i1 %0 to i32 207 br i1 %0, label %IF, label %ENDIF 208 209IF: 210 store i32 %1, i32 addrspace(1)* %out 211 br label %ENDIF 212 213ENDIF: ; preds = %IF, %main_body 214 ret void 215} 216 217; SI-LABEL: {{^}}icmp_users_different_blocks: 218; SI: s_load_dword [[COND:s[0-9]+]] 219; SI: s_cmp_lt_i32 [[COND]], 1 220; SI: s_cbranch_scc1 [[EXIT:[A-Za-z0-9_]+]] 221; SI: v_cmp_lt_i32_e64 [[MASK:s\[[0-9]+:[0-9]+\]]], 0, [[COND]] 222; SI: s_and_b64 vcc, exec, [[MASK]] 223; SI: s_cbranch_vccnz [[EXIT]] 224; SI: buffer_store 225; SI: {{^}}[[EXIT]]: 226; SI: s_endpgm 227define void @icmp_users_different_blocks(i32 %cond, i32 addrspace(1)* %out) { 228bb: 229 %tmp = tail call i32 @llvm.r600.read.tidig.x() #0 230 %tmp1 = icmp sgt i32 %cond, 0 231 br i1 %tmp1, label %bb2, label %bb9 232 233bb2: ; preds = %bb 234 %tmp2 = sext i1 %tmp1 to i32 235 %tmp3 = add i32 %tmp2, %tmp 236 br i1 %tmp1, label %bb9, label %bb7 237 238bb7: ; preds = %bb5 239 store i32 %tmp3, i32 addrspace(1)* %out 240 br label %bb9 241 242bb9: ; preds = %bb8, %bb4 243 ret void 244} 245 246; SI-LABEL: {{^}}uniform_loop: 247; SI: {{^}}[[LOOP_LABEL:[A-Z0-9_a-z]+]]: 248; FIXME: We need to teach SIFixSGPRCopies about uniform branches so we 249; get s_add_i32 here. 250; SI: v_add_i32_e32 [[I:v[0-9]+]], vcc, -1, v{{[0-9]+}} 251; SI: v_cmp_ne_i32_e32 vcc, 0, [[I]] 252; SI: s_and_b64 vcc, exec, vcc 253; SI: s_cbranch_vccnz [[LOOP_LABEL]] 254; SI: s_endpgm 255define void @uniform_loop(i32 addrspace(1)* %out, i32 %a) { 256entry: 257 br label %loop 258 259loop: 260 %i = phi i32 [0, %entry], [%i.i, %loop] 261 %i.i = add i32 %i, 1 262 %cmp = icmp eq i32 %a, %i.i 263 br i1 %cmp, label %done, label %loop 264 265done: 266 ret void 267} 268 269; Test uniform and divergent. 270 271; SI-LABEL: {{^}}uniform_inside_divergent: 272; SI: v_cmp_gt_u32_e32 vcc, 16, v{{[0-9]+}} 273; SI: s_and_saveexec_b64 [[MASK:s\[[0-9]+:[0-9]+\]]], vcc 274; SI: s_xor_b64 [[MASK1:s\[[0-9]+:[0-9]+\]]], exec, [[MASK]] 275; SI: s_cbranch_execz [[ENDIF_LABEL:[0-9_A-Za-z]+]] 276; SI: s_cmp_lg_i32 {{s[0-9]+}}, 0 277; SI: s_cbranch_scc1 [[ENDIF_LABEL]] 278; SI: v_mov_b32_e32 [[ONE:v[0-9]+]], 1 279; SI: buffer_store_dword [[ONE]] 280define void @uniform_inside_divergent(i32 addrspace(1)* %out, i32 %cond) { 281entry: 282 %tid = call i32 @llvm.r600.read.tidig.x() #0 283 %d_cmp = icmp ult i32 %tid, 16 284 br i1 %d_cmp, label %if, label %endif 285 286if: 287 store i32 0, i32 addrspace(1)* %out 288 %u_cmp = icmp eq i32 %cond, 0 289 br i1 %u_cmp, label %if_uniform, label %endif 290 291if_uniform: 292 store i32 1, i32 addrspace(1)* %out 293 br label %endif 294 295endif: 296 ret void 297} 298 299; SI-LABEL: {{^}}divergent_inside_uniform: 300; SI: s_cmp_lg_i32 s{{[0-9]+}}, 0 301; SI: s_cbranch_scc1 [[ENDIF_LABEL:[0-9_A-Za-z]+]] 302; SI: v_cmp_gt_u32_e32 vcc, 16, v{{[0-9]+}} 303; SI: s_and_saveexec_b64 [[MASK:s\[[0-9]+:[0-9]+\]]], vcc 304; SI: s_xor_b64 [[MASK1:s\[[0-9]+:[0-9]+\]]], exec, [[MASK]] 305; SI: v_mov_b32_e32 [[ONE:v[0-9]+]], 1 306; SI: buffer_store_dword [[ONE]] 307; SI: [[ENDIF_LABEL]]: 308; SI: s_endpgm 309define void @divergent_inside_uniform(i32 addrspace(1)* %out, i32 %cond) { 310entry: 311 %u_cmp = icmp eq i32 %cond, 0 312 br i1 %u_cmp, label %if, label %endif 313 314if: 315 store i32 0, i32 addrspace(1)* %out 316 %tid = call i32 @llvm.r600.read.tidig.x() #0 317 %d_cmp = icmp ult i32 %tid, 16 318 br i1 %d_cmp, label %if_uniform, label %endif 319 320if_uniform: 321 store i32 1, i32 addrspace(1)* %out 322 br label %endif 323 324endif: 325 ret void 326} 327 328; SI: {{^}}divergent_if_uniform_if: 329; SI: v_cmp_eq_i32_e32 vcc, 0, v0 330; SI: s_and_saveexec_b64 [[MASK:s\[[0-9]+:[0-9]+\]]], vcc 331; SI: s_xor_b64 [[MASK:s\[[0-9]+:[0-9]+\]]], exec, [[MASK]] 332; SI: v_mov_b32_e32 [[ONE:v[0-9]+]], 1 333; SI: buffer_store_dword [[ONE]] 334; SI: s_or_b64 exec, exec, [[MASK]] 335; SI: s_cmp_lg_i32 s{{[0-9]+}}, 0 336; SI: s_cbranch_scc1 [[EXIT:[A-Z0-9_]+]] 337; SI: v_mov_b32_e32 [[TWO:v[0-9]+]], 2 338; SI: buffer_store_dword [[TWO]] 339; SI: [[EXIT]]: 340; SI: s_endpgm 341define void @divergent_if_uniform_if(i32 addrspace(1)* %out, i32 %cond) { 342entry: 343 %tid = call i32 @llvm.r600.read.tidig.x() #0 344 %d_cmp = icmp eq i32 %tid, 0 345 br i1 %d_cmp, label %if, label %endif 346 347if: 348 store i32 1, i32 addrspace(1)* %out 349 br label %endif 350 351endif: 352 %u_cmp = icmp eq i32 %cond, 0 353 br i1 %u_cmp, label %if_uniform, label %exit 354 355if_uniform: 356 store i32 2, i32 addrspace(1)* %out 357 br label %exit 358 359exit: 360 ret void 361} 362 363declare i32 @llvm.r600.read.tidig.x() #0 364 365attributes #0 = { readnone } 366