1; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2; RUN: llc -amdgpu-scalarize-global-loads=false -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefix=SI -check-prefix=FUNC -check-prefix=VI %s 3 4; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn--amdhsa -mcpu=fiji -denormal-fp-math-f32=ieee < %s | FileCheck -check-prefix=GCN -check-prefix=VI %s 5; RUN: llc -amdgpu-scalarize-global-loads=false -mtriple=amdgcn--amdhsa -mcpu=gfx1030 -denormal-fp-math-f32=ieee < %s | FileCheck -check-prefix=GCN -check-prefix=GFX1030 %s 6 7; RUN: llc -amdgpu-scalarize-global-loads=false -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s 8 9; FUNC-LABEL: {{^}}udiv_i32: 10; EG-NOT: SETGE_INT 11; EG: CF_END 12 13; SI: v_rcp_iflag_f32_e32 14define amdgpu_kernel void @udiv_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { 15 %b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1 16 %a = load i32, i32 addrspace(1)* %in 17 %b = load i32, i32 addrspace(1)* %b_ptr 18 %result = udiv i32 %a, %b 19 store i32 %result, i32 addrspace(1)* %out 20 ret void 21} 22 23; FUNC-LABEL: {{^}}s_udiv_i32: 24; SI: v_rcp_iflag_f32_e32 25define amdgpu_kernel void @s_udiv_i32(i32 addrspace(1)* %out, i32 %a, i32 %b) { 26 %result = udiv i32 %a, %b 27 store i32 %result, i32 addrspace(1)* %out 28 ret void 29} 30 31 32; The code generated by udiv is long and complex and may frequently 33; change. The goal of this test is to make sure the ISel doesn't fail 34; when it gets a v4i32 udiv 35 36; FUNC-LABEL: {{^}}udiv_v2i32: 37; EG: CF_END 38 39; SI: v_rcp_iflag_f32_e32 40; SI: v_rcp_iflag_f32_e32 41; SI: s_endpgm 42define amdgpu_kernel void @udiv_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { 43 %b_ptr = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %in, i32 1 44 %a = load <2 x i32>, <2 x i32> addrspace(1) * %in 45 %b = load <2 x i32>, <2 x i32> addrspace(1) * %b_ptr 46 %result = udiv <2 x i32> %a, %b 47 store <2 x i32> %result, <2 x i32> addrspace(1)* %out 48 ret void 49} 50 51; FUNC-LABEL: {{^}}udiv_v4i32: 52; EG: CF_END 53; SI: s_endpgm 54define amdgpu_kernel void @udiv_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { 55 %b_ptr = getelementptr <4 x i32>, <4 x i32> addrspace(1)* %in, i32 1 56 %a = load <4 x i32>, <4 x i32> addrspace(1) * %in 57 %b = load <4 x i32>, <4 x i32> addrspace(1) * %b_ptr 58 %result = udiv <4 x i32> %a, %b 59 store <4 x i32> %result, <4 x i32> addrspace(1)* %out 60 ret void 61} 62 63; FUNC-LABEL: {{^}}udiv_i32_div_pow2: 64; SI: buffer_load_dword [[VAL:v[0-9]+]] 65; SI: v_lshrrev_b32_e32 [[RESULT:v[0-9]+]], 4, [[VAL]] 66; SI: buffer_store_dword [[RESULT]] 67define amdgpu_kernel void @udiv_i32_div_pow2(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { 68 %b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1 69 %a = load i32, i32 addrspace(1)* %in 70 %result = udiv i32 %a, 16 71 store i32 %result, i32 addrspace(1)* %out 72 ret void 73} 74 75; FUNC-LABEL: {{^}}udiv_i32_div_k_even: 76; SI-DAG: buffer_load_dword [[VAL:v[0-9]+]] 77; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0xfabbd9c1 78; SI: v_mul_hi_u32 [[MULHI:v[0-9]+]], [[VAL]], [[K]] 79; SI: v_lshrrev_b32_e32 [[RESULT:v[0-9]+]], 25, [[MULHI]] 80; SI: buffer_store_dword [[RESULT]] 81define amdgpu_kernel void @udiv_i32_div_k_even(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { 82 %b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1 83 %a = load i32, i32 addrspace(1)* %in 84 %result = udiv i32 %a, 34259182 85 store i32 %result, i32 addrspace(1)* %out 86 ret void 87} 88 89; FUNC-LABEL: {{^}}udiv_i32_div_k_odd: 90; SI-DAG: buffer_load_dword [[VAL:v[0-9]+]] 91; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0x7d5deca3 92; SI: v_mul_hi_u32 [[MULHI:v[0-9]+]], [[VAL]], [[K]] 93; SI: v_lshrrev_b32_e32 [[RESULT:v[0-9]+]], 24, [[MULHI]] 94; SI: buffer_store_dword [[RESULT]] 95define amdgpu_kernel void @udiv_i32_div_k_odd(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { 96 %b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1 97 %a = load i32, i32 addrspace(1)* %in 98 %result = udiv i32 %a, 34259183 99 store i32 %result, i32 addrspace(1)* %out 100 ret void 101} 102 103; FUNC-LABEL: {{^}}v_udiv_i8: 104; SI: v_rcp_iflag_f32 105; SI: v_and_b32_e32 [[TRUNC:v[0-9]+]], 0xff, v{{[0-9]+}} 106; SI: buffer_store_dword [[TRUNC]] 107define amdgpu_kernel void @v_udiv_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) { 108 %den_ptr = getelementptr i8, i8 addrspace(1)* %in, i8 1 109 %num = load i8, i8 addrspace(1) * %in 110 %den = load i8, i8 addrspace(1) * %den_ptr 111 %result = udiv i8 %num, %den 112 %result.ext = zext i8 %result to i32 113 store i32 %result.ext, i32 addrspace(1)* %out 114 ret void 115} 116 117; FUNC-LABEL: {{^}}v_udiv_i16: 118; SI: v_rcp_iflag_f32 119; SI: v_and_b32_e32 [[TRUNC:v[0-9]+]], 0xffff, v{{[0-9]+}} 120; SI: buffer_store_dword [[TRUNC]] 121define amdgpu_kernel void @v_udiv_i16(i32 addrspace(1)* %out, i16 addrspace(1)* %in) { 122 %den_ptr = getelementptr i16, i16 addrspace(1)* %in, i16 1 123 %num = load i16, i16 addrspace(1) * %in 124 %den = load i16, i16 addrspace(1) * %den_ptr 125 %result = udiv i16 %num, %den 126 %result.ext = zext i16 %result to i32 127 store i32 %result.ext, i32 addrspace(1)* %out 128 ret void 129} 130 131; FUNC-LABEL: {{^}}v_udiv_i23: 132; SI: v_rcp_iflag_f32 133; SI: v_and_b32_e32 [[TRUNC:v[0-9]+]], 0x7fffff, v{{[0-9]+}} 134; SI: buffer_store_dword [[TRUNC]] 135define amdgpu_kernel void @v_udiv_i23(i32 addrspace(1)* %out, i23 addrspace(1)* %in) { 136 %den_ptr = getelementptr i23, i23 addrspace(1)* %in, i23 1 137 %num = load i23, i23 addrspace(1) * %in 138 %den = load i23, i23 addrspace(1) * %den_ptr 139 %result = udiv i23 %num, %den 140 %result.ext = zext i23 %result to i32 141 store i32 %result.ext, i32 addrspace(1)* %out 142 ret void 143} 144 145; FUNC-LABEL: {{^}}v_udiv_i24: 146; SI-NOT: v_rcp_f32 147define amdgpu_kernel void @v_udiv_i24(i32 addrspace(1)* %out, i24 addrspace(1)* %in) { 148 %den_ptr = getelementptr i24, i24 addrspace(1)* %in, i24 1 149 %num = load i24, i24 addrspace(1) * %in 150 %den = load i24, i24 addrspace(1) * %den_ptr 151 %result = udiv i24 %num, %den 152 %result.ext = zext i24 %result to i32 153 store i32 %result.ext, i32 addrspace(1)* %out 154 ret void 155} 156 157; FUNC-LABEL: @scalarize_mulhu_4xi32 158; SI: v_mul_hi_u32 159; SI: v_mul_hi_u32 160; SI: v_mul_hi_u32 161; SI: v_mul_hi_u32 162 163define amdgpu_kernel void @scalarize_mulhu_4xi32(<4 x i32> addrspace(1)* nocapture readonly %in, <4 x i32> addrspace(1)* nocapture %out) { 164 %1 = load <4 x i32>, <4 x i32> addrspace(1)* %in, align 16 165 %2 = udiv <4 x i32> %1, <i32 53668, i32 53668, i32 53668, i32 53668> 166 store <4 x i32> %2, <4 x i32> addrspace(1)* %out, align 16 167 ret void 168} 169 170; FUNC-LABEL: {{^}}test_udiv2: 171; SI: s_lshr_b32 s{{[0-9]}}, s{{[0-9]}}, 1 172define amdgpu_kernel void @test_udiv2(i32 %p) { 173 %i = udiv i32 %p, 2 174 store volatile i32 %i, i32 addrspace(1)* undef 175 ret void 176} 177 178; FUNC-LABEL: {{^}}test_udiv_3_mulhu: 179; SI: v_mov_b32_e32 v{{[0-9]+}}, 0xaaaaaaab 180; SI: v_mul_hi_u32 v0, {{s[0-9]+}}, {{v[0-9]+}} 181; SI-NEXT: v_lshrrev_b32_e32 v0, 1, v0 182define amdgpu_kernel void @test_udiv_3_mulhu(i32 %p) { 183 %i = udiv i32 %p, 3 184 store volatile i32 %i, i32 addrspace(1)* undef 185 ret void 186} 187 188; GCN-LABEL: {{^}}fdiv_test_denormals 189; VI: v_mad_f32 v{{[0-9]+}}, -v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} 190; GFX1030: v_fmac_f32_e64 v{{[0-9]+}}, -v{{[0-9]+}}, v{{[0-9]+}} 191define amdgpu_kernel void @fdiv_test_denormals(i8 addrspace(1)* nocapture readonly %arg) { 192bb: 193 %tmp = load i8, i8 addrspace(1)* null, align 1 194 %tmp1 = sext i8 %tmp to i32 195 %tmp2 = getelementptr inbounds i8, i8 addrspace(1)* %arg, i64 undef 196 %tmp3 = load i8, i8 addrspace(1)* %tmp2, align 1 197 %tmp4 = sext i8 %tmp3 to i32 198 %tmp5 = sdiv i32 %tmp1, %tmp4 199 %tmp6 = trunc i32 %tmp5 to i8 200 store i8 %tmp6, i8 addrspace(1)* null, align 1 201 ret void 202} 203 204define i64 @v_test_udiv64_mulhi_fold(i64 %arg) { 205; GCN-LABEL: v_test_udiv64_mulhi_fold 206; GFX1030: s_add_u32 [[VAL:s[0-9]+]], 0x4237, s{{[0-9]+}} 207; GFX1030-NOT: s_mul_hi_u32 208; GFX1030: v_add_co_u32 v{{[0-9]+}}, [[VAL]], 0xa9000000, [[VAL]] 209 %d = udiv i64 %arg, 100000 210 ret i64 %d 211} 212