1; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
2; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s
3
4
5declare i32 @llvm.r600.read.tidig.x() readnone
6
7; FUNC-LABEL: {{^}}test_sub_i32:
8; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
9
10; SI: v_subrev_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
11define void @test_sub_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) {
12  %b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1
13  %a = load i32, i32 addrspace(1)* %in
14  %b = load i32, i32 addrspace(1)* %b_ptr
15  %result = sub i32 %a, %b
16  store i32 %result, i32 addrspace(1)* %out
17  ret void
18}
19
20
21; FUNC-LABEL: {{^}}test_sub_v2i32:
22; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
23; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
24
25; SI: v_sub_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
26; SI: v_sub_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
27
28define void @test_sub_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) {
29  %b_ptr = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %in, i32 1
30  %a = load <2 x i32>, <2 x i32> addrspace(1) * %in
31  %b = load <2 x i32>, <2 x i32> addrspace(1) * %b_ptr
32  %result = sub <2 x i32> %a, %b
33  store <2 x i32> %result, <2 x i32> addrspace(1)* %out
34  ret void
35}
36
37; FUNC-LABEL: {{^}}test_sub_v4i32:
38; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
39; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
40; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
41; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
42
43; SI: v_sub_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
44; SI: v_sub_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
45; SI: v_sub_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
46; SI: v_sub_i32_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}}
47
48define void @test_sub_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) {
49  %b_ptr = getelementptr <4 x i32>, <4 x i32> addrspace(1)* %in, i32 1
50  %a = load <4 x i32>, <4 x i32> addrspace(1) * %in
51  %b = load <4 x i32>, <4 x i32> addrspace(1) * %b_ptr
52  %result = sub <4 x i32> %a, %b
53  store <4 x i32> %result, <4 x i32> addrspace(1)* %out
54  ret void
55}
56
57; FUNC-LABEL: {{^}}s_sub_i64:
58; SI: s_sub_u32
59; SI: s_subb_u32
60
61; EG: MEM_RAT_CACHELESS STORE_RAW [[LO:T[0-9]+\.[XYZW]]]
62; EG: MEM_RAT_CACHELESS STORE_RAW [[HI:T[0-9]+\.[XYZW]]]
63; EG-DAG: SUB_INT {{[* ]*}}[[LO]]
64; EG-DAG: SUBB_UINT
65; EG-DAG: SUB_INT
66; EG-DAG: SUB_INT {{[* ]*}}[[HI]]
67; EG-NOT: SUB
68define void @s_sub_i64(i64 addrspace(1)* noalias %out, i64 %a, i64 %b) nounwind {
69  %result = sub i64 %a, %b
70  store i64 %result, i64 addrspace(1)* %out, align 8
71  ret void
72}
73
74; FUNC-LABEL: {{^}}v_sub_i64:
75; SI: v_sub_i32_e32
76; SI: v_subb_u32_e32
77
78; EG: MEM_RAT_CACHELESS STORE_RAW [[LO:T[0-9]+\.[XYZW]]]
79; EG: MEM_RAT_CACHELESS STORE_RAW [[HI:T[0-9]+\.[XYZW]]]
80; EG-DAG: SUB_INT {{[* ]*}}[[LO]]
81; EG-DAG: SUBB_UINT
82; EG-DAG: SUB_INT
83; EG-DAG: SUB_INT {{[* ]*}}[[HI]]
84; EG-NOT: SUB
85define void @v_sub_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %inA, i64 addrspace(1)* noalias %inB) nounwind {
86  %tid = call i32 @llvm.r600.read.tidig.x() readnone
87  %a_ptr = getelementptr i64, i64 addrspace(1)* %inA, i32 %tid
88  %b_ptr = getelementptr i64, i64 addrspace(1)* %inB, i32 %tid
89  %a = load i64, i64 addrspace(1)* %a_ptr
90  %b = load i64, i64 addrspace(1)* %b_ptr
91  %result = sub i64 %a, %b
92  store i64 %result, i64 addrspace(1)* %out, align 8
93  ret void
94}
95
96; FUNC-LABEL: {{^}}v_test_sub_v2i64:
97; SI: v_sub_i32_e32
98; SI: v_subb_u32_e32
99; SI: v_sub_i32_e32
100; SI: v_subb_u32_e32
101define void @v_test_sub_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> addrspace(1)* noalias %inA, <2 x i64> addrspace(1)* noalias %inB) {
102  %tid = call i32 @llvm.r600.read.tidig.x() readnone
103  %a_ptr = getelementptr <2 x i64>, <2 x i64> addrspace(1)* %inA, i32 %tid
104  %b_ptr = getelementptr <2 x i64>, <2 x i64> addrspace(1)* %inB, i32 %tid
105  %a = load <2 x i64>, <2 x i64> addrspace(1)* %a_ptr
106  %b = load <2 x i64>, <2 x i64> addrspace(1)* %b_ptr
107  %result = sub <2 x i64> %a, %b
108  store <2 x i64> %result, <2 x i64> addrspace(1)* %out
109  ret void
110}
111
112; FUNC-LABEL: {{^}}v_test_sub_v4i64:
113; SI: v_sub_i32_e32
114; SI: v_subb_u32_e32
115; SI: v_sub_i32_e32
116; SI: v_subb_u32_e32
117; SI: v_sub_i32_e32
118; SI: v_subb_u32_e32
119; SI: v_sub_i32_e32
120; SI: v_subb_u32_e32
121define void @v_test_sub_v4i64(<4 x i64> addrspace(1)* %out, <4 x i64> addrspace(1)* noalias %inA, <4 x i64> addrspace(1)* noalias %inB) {
122  %tid = call i32 @llvm.r600.read.tidig.x() readnone
123  %a_ptr = getelementptr <4 x i64>, <4 x i64> addrspace(1)* %inA, i32 %tid
124  %b_ptr = getelementptr <4 x i64>, <4 x i64> addrspace(1)* %inB, i32 %tid
125  %a = load <4 x i64>, <4 x i64> addrspace(1)* %a_ptr
126  %b = load <4 x i64>, <4 x i64> addrspace(1)* %b_ptr
127  %result = sub <4 x i64> %a, %b
128  store <4 x i64> %result, <4 x i64> addrspace(1)* %out
129  ret void
130}
131