1; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s 2; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG -check-prefix=FUNC %s 3 4 5declare i32 @llvm.r600.read.tidig.x() readnone 6 7; FUNC-LABEL: {{^}}test_sub_i32: 8; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 9 10; SI: v_subrev_i32_e32 v{{[0-9]+, vcc, v[0-9]+, v[0-9]+}} 11define void @test_sub_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { 12 %b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1 13 %a = load i32, i32 addrspace(1)* %in 14 %b = load i32, i32 addrspace(1)* %b_ptr 15 %result = sub i32 %a, %b 16 store i32 %result, i32 addrspace(1)* %out 17 ret void 18} 19 20 21; FUNC-LABEL: {{^}}test_sub_v2i32: 22; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 23; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 24 25; SI: v_sub_i32_e32 v{{[0-9]+, vcc, v[0-9]+, v[0-9]+}} 26; SI: v_sub_i32_e32 v{{[0-9]+, vcc, v[0-9]+, v[0-9]+}} 27 28define void @test_sub_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) { 29 %b_ptr = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %in, i32 1 30 %a = load <2 x i32>, <2 x i32> addrspace(1) * %in 31 %b = load <2 x i32>, <2 x i32> addrspace(1) * %b_ptr 32 %result = sub <2 x i32> %a, %b 33 store <2 x i32> %result, <2 x i32> addrspace(1)* %out 34 ret void 35} 36 37; FUNC-LABEL: {{^}}test_sub_v4i32: 38; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 39; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 40; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 41; EG: SUB_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 42 43; SI: v_sub_i32_e32 v{{[0-9]+, vcc, v[0-9]+, v[0-9]+}} 44; SI: v_sub_i32_e32 v{{[0-9]+, vcc, v[0-9]+, v[0-9]+}} 45; SI: v_sub_i32_e32 v{{[0-9]+, vcc, v[0-9]+, v[0-9]+}} 46; SI: v_sub_i32_e32 v{{[0-9]+, vcc, v[0-9]+, v[0-9]+}} 47 48define void @test_sub_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { 49 %b_ptr = getelementptr <4 x i32>, <4 x i32> addrspace(1)* %in, i32 1 50 %a = load <4 x i32>, <4 x i32> addrspace(1) * %in 51 %b = load <4 x i32>, <4 x i32> addrspace(1) * %b_ptr 52 %result = sub <4 x i32> %a, %b 53 store <4 x i32> %result, <4 x i32> addrspace(1)* %out 54 ret void 55} 56 57; VI: v_sub_i16_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 58define void @test_sub_i16(i16 addrspace(1)* %out, i16 addrspace(1)* %in) { 59 %b_ptr = getelementptr i16, i16 addrspace(1)* %in, i16 1 60 %a = load i16, i16 addrspace(1)* %in 61 %b = load i16, i16 addrspace(1)* %b_ptr 62 %result = sub i16 %a, %b 63 store i16 %result, i16 addrspace(1)* %out 64 ret void 65} 66 67; FUNC-LABEL: {{^}}test_sub_v2i16: 68 69; VI: v_sub_i16_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 70; VI: v_sub_i16_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 71 72define void @test_sub_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) { 73 %b_ptr = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %in, i16 1 74 %a = load <2 x i16>, <2 x i16> addrspace(1) * %in 75 %b = load <2 x i16>, <2 x i16> addrspace(1) * %b_ptr 76 %result = sub <2 x i16> %a, %b 77 store <2 x i16> %result, <2 x i16> addrspace(1)* %out 78 ret void 79} 80 81; FUNC-LABEL: {{^}}test_sub_v4i16: 82 83; VI: v_sub_i16_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 84; VI: v_sub_i16_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 85; VI: v_sub_i16_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 86; VI: v_sub_i16_e32 v{{[0-9]+, v[0-9]+, v[0-9]+}} 87 88define void @test_sub_v4i16(<4 x i16> addrspace(1)* %out, <4 x i16> addrspace(1)* %in) { 89 %b_ptr = getelementptr <4 x i16>, <4 x i16> addrspace(1)* %in, i16 1 90 %a = load <4 x i16>, <4 x i16> addrspace(1) * %in 91 %b = load <4 x i16>, <4 x i16> addrspace(1) * %b_ptr 92 %result = sub <4 x i16> %a, %b 93 store <4 x i16> %result, <4 x i16> addrspace(1)* %out 94 ret void 95} 96 97; FUNC-LABEL: {{^}}s_sub_i64: 98; SI: s_sub_u32 99; SI: s_subb_u32 100 101; EG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XY 102; EG-DAG: SUB_INT {{[* ]*}} 103; EG-DAG: SUBB_UINT 104; EG-DAG: SUB_INT 105; EG-DAG: SUB_INT {{[* ]*}} 106define void @s_sub_i64(i64 addrspace(1)* noalias %out, i64 %a, i64 %b) nounwind { 107 %result = sub i64 %a, %b 108 store i64 %result, i64 addrspace(1)* %out, align 8 109 ret void 110} 111 112; FUNC-LABEL: {{^}}v_sub_i64: 113; SI: v_sub_i32_e32 114; SI: v_subb_u32_e32 115 116; EG: MEM_RAT_CACHELESS STORE_RAW T{{[0-9]+}}.XY 117; EG-DAG: SUB_INT {{[* ]*}} 118; EG-DAG: SUBB_UINT 119; EG-DAG: SUB_INT 120; EG-DAG: SUB_INT {{[* ]*}} 121define void @v_sub_i64(i64 addrspace(1)* noalias %out, i64 addrspace(1)* noalias %inA, i64 addrspace(1)* noalias %inB) nounwind { 122 %tid = call i32 @llvm.r600.read.tidig.x() readnone 123 %a_ptr = getelementptr i64, i64 addrspace(1)* %inA, i32 %tid 124 %b_ptr = getelementptr i64, i64 addrspace(1)* %inB, i32 %tid 125 %a = load i64, i64 addrspace(1)* %a_ptr 126 %b = load i64, i64 addrspace(1)* %b_ptr 127 %result = sub i64 %a, %b 128 store i64 %result, i64 addrspace(1)* %out, align 8 129 ret void 130} 131 132; FUNC-LABEL: {{^}}v_test_sub_v2i64: 133; SI: v_sub_i32_e32 134; SI: v_subb_u32_e32 135; SI: v_sub_i32_e32 136; SI: v_subb_u32_e32 137define void @v_test_sub_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> addrspace(1)* noalias %inA, <2 x i64> addrspace(1)* noalias %inB) { 138 %tid = call i32 @llvm.r600.read.tidig.x() readnone 139 %a_ptr = getelementptr <2 x i64>, <2 x i64> addrspace(1)* %inA, i32 %tid 140 %b_ptr = getelementptr <2 x i64>, <2 x i64> addrspace(1)* %inB, i32 %tid 141 %a = load <2 x i64>, <2 x i64> addrspace(1)* %a_ptr 142 %b = load <2 x i64>, <2 x i64> addrspace(1)* %b_ptr 143 %result = sub <2 x i64> %a, %b 144 store <2 x i64> %result, <2 x i64> addrspace(1)* %out 145 ret void 146} 147 148; FUNC-LABEL: {{^}}v_test_sub_v4i64: 149; SI: v_subrev_i32_e32 150; SI: v_subb_u32_e32 151; SI: v_subrev_i32_e32 152; SI: v_subb_u32_e32 153; SI: v_subrev_i32_e32 154; SI: v_subb_u32_e32 155; SI: v_subrev_i32_e32 156; SI: v_subb_u32_e32 157define void @v_test_sub_v4i64(<4 x i64> addrspace(1)* %out, <4 x i64> addrspace(1)* noalias %inA, <4 x i64> addrspace(1)* noalias %inB) { 158 %tid = call i32 @llvm.r600.read.tidig.x() readnone 159 %a_ptr = getelementptr <4 x i64>, <4 x i64> addrspace(1)* %inA, i32 %tid 160 %b_ptr = getelementptr <4 x i64>, <4 x i64> addrspace(1)* %inB, i32 %tid 161 %a = load <4 x i64>, <4 x i64> addrspace(1)* %a_ptr 162 %b = load <4 x i64>, <4 x i64> addrspace(1)* %b_ptr 163 %result = sub <4 x i64> %a, %b 164 store <4 x i64> %result, <4 x i64> addrspace(1)* %out 165 ret void 166} 167