1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs | FileCheck -check-prefix=GCN %s
3
4; FIXME: The MUBUF loads in this test output are incorrect, their SOffset
5; should use the frame offset register, not the ABI stack pointer register. We
6; rely on the frame index argument of MUBUF stack accesses to survive until PEI
7; so we can fix up the SOffset to use the correct frame register in
8; eliminateFrameIndex. Some things like LocalStackSlotAllocation can lift the
9; frame index up into something (e.g. `v_add_nc_u32`) that we cannot fold back
10; into the MUBUF instruction, and so we end up emitting an incorrect offset.
11; Fixing this may involve adding stack access pseudos so that we don't have to
12; speculatively refer to the ABI stack pointer register at all.
13
14; An assert was hit when frame offset register was used to address FrameIndex.
15define amdgpu_kernel void @kernel_background_evaluate(float addrspace(5)* %kg, <4 x i32> addrspace(1)* %input, <4 x float> addrspace(1)* %output, i32 %i) {
16; GCN-LABEL: kernel_background_evaluate:
17; GCN:       ; %bb.0: ; %entry
18; GCN-NEXT:    s_load_dword s6, s[0:1], 0x24
19; GCN-NEXT:    s_mov_b32 s36, SCRATCH_RSRC_DWORD0
20; GCN-NEXT:    s_mov_b32 s37, SCRATCH_RSRC_DWORD1
21; GCN-NEXT:    s_mov_b32 s38, -1
22; GCN-NEXT:    s_mov_b32 s39, 0x31c16000
23; GCN-NEXT:    s_add_u32 s36, s36, s3
24; GCN-NEXT:    s_addc_u32 s37, s37, 0
25; GCN-NEXT:    v_mov_b32_e32 v1, 0x2000
26; GCN-NEXT:    v_mov_b32_e32 v2, 0x4000
27; GCN-NEXT:    v_mov_b32_e32 v3, 0
28; GCN-NEXT:    v_mov_b32_e32 v4, 0x400000
29; GCN-NEXT:    s_mov_b64 s[0:1], s[36:37]
30; GCN-NEXT:    s_mov_b64 s[2:3], s[38:39]
31; GCN-NEXT:    s_mov_b32 s32, 0xc0000
32; GCN-NEXT:    v_add_nc_u32_e64 v40, 4, 0x4000
33; GCN-NEXT:    ; implicit-def: $vcc_hi
34; GCN-NEXT:    s_getpc_b64 s[4:5]
35; GCN-NEXT:    s_add_u32 s4, s4, svm_eval_nodes@rel32@lo+4
36; GCN-NEXT:    s_addc_u32 s5, s5, svm_eval_nodes@rel32@hi+4
37; GCN-NEXT:    s_waitcnt lgkmcnt(0)
38; GCN-NEXT:    v_mov_b32_e32 v0, s6
39; GCN-NEXT:    s_swappc_b64 s[30:31], s[4:5]
40; GCN-NEXT:    v_cmp_ne_u32_e32 vcc_lo, 0, v0
41; GCN-NEXT:    s_and_saveexec_b32 s0, vcc_lo
42; GCN-NEXT:    s_cbranch_execz BB0_2
43; GCN-NEXT:  ; %bb.1: ; %if.then4.i
44; GCN-NEXT:    buffer_load_dword v0, v40, s[36:39], s32 offen
45; GCN-NEXT:    buffer_load_dword v1, v40, s[36:39], s32 offen offset:4
46; GCN-NEXT:    s_waitcnt vmcnt(0)
47; GCN-NEXT:    v_add_nc_u32_e32 v0, v1, v0
48; GCN-NEXT:    v_mul_lo_u32 v0, 0x41c64e6d, v0
49; GCN-NEXT:    v_add_nc_u32_e32 v0, 0x3039, v0
50; GCN-NEXT:    buffer_store_dword v0, v0, s[36:39], 0 offen
51; GCN-NEXT:  BB0_2: ; %shader_eval_surface.exit
52; GCN-NEXT:    s_endpgm
53entry:
54  %sd = alloca < 1339 x i32>, align 8192, addrspace(5)
55  %state = alloca <4 x i32>, align 16, addrspace(5)
56  %rslt = call i32 @svm_eval_nodes(float addrspace(5)* %kg, <1339 x i32> addrspace(5)* %sd, <4 x i32> addrspace(5)* %state, i32 0, i32 4194304)
57  %cmp = icmp eq i32 %rslt, 0
58  br i1 %cmp, label %shader_eval_surface.exit, label %if.then4.i
59
60if.then4.i:                                       ; preds = %entry
61  %rng_hash.i.i = getelementptr inbounds < 4 x i32>, <4 x i32> addrspace(5)* %state, i32 0, i32 1
62  %tmp0 = load i32, i32 addrspace(5)* %rng_hash.i.i, align 4
63  %rng_offset.i.i = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %state, i32 0, i32 2
64  %tmp1 = load i32, i32 addrspace(5)* %rng_offset.i.i, align 4
65  %add.i.i = add i32 %tmp1, %tmp0
66  %add1.i.i = add i32 %add.i.i, 0
67  %mul.i.i.i.i = mul i32 %add1.i.i, 1103515245
68  %add.i.i.i.i = add i32 %mul.i.i.i.i, 12345
69  store i32 %add.i.i.i.i, i32 addrspace(5)* undef, align 16
70  br label %shader_eval_surface.exit
71
72shader_eval_surface.exit:                         ; preds = %entry
73  ret void
74}
75
76declare hidden i32 @svm_eval_nodes(float addrspace(5)*, <1339 x i32> addrspace(5)*, <4 x i32> addrspace(5)*, i32, i32) local_unnamed_addr
77