1# RUN: llc -o - %s -mtriple=amdgcn-- -mcpu=fiji -verify-machineinstrs -run-pass=greedy,virtregrewriter | FileCheck %s 2--- | 3 define amdgpu_kernel void @func0() #0 { ret void } 4 define amdgpu_kernel void @func1() #0 { ret void } 5 define amdgpu_kernel void @splitHoist() #0 { ret void } 6 7 attributes #0 = { "amdgpu-num-sgpr"="12" } 8... 9--- 10# Make sure we only get a single spill+reload even if liverange splitting 11# created a sequence of multiple copy instructions. 12# CHECK-LABEL: name: func0 13# CHECK: SI_SPILL_S128_SAVE 14# CHECK-NOT: SI_SPILL_S128_SAVE 15# CHECK: S_NOP 0 16# CHECK: SI_SPILL_S128_RESTORE 17# CHECK-NOT: SI_SPILL_S128_RESTORE 18name: func0 19body: | 20 bb.0: 21 S_NOP 0, implicit-def undef %0.sub0 : sreg_128 22 S_NOP 0, implicit-def %0.sub3 : sreg_128 23 24 ; Clobber registers 25 S_NOP 0, implicit-def dead %sgpr0, implicit-def dead %sgpr1, implicit-def dead %sgpr2, implicit-def dead %sgpr3, implicit-def dead %sgpr4, implicit-def dead %sgpr5, implicit-def dead %sgpr6, implicit-def dead %sgpr7, implicit-def dead %sgpr8, implicit-def dead %sgpr9, implicit-def dead %sgpr10, implicit-def dead %sgpr11 26 27 S_NOP 0, implicit %0.sub0 28 S_NOP 0, implicit %0.sub3 29 S_NOP 0, implicit %0.sub0 30 S_NOP 0, implicit %0.sub3 31... 32--- 33# LiveRange splitting should split this into 2 intervals with the second getting 34# allocated to sgpr0_sgpr1 and the first to something else so we see two copies 35# in between for the two subregisters that are alive. 36# CHECK-LABEL: name: func1 37# CHECK: [[REG0:%sgpr[0-9]+]] = COPY %sgpr0 38# CHECK: [[REG1:%sgpr[0-9]+]] = COPY %sgpr2 39# CHECK: S_NOP 0 40# CHECK: S_NOP 0, implicit [[REG0]] 41# CHECK: S_NOP 0, implicit [[REG1]] 42# CHECK: %sgpr0 = COPY [[REG0]] 43# CHECK: %sgpr2 = COPY [[REG1]] 44# CHECK: S_NOP 45# CHECK: S_NOP 0, implicit %sgpr0 46# CHECK: S_NOP 0, implicit %sgpr2 47name: func1 48tracksRegLiveness: true 49body: | 50 bb.0: 51 liveins: %sgpr0, %sgpr1, %sgpr2 52 undef %0.sub0 : sreg_128 = COPY %sgpr0 53 %0.sub2 = COPY %sgpr2 54 55 S_NOP 0, implicit-def dead %sgpr0, implicit-def dead %sgpr1 56 57 S_NOP 0, implicit %0.sub0 58 S_NOP 0, implicit %0.sub2 59 60 ; Clobber everything but sgpr0-sgpr3 61 S_NOP 0, implicit-def dead %sgpr4, implicit-def dead %sgpr5, implicit-def dead %sgpr6, implicit-def dead %sgpr7, implicit-def dead %sgpr8, implicit-def dead %sgpr9, implicit-def dead %sgpr10, implicit-def dead %sgpr11, implicit-def dead %sgpr12, implicit-def dead %sgpr13, implicit-def dead %sgpr14, implicit-def dead %sgpr15, implicit-def dead %vcc_lo, implicit-def dead %vcc_hi 62 63 S_NOP 0, implicit %0.sub0 64 S_NOP 0, implicit %0.sub2 65... 66--- 67# Check that copy hoisting out of loops works. This mainly should not crash the 68# compiler when it hoists a subreg copy sequence. 69# CHECK-LABEL: name: splitHoist 70# CHECK: S_NOP 0, implicit-def %sgpr0 71# CHECK: S_NOP 0, implicit-def %sgpr3 72# CHECK-NEXT: SI_SPILL_S128_SAVE 73name: splitHoist 74tracksRegLiveness: true 75body: | 76 bb.0: 77 successors: %bb.1, %bb.2 78 S_NOP 0, implicit-def undef %0.sub0 : sreg_128 79 S_NOP 0, implicit-def %0.sub3 : sreg_128 80 81 S_CBRANCH_VCCNZ %bb.1, implicit undef %vcc 82 S_BRANCH %bb.2 83 84 bb.1: 85 successors: %bb.1, %bb.3 86 S_NOP 0, implicit %0.sub0 87 88 ; Clobber registers 89 S_NOP 0, implicit-def dead %sgpr0, implicit-def dead %sgpr1, implicit-def dead %sgpr2, implicit-def dead %sgpr3, implicit-def dead %sgpr4, implicit-def dead %sgpr5, implicit-def dead %sgpr6, implicit-def dead %sgpr7, implicit-def dead %sgpr8, implicit-def dead %sgpr9, implicit-def dead %sgpr10, implicit-def dead %sgpr11 90 91 S_CBRANCH_VCCNZ %bb.1, implicit undef %vcc 92 S_BRANCH %bb.3 93 94 bb.2: 95 successors: %bb.3 96 ; Clobber registers 97 S_NOP 0, implicit-def dead %sgpr0, implicit-def dead %sgpr1, implicit-def dead %sgpr2, implicit-def dead %sgpr3, implicit-def dead %sgpr4, implicit-def dead %sgpr5, implicit-def dead %sgpr6, implicit-def dead %sgpr7, implicit-def dead %sgpr8, implicit-def dead %sgpr9, implicit-def dead %sgpr10, implicit-def dead %sgpr11 98 S_BRANCH %bb.3 99 100 bb.3: 101 S_NOP 0, implicit %0.sub0 102 S_NOP 0, implicit %0.sub3 103 S_NOP 0, implicit %0.sub0 104 S_NOP 0, implicit %0.sub3 105... 106