1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=greedy -o - -verify-machineinstrs %s | FileCheck -check-prefix=RA %s
3# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=greedy,virtregrewriter,post-RA-sched -o - -verify-machineinstrs %s | FileCheck -check-prefix=VR %s
4
5---
6name:            splitkit_copy_bundle
7tracksRegLiveness: true
8machineFunctionInfo:
9  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
10  stackPtrOffsetReg: '$sgpr32'
11body:             |
12  ; RA-LABEL: name: splitkit_copy_bundle
13  ; RA: bb.0:
14  ; RA:   successors: %bb.1(0x80000000)
15  ; RA:   [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
16  ; RA:   [[DEF1:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
17  ; RA:   undef %5.sub1:sgpr_1024 = S_MOV_B32 -1
18  ; RA:   %5.sub0:sgpr_1024 = S_MOV_B32 -1
19  ; RA:   undef %4.sub0_sub1:sgpr_1024 = COPY %5.sub0_sub1
20  ; RA:   undef %3.sub0:sgpr_1024 = S_MOV_B32 0
21  ; RA: bb.1:
22  ; RA:   successors: %bb.2(0x80000000)
23  ; RA:   undef %6.sub0_sub1:sgpr_1024 = COPY %4.sub0_sub1
24  ; RA:   %6.sub2:sgpr_1024 = COPY %6.sub0
25  ; RA:   %6.sub3:sgpr_1024 = COPY %6.sub1
26  ; RA:   %6.sub4:sgpr_1024 = COPY %6.sub0
27  ; RA:   %6.sub5:sgpr_1024 = COPY %6.sub1
28  ; RA:   %6.sub6:sgpr_1024 = COPY %6.sub0
29  ; RA:   %6.sub7:sgpr_1024 = COPY %6.sub1
30  ; RA:   %6.sub8:sgpr_1024 = COPY %6.sub0
31  ; RA:   %6.sub9:sgpr_1024 = COPY %6.sub1
32  ; RA:   %6.sub10:sgpr_1024 = COPY %6.sub0
33  ; RA:   %6.sub11:sgpr_1024 = COPY %6.sub1
34  ; RA:   %6.sub12:sgpr_1024 = COPY %6.sub0
35  ; RA:   %6.sub13:sgpr_1024 = COPY %6.sub1
36  ; RA:   %6.sub14:sgpr_1024 = COPY %6.sub0
37  ; RA:   %6.sub15:sgpr_1024 = COPY %6.sub1
38  ; RA:   %6.sub16:sgpr_1024 = COPY %6.sub0
39  ; RA:   %6.sub17:sgpr_1024 = COPY %6.sub1
40  ; RA:   %6.sub18:sgpr_1024 = COPY %6.sub0
41  ; RA:   %6.sub19:sgpr_1024 = COPY %6.sub1
42  ; RA:   %6.sub20:sgpr_1024 = COPY %6.sub0
43  ; RA:   %6.sub21:sgpr_1024 = COPY %6.sub1
44  ; RA:   %6.sub22:sgpr_1024 = COPY %6.sub0
45  ; RA:   %6.sub23:sgpr_1024 = COPY %6.sub1
46  ; RA:   %6.sub24:sgpr_1024 = COPY %6.sub0
47  ; RA:   %6.sub25:sgpr_1024 = COPY %6.sub1
48  ; RA:   %6.sub26:sgpr_1024 = COPY %6.sub0
49  ; RA:   %6.sub27:sgpr_1024 = COPY %6.sub1
50  ; RA:   %6.sub28:sgpr_1024 = COPY %6.sub0
51  ; RA:   %6.sub29:sgpr_1024 = COPY %6.sub1
52  ; RA:   undef %4.sub0_sub1:sgpr_1024 = COPY %6.sub0_sub1
53  ; RA:   %3.sub1:sgpr_1024 = COPY %3.sub0
54  ; RA:   %3.sub2:sgpr_1024 = COPY %3.sub0
55  ; RA:   %3.sub3:sgpr_1024 = COPY %3.sub0
56  ; RA:   %3.sub4:sgpr_1024 = COPY %3.sub0
57  ; RA:   %3.sub5:sgpr_1024 = COPY %3.sub0
58  ; RA:   %3.sub6:sgpr_1024 = COPY %3.sub0
59  ; RA:   %3.sub7:sgpr_1024 = COPY %3.sub0
60  ; RA:   %3.sub8:sgpr_1024 = COPY %3.sub0
61  ; RA:   %3.sub9:sgpr_1024 = COPY %3.sub0
62  ; RA:   %3.sub10:sgpr_1024 = COPY %3.sub0
63  ; RA:   %3.sub11:sgpr_1024 = COPY %3.sub0
64  ; RA:   %3.sub12:sgpr_1024 = COPY %3.sub0
65  ; RA:   %3.sub13:sgpr_1024 = COPY %3.sub0
66  ; RA:   %3.sub14:sgpr_1024 = COPY %3.sub0
67  ; RA:   %3.sub15:sgpr_1024 = COPY %3.sub0
68  ; RA:   %3.sub16:sgpr_1024 = COPY %3.sub0
69  ; RA:   %3.sub17:sgpr_1024 = COPY %3.sub0
70  ; RA:   %3.sub18:sgpr_1024 = COPY %3.sub0
71  ; RA:   %3.sub19:sgpr_1024 = COPY %3.sub0
72  ; RA:   %3.sub20:sgpr_1024 = COPY %3.sub0
73  ; RA:   %3.sub21:sgpr_1024 = COPY %3.sub0
74  ; RA:   %3.sub22:sgpr_1024 = COPY %3.sub0
75  ; RA:   %3.sub23:sgpr_1024 = COPY %3.sub0
76  ; RA:   %3.sub24:sgpr_1024 = COPY %3.sub0
77  ; RA:   %3.sub25:sgpr_1024 = COPY %3.sub0
78  ; RA:   %3.sub26:sgpr_1024 = COPY %3.sub0
79  ; RA:   %3.sub27:sgpr_1024 = COPY %3.sub0
80  ; RA:   %3.sub28:sgpr_1024 = COPY %3.sub0
81  ; RA:   %3.sub29:sgpr_1024 = COPY %3.sub0
82  ; RA:   %3.sub30:sgpr_1024 = COPY %3.sub0
83  ; RA:   %3.sub31:sgpr_1024 = COPY %3.sub0
84  ; RA: bb.2:
85  ; RA:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
86  ; RA:   S_NOP 0, csr_amdgpu_highregs, implicit [[DEF]], implicit [[DEF1]]
87  ; RA:   S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc
88  ; RA:   S_BRANCH %bb.2
89  ; VR-LABEL: name: splitkit_copy_bundle
90  ; VR: bb.0:
91  ; VR:   successors: %bb.1(0x80000000)
92  ; VR:   renamable $sgpr69 = S_MOV_B32 -1
93  ; VR:   renamable $sgpr68 = S_MOV_B32 -1
94  ; VR:   renamable $sgpr36 = S_MOV_B32 0
95  ; VR:   renamable $sgpr34_sgpr35 = IMPLICIT_DEF
96  ; VR:   renamable $sgpr70_sgpr71 = IMPLICIT_DEF
97  ; VR: bb.1:
98  ; VR:   successors: %bb.2(0x80000000)
99  ; VR:   liveins: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67:0x0000000000000003, $sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79_sgpr80_sgpr81_sgpr82_sgpr83_sgpr84_sgpr85_sgpr86_sgpr87_sgpr88_sgpr89_sgpr90_sgpr91_sgpr92_sgpr93_sgpr94_sgpr95_sgpr96_sgpr97_sgpr98_sgpr99:0x000000000000000F, $sgpr34_sgpr35, $sgpr70_sgpr71
100  ; VR:   renamable $sgpr40_sgpr41 = COPY killed renamable $sgpr68_sgpr69
101  ; VR:   renamable $sgpr42 = COPY renamable $sgpr40
102  ; VR:   renamable $sgpr43 = COPY renamable $sgpr41
103  ; VR:   renamable $sgpr44 = COPY renamable $sgpr40
104  ; VR:   renamable $sgpr45 = COPY renamable $sgpr41
105  ; VR:   renamable $sgpr46 = COPY renamable $sgpr40
106  ; VR:   renamable $sgpr47 = COPY renamable $sgpr41
107  ; VR:   renamable $sgpr48 = COPY renamable $sgpr40
108  ; VR:   renamable $sgpr49 = COPY renamable $sgpr41
109  ; VR:   renamable $sgpr50 = COPY renamable $sgpr40
110  ; VR:   renamable $sgpr51 = COPY renamable $sgpr41
111  ; VR:   renamable $sgpr52 = COPY renamable $sgpr40
112  ; VR:   renamable $sgpr53 = COPY renamable $sgpr41
113  ; VR:   renamable $sgpr54 = COPY renamable $sgpr40
114  ; VR:   renamable $sgpr55 = COPY renamable $sgpr41
115  ; VR:   renamable $sgpr56 = COPY renamable $sgpr40
116  ; VR:   renamable $sgpr57 = COPY renamable $sgpr41
117  ; VR:   renamable $sgpr58 = COPY renamable $sgpr40
118  ; VR:   renamable $sgpr59 = COPY renamable $sgpr41
119  ; VR:   renamable $sgpr60 = COPY renamable $sgpr40
120  ; VR:   renamable $sgpr61 = COPY renamable $sgpr41
121  ; VR:   renamable $sgpr62 = COPY renamable $sgpr40
122  ; VR:   renamable $sgpr63 = COPY renamable $sgpr41
123  ; VR:   renamable $sgpr64 = COPY renamable $sgpr40
124  ; VR:   renamable $sgpr65 = COPY renamable $sgpr41
125  ; VR:   renamable $sgpr66 = COPY renamable $sgpr40
126  ; VR:   renamable $sgpr67 = COPY renamable $sgpr41
127  ; VR:   renamable $sgpr68 = COPY renamable $sgpr40
128  ; VR:   renamable $sgpr69 = COPY renamable $sgpr41
129  ; VR:   renamable $sgpr68_sgpr69 = COPY killed renamable $sgpr40_sgpr41
130  ; VR:   renamable $sgpr37 = COPY renamable $sgpr36
131  ; VR:   renamable $sgpr38 = COPY renamable $sgpr36
132  ; VR:   renamable $sgpr39 = COPY renamable $sgpr36
133  ; VR:   renamable $sgpr40 = COPY renamable $sgpr36
134  ; VR:   renamable $sgpr41 = COPY renamable $sgpr36
135  ; VR:   renamable $sgpr42 = COPY renamable $sgpr36
136  ; VR:   renamable $sgpr43 = COPY renamable $sgpr36
137  ; VR:   renamable $sgpr44 = COPY renamable $sgpr36
138  ; VR:   renamable $sgpr45 = COPY renamable $sgpr36
139  ; VR:   renamable $sgpr46 = COPY renamable $sgpr36
140  ; VR:   renamable $sgpr47 = COPY renamable $sgpr36
141  ; VR:   renamable $sgpr48 = COPY renamable $sgpr36
142  ; VR:   renamable $sgpr49 = COPY renamable $sgpr36
143  ; VR:   renamable $sgpr50 = COPY renamable $sgpr36
144  ; VR:   renamable $sgpr51 = COPY renamable $sgpr36
145  ; VR:   renamable $sgpr52 = COPY renamable $sgpr36
146  ; VR:   renamable $sgpr53 = COPY renamable $sgpr36
147  ; VR:   renamable $sgpr54 = COPY renamable $sgpr36
148  ; VR:   renamable $sgpr55 = COPY renamable $sgpr36
149  ; VR:   renamable $sgpr56 = COPY renamable $sgpr36
150  ; VR:   renamable $sgpr57 = COPY renamable $sgpr36
151  ; VR:   renamable $sgpr58 = COPY renamable $sgpr36
152  ; VR:   renamable $sgpr59 = COPY renamable $sgpr36
153  ; VR:   renamable $sgpr60 = COPY renamable $sgpr36
154  ; VR:   renamable $sgpr61 = COPY renamable $sgpr36
155  ; VR:   renamable $sgpr62 = COPY renamable $sgpr36
156  ; VR:   renamable $sgpr63 = COPY renamable $sgpr36
157  ; VR:   renamable $sgpr64 = COPY renamable $sgpr36
158  ; VR:   renamable $sgpr65 = COPY renamable $sgpr36
159  ; VR:   renamable $sgpr66 = COPY renamable $sgpr36
160  ; VR:   renamable $sgpr67 = COPY renamable $sgpr36
161  ; VR: bb.2:
162  ; VR:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
163  ; VR:   liveins: $sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63_sgpr64_sgpr65_sgpr66_sgpr67:0x0000000000000003, $sgpr68_sgpr69_sgpr70_sgpr71_sgpr72_sgpr73_sgpr74_sgpr75_sgpr76_sgpr77_sgpr78_sgpr79_sgpr80_sgpr81_sgpr82_sgpr83_sgpr84_sgpr85_sgpr86_sgpr87_sgpr88_sgpr89_sgpr90_sgpr91_sgpr92_sgpr93_sgpr94_sgpr95_sgpr96_sgpr97_sgpr98_sgpr99:0x000000000000000F, $sgpr34_sgpr35, $sgpr70_sgpr71
164  ; VR:   S_NOP 0, csr_amdgpu_highregs, implicit renamable $sgpr34_sgpr35, implicit renamable $sgpr70_sgpr71
165  ; VR:   S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc
166  ; VR:   S_BRANCH %bb.2
167  bb.0:
168    %0:sreg_64 = IMPLICIT_DEF
169    %1:sreg_64 = IMPLICIT_DEF
170    undef %2.sub1:sgpr_1024 = S_MOV_B32 -1
171    %2.sub0:sgpr_1024 = S_MOV_B32 -1
172    undef %3.sub0:sgpr_1024 = S_MOV_B32 0
173
174  bb.1:
175    %2.sub2:sgpr_1024 = COPY %2.sub0
176    %2.sub3:sgpr_1024 = COPY %2.sub1
177    %2.sub4:sgpr_1024 = COPY %2.sub0
178    %2.sub5:sgpr_1024 = COPY %2.sub1
179    %2.sub6:sgpr_1024 = COPY %2.sub0
180    %2.sub7:sgpr_1024 = COPY %2.sub1
181    %2.sub8:sgpr_1024 = COPY %2.sub0
182    %2.sub9:sgpr_1024 = COPY %2.sub1
183    %2.sub10:sgpr_1024 = COPY %2.sub0
184    %2.sub11:sgpr_1024 = COPY %2.sub1
185    %2.sub12:sgpr_1024 = COPY %2.sub0
186    %2.sub13:sgpr_1024 = COPY %2.sub1
187    %2.sub14:sgpr_1024 = COPY %2.sub0
188    %2.sub15:sgpr_1024 = COPY %2.sub1
189    %2.sub16:sgpr_1024 = COPY %2.sub0
190    %2.sub17:sgpr_1024 = COPY %2.sub1
191    %2.sub18:sgpr_1024 = COPY %2.sub0
192    %2.sub19:sgpr_1024 = COPY %2.sub1
193    %2.sub20:sgpr_1024 = COPY %2.sub0
194    %2.sub21:sgpr_1024 = COPY %2.sub1
195    %2.sub22:sgpr_1024 = COPY %2.sub0
196    %2.sub23:sgpr_1024 = COPY %2.sub1
197    %2.sub24:sgpr_1024 = COPY %2.sub0
198    %2.sub25:sgpr_1024 = COPY %2.sub1
199    %2.sub26:sgpr_1024 = COPY %2.sub0
200    %2.sub27:sgpr_1024 = COPY %2.sub1
201    %2.sub28:sgpr_1024 = COPY %2.sub0
202    %2.sub29:sgpr_1024 = COPY %2.sub1
203    %3.sub1:sgpr_1024 = COPY %3.sub0
204    %3.sub2:sgpr_1024 = COPY %3.sub0
205    %3.sub3:sgpr_1024 = COPY %3.sub0
206    %3.sub4:sgpr_1024 = COPY %3.sub0
207    %3.sub5:sgpr_1024 = COPY %3.sub0
208    %3.sub6:sgpr_1024 = COPY %3.sub0
209    %3.sub7:sgpr_1024 = COPY %3.sub0
210    %3.sub8:sgpr_1024 = COPY %3.sub0
211    %3.sub9:sgpr_1024 = COPY %3.sub0
212    %3.sub10:sgpr_1024 = COPY %3.sub0
213    %3.sub11:sgpr_1024 = COPY %3.sub0
214    %3.sub12:sgpr_1024 = COPY %3.sub0
215    %3.sub13:sgpr_1024 = COPY %3.sub0
216    %3.sub14:sgpr_1024 = COPY %3.sub0
217    %3.sub15:sgpr_1024 = COPY %3.sub0
218    %3.sub16:sgpr_1024 = COPY %3.sub0
219    %3.sub17:sgpr_1024 = COPY %3.sub0
220    %3.sub18:sgpr_1024 = COPY %3.sub0
221    %3.sub19:sgpr_1024 = COPY %3.sub0
222    %3.sub20:sgpr_1024 = COPY %3.sub0
223    %3.sub21:sgpr_1024 = COPY %3.sub0
224    %3.sub22:sgpr_1024 = COPY %3.sub0
225    %3.sub23:sgpr_1024 = COPY %3.sub0
226    %3.sub24:sgpr_1024 = COPY %3.sub0
227    %3.sub25:sgpr_1024 = COPY %3.sub0
228    %3.sub26:sgpr_1024 = COPY %3.sub0
229    %3.sub27:sgpr_1024 = COPY %3.sub0
230    %3.sub28:sgpr_1024 = COPY %3.sub0
231    %3.sub29:sgpr_1024 = COPY %3.sub0
232    %3.sub30:sgpr_1024 = COPY %3.sub0
233    %3.sub31:sgpr_1024 = COPY %3.sub0
234
235  bb.2:
236    S_NOP 0, implicit %0, implicit %1, csr_amdgpu_highregs
237    S_CBRANCH_VCCNZ %bb.1, implicit undef $vcc
238    S_BRANCH %bb.2
239
240...
241
242---
243name:            splitkit_copy_unbundle_reorder
244tracksRegLiveness: true
245machineFunctionInfo:
246  scratchRSrcReg:  '$sgpr0_sgpr1_sgpr2_sgpr3'
247  stackPtrOffsetReg: '$sgpr32'
248body:             |
249  bb.0:
250    ; RA-LABEL: name: splitkit_copy_unbundle_reorder
251    ; RA: [[DEF:%[0-9]+]]:sgpr_128 = IMPLICIT_DEF
252    ; RA: [[DEF1:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
253    ; RA: [[DEF2:%[0-9]+]]:sgpr_512 = IMPLICIT_DEF
254    ; RA: [[DEF2]].sub4:sgpr_512 = S_MOV_B32 -1
255    ; RA: [[DEF2]].sub5:sgpr_512 = S_MOV_B32 -1
256    ; RA: [[DEF2]].sub10:sgpr_512 = S_MOV_B32 -1
257    ; RA: [[DEF2]].sub11:sgpr_512 = S_MOV_B32 -1
258    ; RA: [[DEF2]].sub7:sgpr_512 = S_MOV_B32 -1
259    ; RA: [[DEF2]].sub8:sgpr_512 = S_MOV_B32 -1
260    ; RA: [[DEF2]].sub13:sgpr_512 = S_MOV_B32 -1
261    ; RA: [[DEF2]].sub14:sgpr_512 = S_MOV_B32 -1
262    ; RA: undef %15.sub4_sub5:sgpr_512 = COPY [[DEF2]].sub4_sub5 {
263    ; RA:   internal %15.sub10_sub11:sgpr_512 = COPY [[DEF2]].sub10_sub11
264    ; RA:   internal %15.sub7:sgpr_512 = COPY [[DEF2]].sub7
265    ; RA:   internal %15.sub8:sgpr_512 = COPY [[DEF2]].sub8
266    ; RA:   internal %15.sub13:sgpr_512 = COPY [[DEF2]].sub13
267    ; RA:   internal %15.sub14:sgpr_512 = COPY [[DEF2]].sub14
268    ; RA: }
269    ; RA: SI_SPILL_S512_SAVE %15, %stack.0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr32 :: (store 64 into %stack.0, align 4, addrspace 5)
270    ; RA: S_NOP 0, implicit-def $sgpr8, implicit-def $sgpr12, implicit-def $sgpr16, implicit-def $sgpr20, implicit-def $sgpr24, implicit-def $sgpr28, implicit-def $sgpr32, implicit-def $sgpr36, implicit-def $sgpr40, implicit-def $sgpr44, implicit-def $sgpr48, implicit-def $sgpr52, implicit-def $sgpr56, implicit-def $sgpr60, implicit-def $sgpr64, implicit-def $sgpr68, implicit-def $sgpr72, implicit-def $sgpr74, implicit-def $sgpr78, implicit-def $sgpr82, implicit-def $sgpr86, implicit-def $sgpr90, implicit-def $sgpr94, implicit-def $sgpr98
271    ; RA: [[SI_SPILL_S512_RESTORE:%[0-9]+]]:sgpr_512 = SI_SPILL_S512_RESTORE %stack.0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr32 :: (load 64 from %stack.0, align 4, addrspace 5)
272    ; RA: undef %14.sub4_sub5:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub4_sub5 {
273    ; RA:   internal %14.sub10_sub11:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub10_sub11
274    ; RA:   internal %14.sub7:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub7
275    ; RA:   internal %14.sub8:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub8
276    ; RA:   internal %14.sub13:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub13
277    ; RA:   internal %14.sub14:sgpr_512 = COPY [[SI_SPILL_S512_RESTORE]].sub14
278    ; RA: }
279    ; RA: [[S_BUFFER_LOAD_DWORD_SGPR:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], %14.sub4, 0, 0 :: (dereferenceable invariant load 4)
280    ; RA: [[S_BUFFER_LOAD_DWORD_SGPR1:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], %14.sub5, 0, 0 :: (dereferenceable invariant load 4)
281    ; RA: [[S_BUFFER_LOAD_DWORD_SGPR2:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], %14.sub10, 0, 0 :: (dereferenceable invariant load 4)
282    ; RA: [[S_BUFFER_LOAD_DWORD_SGPR3:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], %14.sub11, 0, 0 :: (dereferenceable invariant load 4)
283    ; RA: [[S_BUFFER_LOAD_DWORD_SGPR4:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], %14.sub7, 0, 0 :: (dereferenceable invariant load 4)
284    ; RA: [[S_BUFFER_LOAD_DWORD_SGPR5:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], %14.sub8, 0, 0 :: (dereferenceable invariant load 4)
285    ; RA: [[S_BUFFER_LOAD_DWORD_SGPR6:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], %14.sub13, 0, 0 :: (dereferenceable invariant load 4)
286    ; RA: [[S_BUFFER_LOAD_DWORD_SGPR7:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR [[DEF]], %14.sub14, 0, 0 :: (dereferenceable invariant load 4)
287    ; RA: S_NOP 0, implicit [[DEF]], implicit [[DEF1]], implicit [[S_BUFFER_LOAD_DWORD_SGPR]], implicit [[S_BUFFER_LOAD_DWORD_SGPR1]], implicit [[S_BUFFER_LOAD_DWORD_SGPR2]], implicit [[S_BUFFER_LOAD_DWORD_SGPR3]], implicit [[S_BUFFER_LOAD_DWORD_SGPR4]], implicit [[S_BUFFER_LOAD_DWORD_SGPR5]], implicit [[S_BUFFER_LOAD_DWORD_SGPR6]], implicit [[S_BUFFER_LOAD_DWORD_SGPR7]]
288    ; VR-LABEL: name: splitkit_copy_unbundle_reorder
289    ; VR: renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27 = IMPLICIT_DEF
290    ; VR: renamable $sgpr16 = S_MOV_B32 -1
291    ; VR: renamable $sgpr17 = S_MOV_B32 -1
292    ; VR: renamable $sgpr22 = S_MOV_B32 -1
293    ; VR: renamable $sgpr23 = S_MOV_B32 -1
294    ; VR: renamable $sgpr19 = S_MOV_B32 -1
295    ; VR: renamable $sgpr20 = S_MOV_B32 -1
296    ; VR: renamable $sgpr25 = S_MOV_B32 -1
297    ; VR: renamable $sgpr26 = S_MOV_B32 -1
298    ; VR: SI_SPILL_S512_SAVE killed renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27, %stack.0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr32 :: (store 64 into %stack.0, align 4, addrspace 5)
299    ; VR: S_NOP 0, implicit-def $sgpr8, implicit-def $sgpr12, implicit-def $sgpr16, implicit-def $sgpr20, implicit-def $sgpr24, implicit-def $sgpr28, implicit-def $sgpr32, implicit-def $sgpr36, implicit-def $sgpr40, implicit-def $sgpr44, implicit-def $sgpr48, implicit-def $sgpr52, implicit-def $sgpr56, implicit-def $sgpr60, implicit-def $sgpr64, implicit-def $sgpr68, implicit-def $sgpr72, implicit-def $sgpr74, implicit-def $sgpr78, implicit-def $sgpr82, implicit-def $sgpr86, implicit-def $sgpr90, implicit-def $sgpr94, implicit-def $sgpr98
300    ; VR: renamable $sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27 = SI_SPILL_S512_RESTORE %stack.0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit $sgpr32 :: (load 64 from %stack.0, align 4, addrspace 5)
301    ; VR: renamable $sgpr12_sgpr13 = COPY killed renamable $sgpr16_sgpr17
302    ; VR: renamable $sgpr15 = COPY killed renamable $sgpr19
303    ; VR: renamable $sgpr18_sgpr19 = COPY killed renamable $sgpr22_sgpr23
304    ; VR: renamable $sgpr16 = COPY killed renamable $sgpr20
305    ; VR: renamable $sgpr21 = COPY killed renamable $sgpr25
306    ; VR: renamable $sgpr22 = COPY killed renamable $sgpr26
307    ; VR: renamable $sgpr4_sgpr5_sgpr6_sgpr7 = IMPLICIT_DEF
308    ; VR: renamable $sgpr8 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr12, 0, 0 :: (dereferenceable invariant load 4)
309    ; VR: renamable $sgpr9 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr13, 0, 0 :: (dereferenceable invariant load 4)
310    ; VR: renamable $sgpr14 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr15, 0, 0 :: (dereferenceable invariant load 4)
311    ; VR: renamable $sgpr15 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr16, 0, 0 :: (dereferenceable invariant load 4)
312    ; VR: renamable $sgpr10_sgpr11 = IMPLICIT_DEF
313    ; VR: renamable $sgpr12 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr18, 0, 0 :: (dereferenceable invariant load 4)
314    ; VR: renamable $sgpr13 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr19, 0, 0 :: (dereferenceable invariant load 4)
315    ; VR: renamable $sgpr16 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr21, 0, 0 :: (dereferenceable invariant load 4)
316    ; VR: renamable $sgpr17 = S_BUFFER_LOAD_DWORD_SGPR renamable $sgpr4_sgpr5_sgpr6_sgpr7, killed renamable $sgpr22, 0, 0 :: (dereferenceable invariant load 4)
317    ; VR: S_NOP 0, implicit killed renamable $sgpr4_sgpr5_sgpr6_sgpr7, implicit killed renamable $sgpr10_sgpr11, implicit killed renamable $sgpr8, implicit killed renamable $sgpr9, implicit killed renamable $sgpr12, implicit killed renamable $sgpr13, implicit killed renamable $sgpr14, implicit killed renamable $sgpr15, implicit killed renamable $sgpr16, implicit killed renamable $sgpr17
318    %0:sgpr_128 = IMPLICIT_DEF
319    %1:sreg_64 = IMPLICIT_DEF
320    %2:sgpr_512 = IMPLICIT_DEF
321
322    %2.sub4:sgpr_512 = S_MOV_B32 -1
323    %2.sub5:sgpr_512 = S_MOV_B32 -1
324    %2.sub10:sgpr_512 = S_MOV_B32 -1
325    %2.sub11:sgpr_512 = S_MOV_B32 -1
326    %2.sub7:sgpr_512 = S_MOV_B32 -1
327    %2.sub8:sgpr_512 = S_MOV_B32 -1
328    %2.sub13:sgpr_512 = S_MOV_B32 -1
329    %2.sub14:sgpr_512 = S_MOV_B32 -1
330
331    ; Clobber registers
332    S_NOP 0, implicit-def $sgpr8, implicit-def $sgpr12, implicit-def $sgpr16, implicit-def $sgpr20, implicit-def $sgpr24, implicit-def $sgpr28, implicit-def $sgpr32, implicit-def $sgpr36, implicit-def $sgpr40, implicit-def $sgpr44, implicit-def $sgpr48, implicit-def $sgpr52, implicit-def $sgpr56, implicit-def $sgpr60, implicit-def $sgpr64, implicit-def $sgpr68, implicit-def $sgpr72, implicit-def $sgpr74, implicit-def $sgpr78, implicit-def $sgpr82, implicit-def $sgpr86, implicit-def $sgpr90, implicit-def $sgpr94, implicit-def $sgpr98
333
334    %5:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub4:sgpr_512, 0, 0 :: (dereferenceable invariant load 4)
335    %6:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub5:sgpr_512, 0, 0 :: (dereferenceable invariant load 4)
336    %7:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub10:sgpr_512, 0, 0 :: (dereferenceable invariant load 4)
337    %8:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub11:sgpr_512, 0, 0 :: (dereferenceable invariant load 4)
338    %9:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub7:sgpr_512, 0, 0 :: (dereferenceable invariant load 4)
339    %10:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub8:sgpr_512, 0, 0 :: (dereferenceable invariant load 4)
340    %11:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub13:sgpr_512, 0, 0 :: (dereferenceable invariant load 4)
341    %12:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_SGPR %0:sgpr_128, %2.sub14:sgpr_512, 0, 0 :: (dereferenceable invariant load 4)
342
343    S_NOP 0, implicit %0, implicit %1, implicit %5, implicit %6, implicit %7, implicit %8, implicit %9, implicit %10, implicit %11, implicit %12
344
345...
346