1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX9 %s 3; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=VI %s 4; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=CI %s 5; RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX10 %s 6; RUN: llc -march=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX11 %s 7 8define amdgpu_kernel void @s_shl_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> %lhs, <2 x i16> %rhs) #0 { 9; GFX9-LABEL: s_shl_v2i16: 10; GFX9: ; %bb.0: 11; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c 12; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24 13; GFX9-NEXT: s_mov_b32 s7, 0xf000 14; GFX9-NEXT: s_mov_b32 s6, -1 15; GFX9-NEXT: s_waitcnt lgkmcnt(0) 16; GFX9-NEXT: v_mov_b32_e32 v0, s2 17; GFX9-NEXT: v_pk_lshlrev_b16 v0, s3, v0 18; GFX9-NEXT: buffer_store_dword v0, off, s[4:7], 0 19; GFX9-NEXT: s_endpgm 20; 21; VI-LABEL: s_shl_v2i16: 22; VI: ; %bb.0: 23; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c 24; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 25; VI-NEXT: s_mov_b32 s3, 0xf000 26; VI-NEXT: s_mov_b32 s2, -1 27; VI-NEXT: s_waitcnt lgkmcnt(0) 28; VI-NEXT: s_lshr_b32 s6, s4, 16 29; VI-NEXT: s_lshr_b32 s7, s5, 16 30; VI-NEXT: s_lshl_b32 s6, s6, s7 31; VI-NEXT: s_lshl_b32 s4, s4, s5 32; VI-NEXT: s_lshl_b32 s5, s6, 16 33; VI-NEXT: s_and_b32 s4, s4, 0xffff 34; VI-NEXT: s_or_b32 s4, s4, s5 35; VI-NEXT: v_mov_b32_e32 v0, s4 36; VI-NEXT: buffer_store_dword v0, off, s[0:3], 0 37; VI-NEXT: s_endpgm 38; 39; CI-LABEL: s_shl_v2i16: 40; CI: ; %bb.0: 41; CI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xb 42; CI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9 43; CI-NEXT: s_mov_b32 s3, 0xf000 44; CI-NEXT: s_mov_b32 s2, -1 45; CI-NEXT: s_waitcnt lgkmcnt(0) 46; CI-NEXT: s_lshr_b32 s6, s4, 16 47; CI-NEXT: s_lshr_b32 s7, s5, 16 48; CI-NEXT: s_lshl_b32 s6, s6, s7 49; CI-NEXT: s_lshl_b32 s4, s4, s5 50; CI-NEXT: s_lshl_b32 s6, s6, 16 51; CI-NEXT: s_and_b32 s4, s4, 0xffff 52; CI-NEXT: s_or_b32 s4, s4, s6 53; CI-NEXT: v_mov_b32_e32 v0, s4 54; CI-NEXT: buffer_store_dword v0, off, s[0:3], 0 55; CI-NEXT: s_endpgm 56; 57; GFX10-LABEL: s_shl_v2i16: 58; GFX10: ; %bb.0: 59; GFX10-NEXT: s_clause 0x1 60; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c 61; GFX10-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24 62; GFX10-NEXT: s_mov_b32 s7, 0x31016000 63; GFX10-NEXT: s_mov_b32 s6, -1 64; GFX10-NEXT: s_waitcnt lgkmcnt(0) 65; GFX10-NEXT: v_pk_lshlrev_b16 v0, s3, s2 66; GFX10-NEXT: buffer_store_dword v0, off, s[4:7], 0 67; GFX10-NEXT: s_endpgm 68; 69; GFX11-LABEL: s_shl_v2i16: 70; GFX11: ; %bb.0: 71; GFX11-NEXT: s_clause 0x1 72; GFX11-NEXT: s_load_b64 s[2:3], s[0:1], 0x2c 73; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x24 74; GFX11-NEXT: s_waitcnt lgkmcnt(0) 75; GFX11-NEXT: v_pk_lshlrev_b16 v0, s3, s2 76; GFX11-NEXT: s_mov_b32 s3, 0x31016000 77; GFX11-NEXT: s_mov_b32 s2, -1 78; GFX11-NEXT: buffer_store_b32 v0, off, s[0:3], 0 79; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 80; GFX11-NEXT: s_endpgm 81 %result = shl <2 x i16> %lhs, %rhs 82 store <2 x i16> %result, <2 x i16> addrspace(1)* %out 83 ret void 84} 85 86define amdgpu_kernel void @v_shl_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) #0 { 87; GFX9-LABEL: v_shl_v2i16: 88; GFX9: ; %bb.0: 89; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 90; GFX9-NEXT: v_lshlrev_b32_e32 v2, 2, v0 91; GFX9-NEXT: s_waitcnt lgkmcnt(0) 92; GFX9-NEXT: global_load_dwordx2 v[0:1], v2, s[2:3] 93; GFX9-NEXT: s_waitcnt vmcnt(0) 94; GFX9-NEXT: v_pk_lshlrev_b16 v0, v1, v0 95; GFX9-NEXT: global_store_dword v2, v0, s[0:1] 96; GFX9-NEXT: s_endpgm 97; 98; VI-LABEL: v_shl_v2i16: 99; VI: ; %bb.0: 100; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 101; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0 102; VI-NEXT: s_waitcnt lgkmcnt(0) 103; VI-NEXT: v_mov_b32_e32 v1, s3 104; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2 105; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 106; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1] 107; VI-NEXT: v_mov_b32_e32 v3, s1 108; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v2 109; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc 110; VI-NEXT: s_waitcnt vmcnt(0) 111; VI-NEXT: v_lshlrev_b16_e32 v4, v1, v0 112; VI-NEXT: v_lshlrev_b16_sdwa v0, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 113; VI-NEXT: v_or_b32_e32 v0, v4, v0 114; VI-NEXT: flat_store_dword v[2:3], v0 115; VI-NEXT: s_endpgm 116; 117; CI-LABEL: v_shl_v2i16: 118; CI: ; %bb.0: 119; CI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 120; CI-NEXT: s_mov_b32 s7, 0xf000 121; CI-NEXT: s_mov_b32 s6, 0 122; CI-NEXT: v_lshlrev_b32_e32 v0, 2, v0 123; CI-NEXT: v_mov_b32_e32 v1, 0 124; CI-NEXT: s_waitcnt lgkmcnt(0) 125; CI-NEXT: s_mov_b64 s[4:5], s[2:3] 126; CI-NEXT: buffer_load_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64 127; CI-NEXT: s_mov_b64 s[2:3], s[6:7] 128; CI-NEXT: s_waitcnt vmcnt(0) 129; CI-NEXT: v_lshrrev_b32_e32 v4, 16, v2 130; CI-NEXT: v_lshrrev_b32_e32 v5, 16, v3 131; CI-NEXT: v_lshlrev_b32_e32 v2, v3, v2 132; CI-NEXT: v_lshlrev_b32_e32 v3, v5, v4 133; CI-NEXT: v_and_b32_e32 v2, 0xffff, v2 134; CI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 135; CI-NEXT: v_or_b32_e32 v2, v2, v3 136; CI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 137; CI-NEXT: s_endpgm 138; 139; GFX10-LABEL: v_shl_v2i16: 140; GFX10: ; %bb.0: 141; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 142; GFX10-NEXT: v_lshlrev_b32_e32 v2, 2, v0 143; GFX10-NEXT: s_waitcnt lgkmcnt(0) 144; GFX10-NEXT: global_load_dwordx2 v[0:1], v2, s[2:3] 145; GFX10-NEXT: s_waitcnt vmcnt(0) 146; GFX10-NEXT: v_pk_lshlrev_b16 v0, v1, v0 147; GFX10-NEXT: global_store_dword v2, v0, s[0:1] 148; GFX10-NEXT: s_endpgm 149; 150; GFX11-LABEL: v_shl_v2i16: 151; GFX11: ; %bb.0: 152; GFX11-NEXT: s_load_b128 s[0:3], s[0:1], 0x24 153; GFX11-NEXT: v_lshlrev_b32_e32 v2, 2, v0 154; GFX11-NEXT: s_waitcnt lgkmcnt(0) 155; GFX11-NEXT: global_load_b64 v[0:1], v2, s[2:3] 156; GFX11-NEXT: s_waitcnt vmcnt(0) 157; GFX11-NEXT: v_pk_lshlrev_b16 v0, v1, v0 158; GFX11-NEXT: global_store_b32 v2, v0, s[0:1] 159; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 160; GFX11-NEXT: s_endpgm 161 %tid = call i32 @llvm.amdgcn.workitem.id.x() 162 %tid.ext = sext i32 %tid to i64 163 %in.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in, i64 %tid.ext 164 %out.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 %tid.ext 165 %b_ptr = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %in.gep, i32 1 166 %a = load <2 x i16>, <2 x i16> addrspace(1)* %in.gep 167 %b = load <2 x i16>, <2 x i16> addrspace(1)* %b_ptr 168 %result = shl <2 x i16> %a, %b 169 store <2 x i16> %result, <2 x i16> addrspace(1)* %out.gep 170 ret void 171} 172 173define amdgpu_kernel void @shl_v_s_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %in, <2 x i16> %sgpr) #0 { 174; GFX9-LABEL: shl_v_s_v2i16: 175; GFX9: ; %bb.0: 176; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 177; GFX9-NEXT: s_load_dword s2, s[0:1], 0x34 178; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0 179; GFX9-NEXT: s_waitcnt lgkmcnt(0) 180; GFX9-NEXT: global_load_dword v1, v0, s[6:7] 181; GFX9-NEXT: s_waitcnt vmcnt(0) 182; GFX9-NEXT: v_pk_lshlrev_b16 v1, s2, v1 183; GFX9-NEXT: global_store_dword v0, v1, s[4:5] 184; GFX9-NEXT: s_endpgm 185; 186; VI-LABEL: shl_v_s_v2i16: 187; VI: ; %bb.0: 188; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 189; VI-NEXT: s_load_dword s0, s[0:1], 0x34 190; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0 191; VI-NEXT: s_waitcnt lgkmcnt(0) 192; VI-NEXT: v_mov_b32_e32 v1, s7 193; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v2 194; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 195; VI-NEXT: flat_load_dword v3, v[0:1] 196; VI-NEXT: s_lshr_b32 s1, s0, 16 197; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v2 198; VI-NEXT: v_mov_b32_e32 v2, s1 199; VI-NEXT: v_mov_b32_e32 v1, s5 200; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 201; VI-NEXT: s_waitcnt vmcnt(0) 202; VI-NEXT: v_lshlrev_b16_e32 v4, s0, v3 203; VI-NEXT: v_lshlrev_b16_sdwa v2, v2, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1 204; VI-NEXT: v_or_b32_e32 v2, v4, v2 205; VI-NEXT: flat_store_dword v[0:1], v2 206; VI-NEXT: s_endpgm 207; 208; CI-LABEL: shl_v_s_v2i16: 209; CI: ; %bb.0: 210; CI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 211; CI-NEXT: s_load_dword s8, s[0:1], 0xd 212; CI-NEXT: s_mov_b32 s3, 0xf000 213; CI-NEXT: s_mov_b32 s2, 0 214; CI-NEXT: v_lshlrev_b32_e32 v0, 2, v0 215; CI-NEXT: s_waitcnt lgkmcnt(0) 216; CI-NEXT: s_mov_b64 s[0:1], s[6:7] 217; CI-NEXT: v_mov_b32_e32 v1, 0 218; CI-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64 219; CI-NEXT: s_lshr_b32 s0, s8, 16 220; CI-NEXT: s_mov_b64 s[6:7], s[2:3] 221; CI-NEXT: s_waitcnt vmcnt(0) 222; CI-NEXT: v_lshrrev_b32_e32 v3, 16, v2 223; CI-NEXT: v_lshlrev_b32_e32 v2, s8, v2 224; CI-NEXT: v_lshlrev_b32_e32 v3, s0, v3 225; CI-NEXT: v_and_b32_e32 v2, 0xffff, v2 226; CI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 227; CI-NEXT: v_or_b32_e32 v2, v2, v3 228; CI-NEXT: buffer_store_dword v2, v[0:1], s[4:7], 0 addr64 229; CI-NEXT: s_endpgm 230; 231; GFX10-LABEL: shl_v_s_v2i16: 232; GFX10: ; %bb.0: 233; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 234; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0 235; GFX10-NEXT: s_load_dword s0, s[0:1], 0x34 236; GFX10-NEXT: s_waitcnt lgkmcnt(0) 237; GFX10-NEXT: global_load_dword v1, v0, s[6:7] 238; GFX10-NEXT: s_waitcnt vmcnt(0) 239; GFX10-NEXT: v_pk_lshlrev_b16 v1, s0, v1 240; GFX10-NEXT: global_store_dword v0, v1, s[4:5] 241; GFX10-NEXT: s_endpgm 242; 243; GFX11-LABEL: shl_v_s_v2i16: 244; GFX11: ; %bb.0: 245; GFX11-NEXT: s_load_b128 s[4:7], s[0:1], 0x24 246; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0 247; GFX11-NEXT: s_load_b32 s0, s[0:1], 0x34 248; GFX11-NEXT: s_waitcnt lgkmcnt(0) 249; GFX11-NEXT: global_load_b32 v1, v0, s[6:7] 250; GFX11-NEXT: s_waitcnt vmcnt(0) 251; GFX11-NEXT: v_pk_lshlrev_b16 v1, s0, v1 252; GFX11-NEXT: global_store_b32 v0, v1, s[4:5] 253; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 254; GFX11-NEXT: s_endpgm 255 %tid = call i32 @llvm.amdgcn.workitem.id.x() 256 %tid.ext = sext i32 %tid to i64 257 %in.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in, i64 %tid.ext 258 %out.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 %tid.ext 259 %vgpr = load <2 x i16>, <2 x i16> addrspace(1)* %in.gep 260 %result = shl <2 x i16> %vgpr, %sgpr 261 store <2 x i16> %result, <2 x i16> addrspace(1)* %out.gep 262 ret void 263} 264 265define amdgpu_kernel void @shl_s_v_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %in, <2 x i16> %sgpr) #0 { 266; GFX9-LABEL: shl_s_v_v2i16: 267; GFX9: ; %bb.0: 268; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 269; GFX9-NEXT: s_load_dword s2, s[0:1], 0x34 270; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0 271; GFX9-NEXT: s_waitcnt lgkmcnt(0) 272; GFX9-NEXT: global_load_dword v1, v0, s[6:7] 273; GFX9-NEXT: s_waitcnt vmcnt(0) 274; GFX9-NEXT: v_pk_lshlrev_b16 v1, v1, s2 275; GFX9-NEXT: global_store_dword v0, v1, s[4:5] 276; GFX9-NEXT: s_endpgm 277; 278; VI-LABEL: shl_s_v_v2i16: 279; VI: ; %bb.0: 280; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 281; VI-NEXT: s_load_dword s0, s[0:1], 0x34 282; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0 283; VI-NEXT: s_waitcnt lgkmcnt(0) 284; VI-NEXT: v_mov_b32_e32 v1, s7 285; VI-NEXT: v_add_u32_e32 v0, vcc, s6, v2 286; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 287; VI-NEXT: flat_load_dword v3, v[0:1] 288; VI-NEXT: s_lshr_b32 s1, s0, 16 289; VI-NEXT: v_add_u32_e32 v0, vcc, s4, v2 290; VI-NEXT: v_mov_b32_e32 v2, s1 291; VI-NEXT: v_mov_b32_e32 v1, s5 292; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 293; VI-NEXT: s_waitcnt vmcnt(0) 294; VI-NEXT: v_lshlrev_b16_e64 v4, v3, s0 295; VI-NEXT: v_lshlrev_b16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 296; VI-NEXT: v_or_b32_e32 v2, v4, v2 297; VI-NEXT: flat_store_dword v[0:1], v2 298; VI-NEXT: s_endpgm 299; 300; CI-LABEL: shl_s_v_v2i16: 301; CI: ; %bb.0: 302; CI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9 303; CI-NEXT: s_load_dword s8, s[0:1], 0xd 304; CI-NEXT: s_mov_b32 s3, 0xf000 305; CI-NEXT: s_mov_b32 s2, 0 306; CI-NEXT: v_lshlrev_b32_e32 v0, 2, v0 307; CI-NEXT: s_waitcnt lgkmcnt(0) 308; CI-NEXT: s_mov_b64 s[0:1], s[6:7] 309; CI-NEXT: v_mov_b32_e32 v1, 0 310; CI-NEXT: buffer_load_dword v2, v[0:1], s[0:3], 0 addr64 311; CI-NEXT: s_lshr_b32 s0, s8, 16 312; CI-NEXT: s_mov_b64 s[6:7], s[2:3] 313; CI-NEXT: s_waitcnt vmcnt(0) 314; CI-NEXT: v_lshrrev_b32_e32 v3, 16, v2 315; CI-NEXT: v_lshl_b32_e32 v2, s8, v2 316; CI-NEXT: v_lshl_b32_e32 v3, s0, v3 317; CI-NEXT: v_and_b32_e32 v2, 0xffff, v2 318; CI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 319; CI-NEXT: v_or_b32_e32 v2, v2, v3 320; CI-NEXT: buffer_store_dword v2, v[0:1], s[4:7], 0 addr64 321; CI-NEXT: s_endpgm 322; 323; GFX10-LABEL: shl_s_v_v2i16: 324; GFX10: ; %bb.0: 325; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 326; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0 327; GFX10-NEXT: s_load_dword s0, s[0:1], 0x34 328; GFX10-NEXT: s_waitcnt lgkmcnt(0) 329; GFX10-NEXT: global_load_dword v1, v0, s[6:7] 330; GFX10-NEXT: s_waitcnt vmcnt(0) 331; GFX10-NEXT: v_pk_lshlrev_b16 v1, v1, s0 332; GFX10-NEXT: global_store_dword v0, v1, s[4:5] 333; GFX10-NEXT: s_endpgm 334; 335; GFX11-LABEL: shl_s_v_v2i16: 336; GFX11: ; %bb.0: 337; GFX11-NEXT: s_load_b128 s[4:7], s[0:1], 0x24 338; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0 339; GFX11-NEXT: s_load_b32 s0, s[0:1], 0x34 340; GFX11-NEXT: s_waitcnt lgkmcnt(0) 341; GFX11-NEXT: global_load_b32 v1, v0, s[6:7] 342; GFX11-NEXT: s_waitcnt vmcnt(0) 343; GFX11-NEXT: v_pk_lshlrev_b16 v1, v1, s0 344; GFX11-NEXT: global_store_b32 v0, v1, s[4:5] 345; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 346; GFX11-NEXT: s_endpgm 347 %tid = call i32 @llvm.amdgcn.workitem.id.x() 348 %tid.ext = sext i32 %tid to i64 349 %in.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in, i64 %tid.ext 350 %out.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 %tid.ext 351 %vgpr = load <2 x i16>, <2 x i16> addrspace(1)* %in.gep 352 %result = shl <2 x i16> %sgpr, %vgpr 353 store <2 x i16> %result, <2 x i16> addrspace(1)* %out.gep 354 ret void 355} 356 357define amdgpu_kernel void @shl_imm_v_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) #0 { 358; GFX9-LABEL: shl_imm_v_v2i16: 359; GFX9: ; %bb.0: 360; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 361; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0 362; GFX9-NEXT: s_waitcnt lgkmcnt(0) 363; GFX9-NEXT: global_load_dword v1, v0, s[2:3] 364; GFX9-NEXT: s_waitcnt vmcnt(0) 365; GFX9-NEXT: v_pk_lshlrev_b16 v1, v1, 8 op_sel_hi:[1,0] 366; GFX9-NEXT: global_store_dword v0, v1, s[0:1] 367; GFX9-NEXT: s_endpgm 368; 369; VI-LABEL: shl_imm_v_v2i16: 370; VI: ; %bb.0: 371; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 372; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0 373; VI-NEXT: v_mov_b32_e32 v4, 8 374; VI-NEXT: s_waitcnt lgkmcnt(0) 375; VI-NEXT: v_mov_b32_e32 v1, s3 376; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2 377; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 378; VI-NEXT: flat_load_dword v3, v[0:1] 379; VI-NEXT: v_mov_b32_e32 v1, s1 380; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v2 381; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 382; VI-NEXT: s_waitcnt vmcnt(0) 383; VI-NEXT: v_lshlrev_b16_e64 v2, v3, 8 384; VI-NEXT: v_lshlrev_b16_sdwa v3, v3, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD 385; VI-NEXT: v_or_b32_e32 v2, v2, v3 386; VI-NEXT: flat_store_dword v[0:1], v2 387; VI-NEXT: s_endpgm 388; 389; CI-LABEL: shl_imm_v_v2i16: 390; CI: ; %bb.0: 391; CI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 392; CI-NEXT: s_mov_b32 s7, 0xf000 393; CI-NEXT: s_mov_b32 s6, 0 394; CI-NEXT: v_lshlrev_b32_e32 v0, 2, v0 395; CI-NEXT: v_mov_b32_e32 v1, 0 396; CI-NEXT: s_waitcnt lgkmcnt(0) 397; CI-NEXT: s_mov_b64 s[4:5], s[2:3] 398; CI-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 399; CI-NEXT: s_mov_b64 s[2:3], s[6:7] 400; CI-NEXT: s_waitcnt vmcnt(0) 401; CI-NEXT: v_lshrrev_b32_e32 v3, 16, v2 402; CI-NEXT: v_lshl_b32_e32 v2, 8, v2 403; CI-NEXT: v_lshl_b32_e32 v3, 8, v3 404; CI-NEXT: v_and_b32_e32 v2, 0xfff8, v2 405; CI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 406; CI-NEXT: v_or_b32_e32 v2, v2, v3 407; CI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 408; CI-NEXT: s_endpgm 409; 410; GFX10-LABEL: shl_imm_v_v2i16: 411; GFX10: ; %bb.0: 412; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 413; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0 414; GFX10-NEXT: s_waitcnt lgkmcnt(0) 415; GFX10-NEXT: global_load_dword v1, v0, s[2:3] 416; GFX10-NEXT: s_waitcnt vmcnt(0) 417; GFX10-NEXT: v_pk_lshlrev_b16 v1, v1, 8 op_sel_hi:[1,0] 418; GFX10-NEXT: global_store_dword v0, v1, s[0:1] 419; GFX10-NEXT: s_endpgm 420; 421; GFX11-LABEL: shl_imm_v_v2i16: 422; GFX11: ; %bb.0: 423; GFX11-NEXT: s_load_b128 s[0:3], s[0:1], 0x24 424; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0 425; GFX11-NEXT: s_waitcnt lgkmcnt(0) 426; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] 427; GFX11-NEXT: s_waitcnt vmcnt(0) 428; GFX11-NEXT: v_pk_lshlrev_b16 v1, v1, 8 op_sel_hi:[1,0] 429; GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 430; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 431; GFX11-NEXT: s_endpgm 432 %tid = call i32 @llvm.amdgcn.workitem.id.x() 433 %tid.ext = sext i32 %tid to i64 434 %in.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in, i64 %tid.ext 435 %out.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 %tid.ext 436 %vgpr = load <2 x i16>, <2 x i16> addrspace(1)* %in.gep 437 %result = shl <2 x i16> <i16 8, i16 8>, %vgpr 438 store <2 x i16> %result, <2 x i16> addrspace(1)* %out.gep 439 ret void 440} 441 442define amdgpu_kernel void @shl_v_imm_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) #0 { 443; GFX9-LABEL: shl_v_imm_v2i16: 444; GFX9: ; %bb.0: 445; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 446; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0 447; GFX9-NEXT: s_waitcnt lgkmcnt(0) 448; GFX9-NEXT: global_load_dword v1, v0, s[2:3] 449; GFX9-NEXT: s_waitcnt vmcnt(0) 450; GFX9-NEXT: v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1] 451; GFX9-NEXT: global_store_dword v0, v1, s[0:1] 452; GFX9-NEXT: s_endpgm 453; 454; VI-LABEL: shl_v_imm_v2i16: 455; VI: ; %bb.0: 456; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 457; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0 458; VI-NEXT: s_waitcnt lgkmcnt(0) 459; VI-NEXT: v_mov_b32_e32 v1, s3 460; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2 461; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 462; VI-NEXT: flat_load_dword v3, v[0:1] 463; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v2 464; VI-NEXT: v_mov_b32_e32 v1, s1 465; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 466; VI-NEXT: s_waitcnt vmcnt(0) 467; VI-NEXT: v_lshlrev_b32_e32 v2, 8, v3 468; VI-NEXT: v_and_b32_e32 v2, 0xff000000, v2 469; VI-NEXT: v_lshlrev_b16_e32 v3, 8, v3 470; VI-NEXT: v_or_b32_e32 v2, v3, v2 471; VI-NEXT: flat_store_dword v[0:1], v2 472; VI-NEXT: s_endpgm 473; 474; CI-LABEL: shl_v_imm_v2i16: 475; CI: ; %bb.0: 476; CI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 477; CI-NEXT: s_mov_b32 s7, 0xf000 478; CI-NEXT: s_mov_b32 s6, 0 479; CI-NEXT: v_lshlrev_b32_e32 v0, 2, v0 480; CI-NEXT: v_mov_b32_e32 v1, 0 481; CI-NEXT: s_waitcnt lgkmcnt(0) 482; CI-NEXT: s_mov_b64 s[4:5], s[2:3] 483; CI-NEXT: buffer_load_dword v2, v[0:1], s[4:7], 0 addr64 484; CI-NEXT: s_mov_b64 s[2:3], s[6:7] 485; CI-NEXT: s_waitcnt vmcnt(0) 486; CI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 487; CI-NEXT: v_and_b32_e32 v2, 0xff00ff00, v2 488; CI-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 489; CI-NEXT: s_endpgm 490; 491; GFX10-LABEL: shl_v_imm_v2i16: 492; GFX10: ; %bb.0: 493; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 494; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0 495; GFX10-NEXT: s_waitcnt lgkmcnt(0) 496; GFX10-NEXT: global_load_dword v1, v0, s[2:3] 497; GFX10-NEXT: s_waitcnt vmcnt(0) 498; GFX10-NEXT: v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1] 499; GFX10-NEXT: global_store_dword v0, v1, s[0:1] 500; GFX10-NEXT: s_endpgm 501; 502; GFX11-LABEL: shl_v_imm_v2i16: 503; GFX11: ; %bb.0: 504; GFX11-NEXT: s_load_b128 s[0:3], s[0:1], 0x24 505; GFX11-NEXT: v_lshlrev_b32_e32 v0, 2, v0 506; GFX11-NEXT: s_waitcnt lgkmcnt(0) 507; GFX11-NEXT: global_load_b32 v1, v0, s[2:3] 508; GFX11-NEXT: s_waitcnt vmcnt(0) 509; GFX11-NEXT: v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1] 510; GFX11-NEXT: global_store_b32 v0, v1, s[0:1] 511; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 512; GFX11-NEXT: s_endpgm 513 %tid = call i32 @llvm.amdgcn.workitem.id.x() 514 %tid.ext = sext i32 %tid to i64 515 %in.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in, i64 %tid.ext 516 %out.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 %tid.ext 517 %vgpr = load <2 x i16>, <2 x i16> addrspace(1)* %in.gep 518 %result = shl <2 x i16> %vgpr, <i16 8, i16 8> 519 store <2 x i16> %result, <2 x i16> addrspace(1)* %out.gep 520 ret void 521} 522 523define amdgpu_kernel void @v_shl_v4i16(<4 x i16> addrspace(1)* %out, <4 x i16> addrspace(1)* %in) #0 { 524; GFX9-LABEL: v_shl_v4i16: 525; GFX9: ; %bb.0: 526; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 527; GFX9-NEXT: v_lshlrev_b32_e32 v4, 3, v0 528; GFX9-NEXT: s_waitcnt lgkmcnt(0) 529; GFX9-NEXT: global_load_dwordx4 v[0:3], v4, s[2:3] 530; GFX9-NEXT: s_waitcnt vmcnt(0) 531; GFX9-NEXT: v_pk_lshlrev_b16 v1, v3, v1 532; GFX9-NEXT: v_pk_lshlrev_b16 v0, v2, v0 533; GFX9-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1] 534; GFX9-NEXT: s_endpgm 535; 536; VI-LABEL: v_shl_v4i16: 537; VI: ; %bb.0: 538; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 539; VI-NEXT: v_lshlrev_b32_e32 v4, 3, v0 540; VI-NEXT: s_waitcnt lgkmcnt(0) 541; VI-NEXT: v_mov_b32_e32 v1, s3 542; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v4 543; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 544; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] 545; VI-NEXT: v_mov_b32_e32 v5, s1 546; VI-NEXT: v_add_u32_e32 v4, vcc, s0, v4 547; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc 548; VI-NEXT: s_waitcnt vmcnt(0) 549; VI-NEXT: v_lshlrev_b16_e32 v6, v3, v1 550; VI-NEXT: v_lshlrev_b16_sdwa v1, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 551; VI-NEXT: v_lshlrev_b16_e32 v3, v2, v0 552; VI-NEXT: v_lshlrev_b16_sdwa v0, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 553; VI-NEXT: v_or_b32_e32 v1, v6, v1 554; VI-NEXT: v_or_b32_e32 v0, v3, v0 555; VI-NEXT: flat_store_dwordx2 v[4:5], v[0:1] 556; VI-NEXT: s_endpgm 557; 558; CI-LABEL: v_shl_v4i16: 559; CI: ; %bb.0: 560; CI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 561; CI-NEXT: s_mov_b32 s7, 0xf000 562; CI-NEXT: s_mov_b32 s6, 0 563; CI-NEXT: v_lshlrev_b32_e32 v4, 3, v0 564; CI-NEXT: v_mov_b32_e32 v5, 0 565; CI-NEXT: s_waitcnt lgkmcnt(0) 566; CI-NEXT: s_mov_b64 s[4:5], s[2:3] 567; CI-NEXT: buffer_load_dwordx4 v[0:3], v[4:5], s[4:7], 0 addr64 568; CI-NEXT: s_mov_b64 s[2:3], s[6:7] 569; CI-NEXT: s_waitcnt vmcnt(0) 570; CI-NEXT: v_lshrrev_b32_e32 v6, 16, v0 571; CI-NEXT: v_lshrrev_b32_e32 v7, 16, v1 572; CI-NEXT: v_lshrrev_b32_e32 v8, 16, v2 573; CI-NEXT: v_lshrrev_b32_e32 v9, 16, v3 574; CI-NEXT: v_lshlrev_b32_e32 v1, v3, v1 575; CI-NEXT: v_lshlrev_b32_e32 v0, v2, v0 576; CI-NEXT: v_lshlrev_b32_e32 v2, v9, v7 577; CI-NEXT: v_lshlrev_b32_e32 v3, v8, v6 578; CI-NEXT: v_and_b32_e32 v1, 0xffff, v1 579; CI-NEXT: v_and_b32_e32 v0, 0xffff, v0 580; CI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 581; CI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 582; CI-NEXT: v_or_b32_e32 v1, v1, v2 583; CI-NEXT: v_or_b32_e32 v0, v0, v3 584; CI-NEXT: buffer_store_dwordx2 v[0:1], v[4:5], s[0:3], 0 addr64 585; CI-NEXT: s_endpgm 586; 587; GFX10-LABEL: v_shl_v4i16: 588; GFX10: ; %bb.0: 589; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 590; GFX10-NEXT: v_lshlrev_b32_e32 v4, 3, v0 591; GFX10-NEXT: s_waitcnt lgkmcnt(0) 592; GFX10-NEXT: global_load_dwordx4 v[0:3], v4, s[2:3] 593; GFX10-NEXT: s_waitcnt vmcnt(0) 594; GFX10-NEXT: v_pk_lshlrev_b16 v1, v3, v1 595; GFX10-NEXT: v_pk_lshlrev_b16 v0, v2, v0 596; GFX10-NEXT: global_store_dwordx2 v4, v[0:1], s[0:1] 597; GFX10-NEXT: s_endpgm 598; 599; GFX11-LABEL: v_shl_v4i16: 600; GFX11: ; %bb.0: 601; GFX11-NEXT: s_load_b128 s[0:3], s[0:1], 0x24 602; GFX11-NEXT: v_lshlrev_b32_e32 v4, 3, v0 603; GFX11-NEXT: s_waitcnt lgkmcnt(0) 604; GFX11-NEXT: global_load_b128 v[0:3], v4, s[2:3] 605; GFX11-NEXT: s_waitcnt vmcnt(0) 606; GFX11-NEXT: v_pk_lshlrev_b16 v1, v3, v1 607; GFX11-NEXT: v_pk_lshlrev_b16 v0, v2, v0 608; GFX11-NEXT: global_store_b64 v4, v[0:1], s[0:1] 609; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 610; GFX11-NEXT: s_endpgm 611 %tid = call i32 @llvm.amdgcn.workitem.id.x() 612 %tid.ext = sext i32 %tid to i64 613 %in.gep = getelementptr inbounds <4 x i16>, <4 x i16> addrspace(1)* %in, i64 %tid.ext 614 %out.gep = getelementptr inbounds <4 x i16>, <4 x i16> addrspace(1)* %out, i64 %tid.ext 615 %b_ptr = getelementptr <4 x i16>, <4 x i16> addrspace(1)* %in.gep, i32 1 616 %a = load <4 x i16>, <4 x i16> addrspace(1)* %in.gep 617 %b = load <4 x i16>, <4 x i16> addrspace(1)* %b_ptr 618 %result = shl <4 x i16> %a, %b 619 store <4 x i16> %result, <4 x i16> addrspace(1)* %out.gep 620 ret void 621} 622 623define amdgpu_kernel void @shl_v_imm_v4i16(<4 x i16> addrspace(1)* %out, <4 x i16> addrspace(1)* %in) #0 { 624; GFX9-LABEL: shl_v_imm_v4i16: 625; GFX9: ; %bb.0: 626; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 627; GFX9-NEXT: v_lshlrev_b32_e32 v2, 3, v0 628; GFX9-NEXT: s_waitcnt lgkmcnt(0) 629; GFX9-NEXT: global_load_dwordx2 v[0:1], v2, s[2:3] 630; GFX9-NEXT: s_waitcnt vmcnt(0) 631; GFX9-NEXT: v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1] 632; GFX9-NEXT: v_pk_lshlrev_b16 v0, 8, v0 op_sel_hi:[0,1] 633; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 634; GFX9-NEXT: s_endpgm 635; 636; VI-LABEL: shl_v_imm_v4i16: 637; VI: ; %bb.0: 638; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 639; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 640; VI-NEXT: s_waitcnt lgkmcnt(0) 641; VI-NEXT: v_mov_b32_e32 v1, s3 642; VI-NEXT: v_add_u32_e32 v0, vcc, s2, v2 643; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc 644; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1] 645; VI-NEXT: v_mov_b32_e32 v3, s1 646; VI-NEXT: v_add_u32_e32 v2, vcc, s0, v2 647; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc 648; VI-NEXT: s_waitcnt vmcnt(0) 649; VI-NEXT: v_lshlrev_b32_e32 v4, 8, v1 650; VI-NEXT: v_lshlrev_b16_e32 v5, 8, v0 651; VI-NEXT: v_lshlrev_b32_e32 v0, 8, v0 652; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v1 653; VI-NEXT: v_and_b32_e32 v4, 0xff000000, v4 654; VI-NEXT: v_and_b32_e32 v0, 0xff000000, v0 655; VI-NEXT: v_or_b32_e32 v1, v1, v4 656; VI-NEXT: v_or_b32_e32 v0, v5, v0 657; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] 658; VI-NEXT: s_endpgm 659; 660; CI-LABEL: shl_v_imm_v4i16: 661; CI: ; %bb.0: 662; CI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9 663; CI-NEXT: s_mov_b32 s7, 0xf000 664; CI-NEXT: s_mov_b32 s6, 0 665; CI-NEXT: v_lshlrev_b32_e32 v0, 3, v0 666; CI-NEXT: v_mov_b32_e32 v1, 0 667; CI-NEXT: s_waitcnt lgkmcnt(0) 668; CI-NEXT: s_mov_b64 s[4:5], s[2:3] 669; CI-NEXT: buffer_load_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64 670; CI-NEXT: s_mov_b64 s[2:3], s[6:7] 671; CI-NEXT: s_waitcnt vmcnt(0) 672; CI-NEXT: v_lshlrev_b32_e32 v4, 8, v3 673; CI-NEXT: v_lshrrev_b32_e32 v3, 8, v3 674; CI-NEXT: v_and_b32_e32 v3, 0xff00, v3 675; CI-NEXT: v_lshlrev_b32_e32 v2, 8, v2 676; CI-NEXT: v_and_b32_e32 v4, 0xff00, v4 677; CI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 678; CI-NEXT: v_or_b32_e32 v3, v4, v3 679; CI-NEXT: v_and_b32_e32 v2, 0xff00ff00, v2 680; CI-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[0:3], 0 addr64 681; CI-NEXT: s_endpgm 682; 683; GFX10-LABEL: shl_v_imm_v4i16: 684; GFX10: ; %bb.0: 685; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 686; GFX10-NEXT: v_lshlrev_b32_e32 v2, 3, v0 687; GFX10-NEXT: s_waitcnt lgkmcnt(0) 688; GFX10-NEXT: global_load_dwordx2 v[0:1], v2, s[2:3] 689; GFX10-NEXT: s_waitcnt vmcnt(0) 690; GFX10-NEXT: v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1] 691; GFX10-NEXT: v_pk_lshlrev_b16 v0, 8, v0 op_sel_hi:[0,1] 692; GFX10-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] 693; GFX10-NEXT: s_endpgm 694; 695; GFX11-LABEL: shl_v_imm_v4i16: 696; GFX11: ; %bb.0: 697; GFX11-NEXT: s_load_b128 s[0:3], s[0:1], 0x24 698; GFX11-NEXT: v_lshlrev_b32_e32 v2, 3, v0 699; GFX11-NEXT: s_waitcnt lgkmcnt(0) 700; GFX11-NEXT: global_load_b64 v[0:1], v2, s[2:3] 701; GFX11-NEXT: s_waitcnt vmcnt(0) 702; GFX11-NEXT: v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1] 703; GFX11-NEXT: v_pk_lshlrev_b16 v0, 8, v0 op_sel_hi:[0,1] 704; GFX11-NEXT: global_store_b64 v2, v[0:1], s[0:1] 705; GFX11-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS) 706; GFX11-NEXT: s_endpgm 707 %tid = call i32 @llvm.amdgcn.workitem.id.x() 708 %tid.ext = sext i32 %tid to i64 709 %in.gep = getelementptr inbounds <4 x i16>, <4 x i16> addrspace(1)* %in, i64 %tid.ext 710 %out.gep = getelementptr inbounds <4 x i16>, <4 x i16> addrspace(1)* %out, i64 %tid.ext 711 %vgpr = load <4 x i16>, <4 x i16> addrspace(1)* %in.gep 712 %result = shl <4 x i16> %vgpr, <i16 8, i16 8, i16 8, i16 8> 713 store <4 x i16> %result, <4 x i16> addrspace(1)* %out.gep 714 ret void 715} 716 717declare i32 @llvm.amdgcn.workitem.id.x() #1 718 719attributes #0 = { nounwind } 720attributes #1 = { nounwind readnone } 721