1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -mcpu=gfx900 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX9 %s
3; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=VI %s
4; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=CI %s
5; RUN: llc -march=amdgcn -mcpu=gfx1010 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX10 %s
6; RUN: llc -march=amdgcn -mcpu=gfx1100 -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX11 %s
7
8define amdgpu_kernel void @s_shl_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> %lhs, <2 x i16> %rhs) #0 {
9; GFX9-LABEL: s_shl_v2i16:
10; GFX9:       ; %bb.0:
11; GFX9-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0x2c
12; GFX9-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x24
13; GFX9-NEXT:    s_mov_b32 s7, 0xf000
14; GFX9-NEXT:    s_mov_b32 s6, -1
15; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
16; GFX9-NEXT:    v_mov_b32_e32 v0, s2
17; GFX9-NEXT:    v_pk_lshlrev_b16 v0, s3, v0
18; GFX9-NEXT:    buffer_store_dword v0, off, s[4:7], 0
19; GFX9-NEXT:    s_endpgm
20;
21; VI-LABEL: s_shl_v2i16:
22; VI:       ; %bb.0:
23; VI-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x2c
24; VI-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x24
25; VI-NEXT:    s_mov_b32 s3, 0xf000
26; VI-NEXT:    s_mov_b32 s2, -1
27; VI-NEXT:    s_waitcnt lgkmcnt(0)
28; VI-NEXT:    s_and_b32 s6, s4, 0xffff
29; VI-NEXT:    s_lshr_b32 s4, s4, 16
30; VI-NEXT:    s_lshr_b32 s7, s5, 16
31; VI-NEXT:    s_lshl_b32 s4, s4, s7
32; VI-NEXT:    s_lshl_b32 s5, s6, s5
33; VI-NEXT:    s_lshl_b32 s4, s4, 16
34; VI-NEXT:    s_and_b32 s5, s5, 0xffff
35; VI-NEXT:    s_or_b32 s4, s5, s4
36; VI-NEXT:    v_mov_b32_e32 v0, s4
37; VI-NEXT:    buffer_store_dword v0, off, s[0:3], 0
38; VI-NEXT:    s_endpgm
39;
40; CI-LABEL: s_shl_v2i16:
41; CI:       ; %bb.0:
42; CI-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0xb
43; CI-NEXT:    s_load_dwordx2 s[0:1], s[0:1], 0x9
44; CI-NEXT:    s_mov_b32 s3, 0xf000
45; CI-NEXT:    s_mov_b32 s2, -1
46; CI-NEXT:    s_waitcnt lgkmcnt(0)
47; CI-NEXT:    s_lshr_b32 s6, s4, 16
48; CI-NEXT:    s_lshr_b32 s7, s5, 16
49; CI-NEXT:    s_lshl_b32 s6, s6, s7
50; CI-NEXT:    s_lshl_b32 s4, s4, s5
51; CI-NEXT:    s_lshl_b32 s6, s6, 16
52; CI-NEXT:    s_and_b32 s4, s4, 0xffff
53; CI-NEXT:    s_or_b32 s4, s4, s6
54; CI-NEXT:    v_mov_b32_e32 v0, s4
55; CI-NEXT:    buffer_store_dword v0, off, s[0:3], 0
56; CI-NEXT:    s_endpgm
57;
58; GFX10-LABEL: s_shl_v2i16:
59; GFX10:       ; %bb.0:
60; GFX10-NEXT:    s_clause 0x1
61; GFX10-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0x2c
62; GFX10-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x24
63; GFX10-NEXT:    s_mov_b32 s7, 0x31016000
64; GFX10-NEXT:    s_mov_b32 s6, -1
65; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
66; GFX10-NEXT:    v_pk_lshlrev_b16 v0, s3, s2
67; GFX10-NEXT:    buffer_store_dword v0, off, s[4:7], 0
68; GFX10-NEXT:    s_endpgm
69;
70; GFX11-LABEL: s_shl_v2i16:
71; GFX11:       ; %bb.0:
72; GFX11-NEXT:    s_clause 0x1
73; GFX11-NEXT:    s_load_b64 s[2:3], s[0:1], 0x2c
74; GFX11-NEXT:    s_load_b64 s[0:1], s[0:1], 0x24
75; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
76; GFX11-NEXT:    v_pk_lshlrev_b16 v0, s3, s2
77; GFX11-NEXT:    s_mov_b32 s3, 0x31016000
78; GFX11-NEXT:    s_mov_b32 s2, -1
79; GFX11-NEXT:    buffer_store_b32 v0, off, s[0:3], 0
80; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
81; GFX11-NEXT:    s_endpgm
82  %result = shl <2 x i16> %lhs, %rhs
83  store <2 x i16> %result, <2 x i16> addrspace(1)* %out
84  ret void
85}
86
87define amdgpu_kernel void @v_shl_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) #0 {
88; GFX9-LABEL: v_shl_v2i16:
89; GFX9:       ; %bb.0:
90; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
91; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
92; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
93; GFX9-NEXT:    global_load_dwordx2 v[0:1], v2, s[2:3]
94; GFX9-NEXT:    s_waitcnt vmcnt(0)
95; GFX9-NEXT:    v_pk_lshlrev_b16 v0, v1, v0
96; GFX9-NEXT:    global_store_dword v2, v0, s[0:1]
97; GFX9-NEXT:    s_endpgm
98;
99; VI-LABEL: v_shl_v2i16:
100; VI:       ; %bb.0:
101; VI-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
102; VI-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
103; VI-NEXT:    s_waitcnt lgkmcnt(0)
104; VI-NEXT:    v_mov_b32_e32 v1, s3
105; VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
106; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
107; VI-NEXT:    flat_load_dwordx2 v[0:1], v[0:1]
108; VI-NEXT:    v_mov_b32_e32 v3, s1
109; VI-NEXT:    v_add_u32_e32 v2, vcc, s0, v2
110; VI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
111; VI-NEXT:    s_waitcnt vmcnt(0)
112; VI-NEXT:    v_lshlrev_b16_e32 v4, v1, v0
113; VI-NEXT:    v_lshlrev_b16_sdwa v0, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
114; VI-NEXT:    v_or_b32_e32 v0, v4, v0
115; VI-NEXT:    flat_store_dword v[2:3], v0
116; VI-NEXT:    s_endpgm
117;
118; CI-LABEL: v_shl_v2i16:
119; CI:       ; %bb.0:
120; CI-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
121; CI-NEXT:    s_mov_b32 s7, 0xf000
122; CI-NEXT:    s_mov_b32 s6, 0
123; CI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
124; CI-NEXT:    v_mov_b32_e32 v1, 0
125; CI-NEXT:    s_waitcnt lgkmcnt(0)
126; CI-NEXT:    s_mov_b64 s[4:5], s[2:3]
127; CI-NEXT:    buffer_load_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
128; CI-NEXT:    s_mov_b64 s[2:3], s[6:7]
129; CI-NEXT:    s_waitcnt vmcnt(0)
130; CI-NEXT:    v_lshrrev_b32_e32 v4, 16, v2
131; CI-NEXT:    v_lshrrev_b32_e32 v5, 16, v3
132; CI-NEXT:    v_lshlrev_b32_e32 v2, v3, v2
133; CI-NEXT:    v_lshlrev_b32_e32 v3, v5, v4
134; CI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
135; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
136; CI-NEXT:    v_or_b32_e32 v2, v2, v3
137; CI-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
138; CI-NEXT:    s_endpgm
139;
140; GFX10-LABEL: v_shl_v2i16:
141; GFX10:       ; %bb.0:
142; GFX10-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
143; GFX10-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
144; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
145; GFX10-NEXT:    global_load_dwordx2 v[0:1], v2, s[2:3]
146; GFX10-NEXT:    s_waitcnt vmcnt(0)
147; GFX10-NEXT:    v_pk_lshlrev_b16 v0, v1, v0
148; GFX10-NEXT:    global_store_dword v2, v0, s[0:1]
149; GFX10-NEXT:    s_endpgm
150;
151; GFX11-LABEL: v_shl_v2i16:
152; GFX11:       ; %bb.0:
153; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
154; GFX11-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
155; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
156; GFX11-NEXT:    global_load_b64 v[0:1], v2, s[2:3]
157; GFX11-NEXT:    s_waitcnt vmcnt(0)
158; GFX11-NEXT:    v_pk_lshlrev_b16 v0, v1, v0
159; GFX11-NEXT:    global_store_b32 v2, v0, s[0:1]
160; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
161; GFX11-NEXT:    s_endpgm
162  %tid = call i32 @llvm.amdgcn.workitem.id.x()
163  %tid.ext = sext i32 %tid to i64
164  %in.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in, i64 %tid.ext
165  %out.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 %tid.ext
166  %b_ptr = getelementptr <2 x i16>, <2 x i16> addrspace(1)* %in.gep, i32 1
167  %a = load <2 x i16>, <2 x i16> addrspace(1)* %in.gep
168  %b = load <2 x i16>, <2 x i16> addrspace(1)* %b_ptr
169  %result = shl <2 x i16> %a, %b
170  store <2 x i16> %result, <2 x i16> addrspace(1)* %out.gep
171  ret void
172}
173
174define amdgpu_kernel void @shl_v_s_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %in, <2 x i16> %sgpr) #0 {
175; GFX9-LABEL: shl_v_s_v2i16:
176; GFX9:       ; %bb.0:
177; GFX9-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
178; GFX9-NEXT:    s_load_dword s2, s[0:1], 0x34
179; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
180; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
181; GFX9-NEXT:    global_load_dword v1, v0, s[6:7]
182; GFX9-NEXT:    s_waitcnt vmcnt(0)
183; GFX9-NEXT:    v_pk_lshlrev_b16 v1, s2, v1
184; GFX9-NEXT:    global_store_dword v0, v1, s[4:5]
185; GFX9-NEXT:    s_endpgm
186;
187; VI-LABEL: shl_v_s_v2i16:
188; VI:       ; %bb.0:
189; VI-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
190; VI-NEXT:    s_load_dword s0, s[0:1], 0x34
191; VI-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
192; VI-NEXT:    s_waitcnt lgkmcnt(0)
193; VI-NEXT:    v_mov_b32_e32 v1, s7
194; VI-NEXT:    v_add_u32_e32 v0, vcc, s6, v2
195; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
196; VI-NEXT:    flat_load_dword v3, v[0:1]
197; VI-NEXT:    s_lshr_b32 s1, s0, 16
198; VI-NEXT:    v_add_u32_e32 v0, vcc, s4, v2
199; VI-NEXT:    v_mov_b32_e32 v2, s1
200; VI-NEXT:    v_mov_b32_e32 v1, s5
201; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
202; VI-NEXT:    s_waitcnt vmcnt(0)
203; VI-NEXT:    v_lshlrev_b16_e32 v4, s0, v3
204; VI-NEXT:    v_lshlrev_b16_sdwa v2, v2, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
205; VI-NEXT:    v_or_b32_e32 v2, v4, v2
206; VI-NEXT:    flat_store_dword v[0:1], v2
207; VI-NEXT:    s_endpgm
208;
209; CI-LABEL: shl_v_s_v2i16:
210; CI:       ; %bb.0:
211; CI-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
212; CI-NEXT:    s_load_dword s8, s[0:1], 0xd
213; CI-NEXT:    s_mov_b32 s3, 0xf000
214; CI-NEXT:    s_mov_b32 s2, 0
215; CI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
216; CI-NEXT:    s_waitcnt lgkmcnt(0)
217; CI-NEXT:    s_mov_b64 s[0:1], s[6:7]
218; CI-NEXT:    v_mov_b32_e32 v1, 0
219; CI-NEXT:    buffer_load_dword v2, v[0:1], s[0:3], 0 addr64
220; CI-NEXT:    s_lshr_b32 s0, s8, 16
221; CI-NEXT:    s_mov_b64 s[6:7], s[2:3]
222; CI-NEXT:    s_waitcnt vmcnt(0)
223; CI-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
224; CI-NEXT:    v_lshlrev_b32_e32 v2, s8, v2
225; CI-NEXT:    v_lshlrev_b32_e32 v3, s0, v3
226; CI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
227; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
228; CI-NEXT:    v_or_b32_e32 v2, v2, v3
229; CI-NEXT:    buffer_store_dword v2, v[0:1], s[4:7], 0 addr64
230; CI-NEXT:    s_endpgm
231;
232; GFX10-LABEL: shl_v_s_v2i16:
233; GFX10:       ; %bb.0:
234; GFX10-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
235; GFX10-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
236; GFX10-NEXT:    s_load_dword s0, s[0:1], 0x34
237; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
238; GFX10-NEXT:    global_load_dword v1, v0, s[6:7]
239; GFX10-NEXT:    s_waitcnt vmcnt(0)
240; GFX10-NEXT:    v_pk_lshlrev_b16 v1, s0, v1
241; GFX10-NEXT:    global_store_dword v0, v1, s[4:5]
242; GFX10-NEXT:    s_endpgm
243;
244; GFX11-LABEL: shl_v_s_v2i16:
245; GFX11:       ; %bb.0:
246; GFX11-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
247; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
248; GFX11-NEXT:    s_load_b32 s0, s[0:1], 0x34
249; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
250; GFX11-NEXT:    global_load_b32 v1, v0, s[6:7]
251; GFX11-NEXT:    s_waitcnt vmcnt(0)
252; GFX11-NEXT:    v_pk_lshlrev_b16 v1, s0, v1
253; GFX11-NEXT:    global_store_b32 v0, v1, s[4:5]
254; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
255; GFX11-NEXT:    s_endpgm
256  %tid = call i32 @llvm.amdgcn.workitem.id.x()
257  %tid.ext = sext i32 %tid to i64
258  %in.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in, i64 %tid.ext
259  %out.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 %tid.ext
260  %vgpr = load <2 x i16>, <2 x i16> addrspace(1)* %in.gep
261  %result = shl <2 x i16> %vgpr, %sgpr
262  store <2 x i16> %result, <2 x i16> addrspace(1)* %out.gep
263  ret void
264}
265
266define amdgpu_kernel void @shl_s_v_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %in, <2 x i16> %sgpr) #0 {
267; GFX9-LABEL: shl_s_v_v2i16:
268; GFX9:       ; %bb.0:
269; GFX9-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
270; GFX9-NEXT:    s_load_dword s2, s[0:1], 0x34
271; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
272; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
273; GFX9-NEXT:    global_load_dword v1, v0, s[6:7]
274; GFX9-NEXT:    s_waitcnt vmcnt(0)
275; GFX9-NEXT:    v_pk_lshlrev_b16 v1, v1, s2
276; GFX9-NEXT:    global_store_dword v0, v1, s[4:5]
277; GFX9-NEXT:    s_endpgm
278;
279; VI-LABEL: shl_s_v_v2i16:
280; VI:       ; %bb.0:
281; VI-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
282; VI-NEXT:    s_load_dword s0, s[0:1], 0x34
283; VI-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
284; VI-NEXT:    s_waitcnt lgkmcnt(0)
285; VI-NEXT:    v_mov_b32_e32 v1, s7
286; VI-NEXT:    v_add_u32_e32 v0, vcc, s6, v2
287; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
288; VI-NEXT:    flat_load_dword v3, v[0:1]
289; VI-NEXT:    s_lshr_b32 s1, s0, 16
290; VI-NEXT:    v_add_u32_e32 v0, vcc, s4, v2
291; VI-NEXT:    v_mov_b32_e32 v2, s1
292; VI-NEXT:    v_mov_b32_e32 v1, s5
293; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
294; VI-NEXT:    s_waitcnt vmcnt(0)
295; VI-NEXT:    v_lshlrev_b16_e64 v4, v3, s0
296; VI-NEXT:    v_lshlrev_b16_sdwa v2, v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
297; VI-NEXT:    v_or_b32_e32 v2, v4, v2
298; VI-NEXT:    flat_store_dword v[0:1], v2
299; VI-NEXT:    s_endpgm
300;
301; CI-LABEL: shl_s_v_v2i16:
302; CI:       ; %bb.0:
303; CI-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x9
304; CI-NEXT:    s_load_dword s8, s[0:1], 0xd
305; CI-NEXT:    s_mov_b32 s3, 0xf000
306; CI-NEXT:    s_mov_b32 s2, 0
307; CI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
308; CI-NEXT:    s_waitcnt lgkmcnt(0)
309; CI-NEXT:    s_mov_b64 s[0:1], s[6:7]
310; CI-NEXT:    v_mov_b32_e32 v1, 0
311; CI-NEXT:    buffer_load_dword v2, v[0:1], s[0:3], 0 addr64
312; CI-NEXT:    s_lshr_b32 s0, s8, 16
313; CI-NEXT:    s_mov_b64 s[6:7], s[2:3]
314; CI-NEXT:    s_waitcnt vmcnt(0)
315; CI-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
316; CI-NEXT:    v_lshl_b32_e32 v2, s8, v2
317; CI-NEXT:    v_lshl_b32_e32 v3, s0, v3
318; CI-NEXT:    v_and_b32_e32 v2, 0xffff, v2
319; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
320; CI-NEXT:    v_or_b32_e32 v2, v2, v3
321; CI-NEXT:    buffer_store_dword v2, v[0:1], s[4:7], 0 addr64
322; CI-NEXT:    s_endpgm
323;
324; GFX10-LABEL: shl_s_v_v2i16:
325; GFX10:       ; %bb.0:
326; GFX10-NEXT:    s_load_dwordx4 s[4:7], s[0:1], 0x24
327; GFX10-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
328; GFX10-NEXT:    s_load_dword s0, s[0:1], 0x34
329; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
330; GFX10-NEXT:    global_load_dword v1, v0, s[6:7]
331; GFX10-NEXT:    s_waitcnt vmcnt(0)
332; GFX10-NEXT:    v_pk_lshlrev_b16 v1, v1, s0
333; GFX10-NEXT:    global_store_dword v0, v1, s[4:5]
334; GFX10-NEXT:    s_endpgm
335;
336; GFX11-LABEL: shl_s_v_v2i16:
337; GFX11:       ; %bb.0:
338; GFX11-NEXT:    s_load_b128 s[4:7], s[0:1], 0x24
339; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
340; GFX11-NEXT:    s_load_b32 s0, s[0:1], 0x34
341; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
342; GFX11-NEXT:    global_load_b32 v1, v0, s[6:7]
343; GFX11-NEXT:    s_waitcnt vmcnt(0)
344; GFX11-NEXT:    v_pk_lshlrev_b16 v1, v1, s0
345; GFX11-NEXT:    global_store_b32 v0, v1, s[4:5]
346; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
347; GFX11-NEXT:    s_endpgm
348  %tid = call i32 @llvm.amdgcn.workitem.id.x()
349  %tid.ext = sext i32 %tid to i64
350  %in.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in, i64 %tid.ext
351  %out.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 %tid.ext
352  %vgpr = load <2 x i16>, <2 x i16> addrspace(1)* %in.gep
353  %result = shl <2 x i16> %sgpr, %vgpr
354  store <2 x i16> %result, <2 x i16> addrspace(1)* %out.gep
355  ret void
356}
357
358define amdgpu_kernel void @shl_imm_v_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) #0 {
359; GFX9-LABEL: shl_imm_v_v2i16:
360; GFX9:       ; %bb.0:
361; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
362; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
363; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
364; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
365; GFX9-NEXT:    s_waitcnt vmcnt(0)
366; GFX9-NEXT:    v_pk_lshlrev_b16 v1, v1, 8 op_sel_hi:[1,0]
367; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
368; GFX9-NEXT:    s_endpgm
369;
370; VI-LABEL: shl_imm_v_v2i16:
371; VI:       ; %bb.0:
372; VI-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
373; VI-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
374; VI-NEXT:    v_mov_b32_e32 v4, 8
375; VI-NEXT:    s_waitcnt lgkmcnt(0)
376; VI-NEXT:    v_mov_b32_e32 v1, s3
377; VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
378; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
379; VI-NEXT:    flat_load_dword v3, v[0:1]
380; VI-NEXT:    v_mov_b32_e32 v1, s1
381; VI-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
382; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
383; VI-NEXT:    s_waitcnt vmcnt(0)
384; VI-NEXT:    v_lshlrev_b16_e64 v2, v3, 8
385; VI-NEXT:    v_lshlrev_b16_sdwa v3, v3, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
386; VI-NEXT:    v_or_b32_e32 v2, v2, v3
387; VI-NEXT:    flat_store_dword v[0:1], v2
388; VI-NEXT:    s_endpgm
389;
390; CI-LABEL: shl_imm_v_v2i16:
391; CI:       ; %bb.0:
392; CI-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
393; CI-NEXT:    s_mov_b32 s7, 0xf000
394; CI-NEXT:    s_mov_b32 s6, 0
395; CI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
396; CI-NEXT:    v_mov_b32_e32 v1, 0
397; CI-NEXT:    s_waitcnt lgkmcnt(0)
398; CI-NEXT:    s_mov_b64 s[4:5], s[2:3]
399; CI-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
400; CI-NEXT:    s_mov_b64 s[2:3], s[6:7]
401; CI-NEXT:    s_waitcnt vmcnt(0)
402; CI-NEXT:    v_lshrrev_b32_e32 v3, 16, v2
403; CI-NEXT:    v_lshl_b32_e32 v2, 8, v2
404; CI-NEXT:    v_lshl_b32_e32 v3, 8, v3
405; CI-NEXT:    v_and_b32_e32 v2, 0xfff8, v2
406; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
407; CI-NEXT:    v_or_b32_e32 v2, v2, v3
408; CI-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
409; CI-NEXT:    s_endpgm
410;
411; GFX10-LABEL: shl_imm_v_v2i16:
412; GFX10:       ; %bb.0:
413; GFX10-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
414; GFX10-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
415; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
416; GFX10-NEXT:    global_load_dword v1, v0, s[2:3]
417; GFX10-NEXT:    s_waitcnt vmcnt(0)
418; GFX10-NEXT:    v_pk_lshlrev_b16 v1, v1, 8 op_sel_hi:[1,0]
419; GFX10-NEXT:    global_store_dword v0, v1, s[0:1]
420; GFX10-NEXT:    s_endpgm
421;
422; GFX11-LABEL: shl_imm_v_v2i16:
423; GFX11:       ; %bb.0:
424; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
425; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
426; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
427; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
428; GFX11-NEXT:    s_waitcnt vmcnt(0)
429; GFX11-NEXT:    v_pk_lshlrev_b16 v1, v1, 8 op_sel_hi:[1,0]
430; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
431; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
432; GFX11-NEXT:    s_endpgm
433  %tid = call i32 @llvm.amdgcn.workitem.id.x()
434  %tid.ext = sext i32 %tid to i64
435  %in.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in, i64 %tid.ext
436  %out.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 %tid.ext
437  %vgpr = load <2 x i16>, <2 x i16> addrspace(1)* %in.gep
438  %result = shl <2 x i16> <i16 8, i16 8>, %vgpr
439  store <2 x i16> %result, <2 x i16> addrspace(1)* %out.gep
440  ret void
441}
442
443define amdgpu_kernel void @shl_v_imm_v2i16(<2 x i16> addrspace(1)* %out, <2 x i16> addrspace(1)* %in) #0 {
444; GFX9-LABEL: shl_v_imm_v2i16:
445; GFX9:       ; %bb.0:
446; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
447; GFX9-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
448; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
449; GFX9-NEXT:    global_load_dword v1, v0, s[2:3]
450; GFX9-NEXT:    s_waitcnt vmcnt(0)
451; GFX9-NEXT:    v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1]
452; GFX9-NEXT:    global_store_dword v0, v1, s[0:1]
453; GFX9-NEXT:    s_endpgm
454;
455; VI-LABEL: shl_v_imm_v2i16:
456; VI:       ; %bb.0:
457; VI-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
458; VI-NEXT:    v_lshlrev_b32_e32 v2, 2, v0
459; VI-NEXT:    s_waitcnt lgkmcnt(0)
460; VI-NEXT:    v_mov_b32_e32 v1, s3
461; VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
462; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
463; VI-NEXT:    flat_load_dword v3, v[0:1]
464; VI-NEXT:    v_add_u32_e32 v0, vcc, s0, v2
465; VI-NEXT:    v_mov_b32_e32 v1, s1
466; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
467; VI-NEXT:    s_waitcnt vmcnt(0)
468; VI-NEXT:    v_lshlrev_b32_e32 v2, 8, v3
469; VI-NEXT:    v_and_b32_e32 v2, 0xff000000, v2
470; VI-NEXT:    v_lshlrev_b16_e32 v3, 8, v3
471; VI-NEXT:    v_or_b32_e32 v2, v3, v2
472; VI-NEXT:    flat_store_dword v[0:1], v2
473; VI-NEXT:    s_endpgm
474;
475; CI-LABEL: shl_v_imm_v2i16:
476; CI:       ; %bb.0:
477; CI-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
478; CI-NEXT:    s_mov_b32 s7, 0xf000
479; CI-NEXT:    s_mov_b32 s6, 0
480; CI-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
481; CI-NEXT:    v_mov_b32_e32 v1, 0
482; CI-NEXT:    s_waitcnt lgkmcnt(0)
483; CI-NEXT:    s_mov_b64 s[4:5], s[2:3]
484; CI-NEXT:    buffer_load_dword v2, v[0:1], s[4:7], 0 addr64
485; CI-NEXT:    s_mov_b64 s[2:3], s[6:7]
486; CI-NEXT:    s_waitcnt vmcnt(0)
487; CI-NEXT:    v_lshlrev_b32_e32 v2, 8, v2
488; CI-NEXT:    v_and_b32_e32 v2, 0xff00ff00, v2
489; CI-NEXT:    buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
490; CI-NEXT:    s_endpgm
491;
492; GFX10-LABEL: shl_v_imm_v2i16:
493; GFX10:       ; %bb.0:
494; GFX10-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
495; GFX10-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
496; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
497; GFX10-NEXT:    global_load_dword v1, v0, s[2:3]
498; GFX10-NEXT:    s_waitcnt vmcnt(0)
499; GFX10-NEXT:    v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1]
500; GFX10-NEXT:    global_store_dword v0, v1, s[0:1]
501; GFX10-NEXT:    s_endpgm
502;
503; GFX11-LABEL: shl_v_imm_v2i16:
504; GFX11:       ; %bb.0:
505; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
506; GFX11-NEXT:    v_lshlrev_b32_e32 v0, 2, v0
507; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
508; GFX11-NEXT:    global_load_b32 v1, v0, s[2:3]
509; GFX11-NEXT:    s_waitcnt vmcnt(0)
510; GFX11-NEXT:    v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1]
511; GFX11-NEXT:    global_store_b32 v0, v1, s[0:1]
512; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
513; GFX11-NEXT:    s_endpgm
514  %tid = call i32 @llvm.amdgcn.workitem.id.x()
515  %tid.ext = sext i32 %tid to i64
516  %in.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %in, i64 %tid.ext
517  %out.gep = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 %tid.ext
518  %vgpr = load <2 x i16>, <2 x i16> addrspace(1)* %in.gep
519  %result = shl <2 x i16> %vgpr, <i16 8, i16 8>
520  store <2 x i16> %result, <2 x i16> addrspace(1)* %out.gep
521  ret void
522}
523
524define amdgpu_kernel void @v_shl_v4i16(<4 x i16> addrspace(1)* %out, <4 x i16> addrspace(1)* %in) #0 {
525; GFX9-LABEL: v_shl_v4i16:
526; GFX9:       ; %bb.0:
527; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
528; GFX9-NEXT:    v_lshlrev_b32_e32 v4, 3, v0
529; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
530; GFX9-NEXT:    global_load_dwordx4 v[0:3], v4, s[2:3]
531; GFX9-NEXT:    s_waitcnt vmcnt(0)
532; GFX9-NEXT:    v_pk_lshlrev_b16 v1, v3, v1
533; GFX9-NEXT:    v_pk_lshlrev_b16 v0, v2, v0
534; GFX9-NEXT:    global_store_dwordx2 v4, v[0:1], s[0:1]
535; GFX9-NEXT:    s_endpgm
536;
537; VI-LABEL: v_shl_v4i16:
538; VI:       ; %bb.0:
539; VI-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
540; VI-NEXT:    v_lshlrev_b32_e32 v4, 3, v0
541; VI-NEXT:    s_waitcnt lgkmcnt(0)
542; VI-NEXT:    v_mov_b32_e32 v1, s3
543; VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v4
544; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
545; VI-NEXT:    flat_load_dwordx4 v[0:3], v[0:1]
546; VI-NEXT:    v_mov_b32_e32 v5, s1
547; VI-NEXT:    v_add_u32_e32 v4, vcc, s0, v4
548; VI-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
549; VI-NEXT:    s_waitcnt vmcnt(0)
550; VI-NEXT:    v_lshlrev_b16_e32 v6, v3, v1
551; VI-NEXT:    v_lshlrev_b16_sdwa v1, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
552; VI-NEXT:    v_lshlrev_b16_e32 v3, v2, v0
553; VI-NEXT:    v_lshlrev_b16_sdwa v0, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
554; VI-NEXT:    v_or_b32_e32 v1, v6, v1
555; VI-NEXT:    v_or_b32_e32 v0, v3, v0
556; VI-NEXT:    flat_store_dwordx2 v[4:5], v[0:1]
557; VI-NEXT:    s_endpgm
558;
559; CI-LABEL: v_shl_v4i16:
560; CI:       ; %bb.0:
561; CI-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
562; CI-NEXT:    s_mov_b32 s7, 0xf000
563; CI-NEXT:    s_mov_b32 s6, 0
564; CI-NEXT:    v_lshlrev_b32_e32 v4, 3, v0
565; CI-NEXT:    v_mov_b32_e32 v5, 0
566; CI-NEXT:    s_waitcnt lgkmcnt(0)
567; CI-NEXT:    s_mov_b64 s[4:5], s[2:3]
568; CI-NEXT:    buffer_load_dwordx4 v[0:3], v[4:5], s[4:7], 0 addr64
569; CI-NEXT:    s_mov_b64 s[2:3], s[6:7]
570; CI-NEXT:    s_waitcnt vmcnt(0)
571; CI-NEXT:    v_lshrrev_b32_e32 v6, 16, v0
572; CI-NEXT:    v_lshrrev_b32_e32 v7, 16, v1
573; CI-NEXT:    v_lshrrev_b32_e32 v8, 16, v2
574; CI-NEXT:    v_lshrrev_b32_e32 v9, 16, v3
575; CI-NEXT:    v_lshlrev_b32_e32 v1, v3, v1
576; CI-NEXT:    v_lshlrev_b32_e32 v0, v2, v0
577; CI-NEXT:    v_lshlrev_b32_e32 v2, v9, v7
578; CI-NEXT:    v_lshlrev_b32_e32 v3, v8, v6
579; CI-NEXT:    v_and_b32_e32 v1, 0xffff, v1
580; CI-NEXT:    v_and_b32_e32 v0, 0xffff, v0
581; CI-NEXT:    v_lshlrev_b32_e32 v2, 16, v2
582; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
583; CI-NEXT:    v_or_b32_e32 v1, v1, v2
584; CI-NEXT:    v_or_b32_e32 v0, v0, v3
585; CI-NEXT:    buffer_store_dwordx2 v[0:1], v[4:5], s[0:3], 0 addr64
586; CI-NEXT:    s_endpgm
587;
588; GFX10-LABEL: v_shl_v4i16:
589; GFX10:       ; %bb.0:
590; GFX10-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
591; GFX10-NEXT:    v_lshlrev_b32_e32 v4, 3, v0
592; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
593; GFX10-NEXT:    global_load_dwordx4 v[0:3], v4, s[2:3]
594; GFX10-NEXT:    s_waitcnt vmcnt(0)
595; GFX10-NEXT:    v_pk_lshlrev_b16 v1, v3, v1
596; GFX10-NEXT:    v_pk_lshlrev_b16 v0, v2, v0
597; GFX10-NEXT:    global_store_dwordx2 v4, v[0:1], s[0:1]
598; GFX10-NEXT:    s_endpgm
599;
600; GFX11-LABEL: v_shl_v4i16:
601; GFX11:       ; %bb.0:
602; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
603; GFX11-NEXT:    v_lshlrev_b32_e32 v4, 3, v0
604; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
605; GFX11-NEXT:    global_load_b128 v[0:3], v4, s[2:3]
606; GFX11-NEXT:    s_waitcnt vmcnt(0)
607; GFX11-NEXT:    v_pk_lshlrev_b16 v1, v3, v1
608; GFX11-NEXT:    v_pk_lshlrev_b16 v0, v2, v0
609; GFX11-NEXT:    global_store_b64 v4, v[0:1], s[0:1]
610; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
611; GFX11-NEXT:    s_endpgm
612  %tid = call i32 @llvm.amdgcn.workitem.id.x()
613  %tid.ext = sext i32 %tid to i64
614  %in.gep = getelementptr inbounds <4 x i16>, <4 x i16> addrspace(1)* %in, i64 %tid.ext
615  %out.gep = getelementptr inbounds <4 x i16>, <4 x i16> addrspace(1)* %out, i64 %tid.ext
616  %b_ptr = getelementptr <4 x i16>, <4 x i16> addrspace(1)* %in.gep, i32 1
617  %a = load <4 x i16>, <4 x i16> addrspace(1)* %in.gep
618  %b = load <4 x i16>, <4 x i16> addrspace(1)* %b_ptr
619  %result = shl <4 x i16> %a, %b
620  store <4 x i16> %result, <4 x i16> addrspace(1)* %out.gep
621  ret void
622}
623
624define amdgpu_kernel void @shl_v_imm_v4i16(<4 x i16> addrspace(1)* %out, <4 x i16> addrspace(1)* %in) #0 {
625; GFX9-LABEL: shl_v_imm_v4i16:
626; GFX9:       ; %bb.0:
627; GFX9-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
628; GFX9-NEXT:    v_lshlrev_b32_e32 v2, 3, v0
629; GFX9-NEXT:    s_waitcnt lgkmcnt(0)
630; GFX9-NEXT:    global_load_dwordx2 v[0:1], v2, s[2:3]
631; GFX9-NEXT:    s_waitcnt vmcnt(0)
632; GFX9-NEXT:    v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1]
633; GFX9-NEXT:    v_pk_lshlrev_b16 v0, 8, v0 op_sel_hi:[0,1]
634; GFX9-NEXT:    global_store_dwordx2 v2, v[0:1], s[0:1]
635; GFX9-NEXT:    s_endpgm
636;
637; VI-LABEL: shl_v_imm_v4i16:
638; VI:       ; %bb.0:
639; VI-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
640; VI-NEXT:    v_lshlrev_b32_e32 v2, 3, v0
641; VI-NEXT:    s_waitcnt lgkmcnt(0)
642; VI-NEXT:    v_mov_b32_e32 v1, s3
643; VI-NEXT:    v_add_u32_e32 v0, vcc, s2, v2
644; VI-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
645; VI-NEXT:    flat_load_dwordx2 v[0:1], v[0:1]
646; VI-NEXT:    v_mov_b32_e32 v3, s1
647; VI-NEXT:    v_add_u32_e32 v2, vcc, s0, v2
648; VI-NEXT:    v_addc_u32_e32 v3, vcc, 0, v3, vcc
649; VI-NEXT:    s_waitcnt vmcnt(0)
650; VI-NEXT:    v_lshlrev_b32_e32 v4, 8, v1
651; VI-NEXT:    v_lshlrev_b16_e32 v5, 8, v0
652; VI-NEXT:    v_lshlrev_b32_e32 v0, 8, v0
653; VI-NEXT:    v_lshlrev_b16_e32 v1, 8, v1
654; VI-NEXT:    v_and_b32_e32 v4, 0xff000000, v4
655; VI-NEXT:    v_and_b32_e32 v0, 0xff000000, v0
656; VI-NEXT:    v_or_b32_e32 v1, v1, v4
657; VI-NEXT:    v_or_b32_e32 v0, v5, v0
658; VI-NEXT:    flat_store_dwordx2 v[2:3], v[0:1]
659; VI-NEXT:    s_endpgm
660;
661; CI-LABEL: shl_v_imm_v4i16:
662; CI:       ; %bb.0:
663; CI-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x9
664; CI-NEXT:    s_mov_b32 s7, 0xf000
665; CI-NEXT:    s_mov_b32 s6, 0
666; CI-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
667; CI-NEXT:    v_mov_b32_e32 v1, 0
668; CI-NEXT:    s_waitcnt lgkmcnt(0)
669; CI-NEXT:    s_mov_b64 s[4:5], s[2:3]
670; CI-NEXT:    buffer_load_dwordx2 v[2:3], v[0:1], s[4:7], 0 addr64
671; CI-NEXT:    s_mov_b64 s[2:3], s[6:7]
672; CI-NEXT:    s_waitcnt vmcnt(0)
673; CI-NEXT:    v_lshlrev_b32_e32 v4, 8, v3
674; CI-NEXT:    v_lshrrev_b32_e32 v3, 8, v3
675; CI-NEXT:    v_and_b32_e32 v3, 0xff00, v3
676; CI-NEXT:    v_lshlrev_b32_e32 v2, 8, v2
677; CI-NEXT:    v_and_b32_e32 v4, 0xff00, v4
678; CI-NEXT:    v_lshlrev_b32_e32 v3, 16, v3
679; CI-NEXT:    v_or_b32_e32 v3, v4, v3
680; CI-NEXT:    v_and_b32_e32 v2, 0xff00ff00, v2
681; CI-NEXT:    buffer_store_dwordx2 v[2:3], v[0:1], s[0:3], 0 addr64
682; CI-NEXT:    s_endpgm
683;
684; GFX10-LABEL: shl_v_imm_v4i16:
685; GFX10:       ; %bb.0:
686; GFX10-NEXT:    s_load_dwordx4 s[0:3], s[0:1], 0x24
687; GFX10-NEXT:    v_lshlrev_b32_e32 v2, 3, v0
688; GFX10-NEXT:    s_waitcnt lgkmcnt(0)
689; GFX10-NEXT:    global_load_dwordx2 v[0:1], v2, s[2:3]
690; GFX10-NEXT:    s_waitcnt vmcnt(0)
691; GFX10-NEXT:    v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1]
692; GFX10-NEXT:    v_pk_lshlrev_b16 v0, 8, v0 op_sel_hi:[0,1]
693; GFX10-NEXT:    global_store_dwordx2 v2, v[0:1], s[0:1]
694; GFX10-NEXT:    s_endpgm
695;
696; GFX11-LABEL: shl_v_imm_v4i16:
697; GFX11:       ; %bb.0:
698; GFX11-NEXT:    s_load_b128 s[0:3], s[0:1], 0x24
699; GFX11-NEXT:    v_lshlrev_b32_e32 v2, 3, v0
700; GFX11-NEXT:    s_waitcnt lgkmcnt(0)
701; GFX11-NEXT:    global_load_b64 v[0:1], v2, s[2:3]
702; GFX11-NEXT:    s_waitcnt vmcnt(0)
703; GFX11-NEXT:    v_pk_lshlrev_b16 v1, 8, v1 op_sel_hi:[0,1]
704; GFX11-NEXT:    v_pk_lshlrev_b16 v0, 8, v0 op_sel_hi:[0,1]
705; GFX11-NEXT:    global_store_b64 v2, v[0:1], s[0:1]
706; GFX11-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
707; GFX11-NEXT:    s_endpgm
708  %tid = call i32 @llvm.amdgcn.workitem.id.x()
709  %tid.ext = sext i32 %tid to i64
710  %in.gep = getelementptr inbounds <4 x i16>, <4 x i16> addrspace(1)* %in, i64 %tid.ext
711  %out.gep = getelementptr inbounds <4 x i16>, <4 x i16> addrspace(1)* %out, i64 %tid.ext
712  %vgpr = load <4 x i16>, <4 x i16> addrspace(1)* %in.gep
713  %result = shl <4 x i16> %vgpr, <i16 8, i16 8, i16 8, i16 8>
714  store <4 x i16> %result, <4 x i16> addrspace(1)* %out.gep
715  ret void
716}
717
718declare i32 @llvm.amdgcn.workitem.id.x() #1
719
720attributes #0 = { nounwind }
721attributes #1 = { nounwind readnone }
722