1; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck --check-prefix=GCN %s
2
3; Test with zero frame
4; GCN-LABEL: {{^}}func1
5; GCN: v_mov_b32_e32 v0, s30
6; GCN: v_mov_b32_e32 v1, s31
7; GCN: s_setpc_b64 s[30:31]
8define i8* @func1() nounwind {
9entry:
10  %0 = tail call i8* @llvm.returnaddress(i32 0)
11  ret i8* %0
12}
13
14; Test with non-zero frame
15; GCN-LABEL: {{^}}func2
16; GCN: v_mov_b32_e32 v0, 0
17; GCN: v_mov_b32_e32 v1, 0
18; GCN: s_setpc_b64 s[30:31]
19define i8* @func2() nounwind {
20entry:
21  %0 = tail call i8* @llvm.returnaddress(i32 1)
22  ret i8* %0
23}
24
25; Test with amdgpu_kernel
26; GCN-LABEL: {{^}}func3
27; GCN: v_mov_b32_e32 v0, 0
28; GCN: v_mov_b32_e32 v1, v0
29define amdgpu_kernel void @func3(i8** %out) nounwind {
30entry:
31  %tmp = tail call i8* @llvm.returnaddress(i32 0)
32  store i8* %tmp, i8** %out, align 4
33  ret void
34}
35
36; Test with use outside the entry-block
37; GCN-LABEL: {{^}}func4
38; GCN: v_mov_b32_e32 v0, 0
39; GCN: v_mov_b32_e32 v1, v0
40define amdgpu_kernel void @func4(i8** %out, i32 %val) nounwind {
41entry:
42  %cmp = icmp ne i32 %val, 0
43  br i1 %cmp, label %store, label %exit
44
45store:
46  %tmp = tail call i8* @llvm.returnaddress(i32 1)
47  store i8* %tmp, i8** %out, align 4
48  ret void
49
50exit:
51  ret void
52}
53
54; Test ending in unreachable
55; GCN-LABEL: {{^}}func5
56; GCN: v_mov_b32_e32 v0, 0
57define void @func5() nounwind {
58entry:
59  %tmp = tail call i8* @llvm.returnaddress(i32 2)
60  store volatile i32 0, i32 addrspace(3)* undef, align 4
61  unreachable
62}
63
64
65declare i8* @llvm.returnaddress(i32) nounwind readnone
66