1; RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -verify-machineinstrs < %s 2>&1 | FileCheck %s
2
3; This testcase fails register allocation at the same time it performs
4; virtual register splitting (by introducing VGPR to AGPR copies). We
5; still need to enqueue and allocate the newly split vregs after the
6; failure.
7
8; The machine verifier complains about usage of register
9; which is marked as killed in previous instruction.
10; This happens due to when register allocator is out of registers
11; it takes the first avialable register.
12
13; CHECK: error: ran out of registers during register allocation
14; CHECK: Bad machine code: Using an undefined physical register
15define amdgpu_kernel void @alloc_failure_with_split_vregs(float %v0, float %v1) #0 {
16  %agpr0 = call float asm sideeffect "; def $0", "=${a0}"()
17  %agpr.vec = insertelement <16 x float> undef, float %agpr0, i32 0
18  %mfma0 = call <16 x float> @llvm.amdgcn.mfma.f32.16x16x1f32(float %v0, float %v1, <16 x float> %agpr.vec, i32 0, i32 0, i32 0)
19  %mfma0.3 = extractelement <16 x float> %mfma0, i32 3
20  %insert = insertelement <16 x float> %mfma0, float %agpr0, i32 8
21  %mfma1 = call <16 x float> @llvm.amdgcn.mfma.f32.16x16x1f32(float %v0, float %v1, <16 x float> %insert, i32 0, i32 0, i32 0)
22  %mfma1.3 = extractelement <16 x float> %mfma1, i32 3
23  call void asm sideeffect "; use $0", "{a1}"(float %mfma1.3)
24  ret void
25}
26
27declare <16 x float> @llvm.amdgcn.mfma.f32.16x16x1f32(float, float, <16 x float>, i32 immarg, i32 immarg, i32 immarg) #1
28declare i32 @llvm.amdgcn.workitem.id.x() #2
29
30attributes #0 = { "amdgpu-waves-per-eu"="10,10" }
31attributes #1 = { convergent nounwind readnone willreturn }
32attributes #2 = { nounwind readnone speculatable willreturn }
33