1; RUN: not llc -march=amdgcn -mcpu=gfx908 -verify-machineinstrs -o - %s 2>%t.err | FileCheck %s
2; RUN: FileCheck -check-prefix=ERR %s < %t.err
3
4; ERR: error: inline assembly requires more registers than available
5; ERR: error: inline assembly requires more registers than available
6
7%asm.output = type { <16 x i32>, <8 x i32>, <5 x i32>, <4 x i32>, <16 x i32> }
8
9; CHECK-LABEL: {{^}}illegal_eviction_assert:
10; CHECK: ; def v[0:15] v[20:27] v[0:4] v[16:19] a[0:15]
11; CHECK: ; clobber
12; CHECK: ; use v[0:15] v[20:27] v[0:4] v[16:19] a[1:16]
13define void @illegal_eviction_assert(<32 x i32> addrspace(1)* %arg) #0 {
14  ;%agpr0 = call i32 asm sideeffect "; def $0","=${a0}"()
15  %asm = call %asm.output asm sideeffect "; def $0 $1 $2 $3 $4","=v,=v,=v,=v,={a[0:15]}"()
16  %vgpr0 = extractvalue %asm.output %asm, 0
17  %vgpr1 = extractvalue %asm.output %asm, 1
18  %vgpr2 = extractvalue %asm.output %asm, 2
19  %vgpr3 = extractvalue %asm.output %asm, 3
20  %agpr0 = extractvalue %asm.output %asm, 4
21  call void asm sideeffect "; clobber", "~{v[0:31]}"()
22  call void asm sideeffect "; use $0 $1 $2 $3 $4","v,v,v,v,{a[1:16]}"(<16 x i32> %vgpr0, <8 x i32> %vgpr1, <5 x i32> %vgpr2, <4 x i32> %vgpr3, <16 x i32> %agpr0)
23  ret void
24}
25
26attributes #0 = { "amdgpu-waves-per-eu"="8,8" }
27