1; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-promote-alloca < %s | FileCheck --check-prefix=OPT %s 2 3; Make sure that array alloca loaded and stored as multi-element aggregates are handled correctly 4; Strictly the promote-alloca pass shouldn't have to deal with this case as it is non-canonical, but 5; the pass should handle it gracefully if it is 6; The checks look for lines that previously caused issues in PromoteAlloca (non-canonical). Opt 7; should now leave these unchanged 8 9; OPT-LABEL: @promote_1d_aggr( 10; OPT: store [1 x float] %tmp3, [1 x float]* %f1 11 12%Block = type { [1 x float], i32 } 13%gl_PerVertex = type { <4 x float>, float, [1 x float], [1 x float] } 14 15@block = external addrspace(1) global %Block 16@pv = external addrspace(1) global %gl_PerVertex 17 18define amdgpu_vs void @promote_1d_aggr() #0 { 19 %i = alloca i32 20 %f1 = alloca [1 x float] 21 %tmp = getelementptr %Block, %Block addrspace(1)* @block, i32 0, i32 1 22 %tmp1 = load i32, i32 addrspace(1)* %tmp 23 store i32 %tmp1, i32* %i 24 %tmp2 = getelementptr %Block, %Block addrspace(1)* @block, i32 0, i32 0 25 %tmp3 = load [1 x float], [1 x float] addrspace(1)* %tmp2 26 store [1 x float] %tmp3, [1 x float]* %f1 27 %tmp4 = load i32, i32* %i 28 %tmp5 = getelementptr [1 x float], [1 x float]* %f1, i32 0, i32 %tmp4 29 %tmp6 = load float, float* %tmp5 30 %tmp7 = alloca <4 x float> 31 %tmp8 = load <4 x float>, <4 x float>* %tmp7 32 %tmp9 = insertelement <4 x float> %tmp8, float %tmp6, i32 0 33 %tmp10 = insertelement <4 x float> %tmp9, float %tmp6, i32 1 34 %tmp11 = insertelement <4 x float> %tmp10, float %tmp6, i32 2 35 %tmp12 = insertelement <4 x float> %tmp11, float %tmp6, i32 3 36 %tmp13 = getelementptr %gl_PerVertex, %gl_PerVertex addrspace(1)* @pv, i32 0, i32 0 37 store <4 x float> %tmp12, <4 x float> addrspace(1)* %tmp13 38 ret void 39} 40 41 42; OPT-LABEL: @promote_store_aggr( 43; OPT: %tmp6 = load [2 x float], [2 x float]* %f1 44 45%Block2 = type { i32, [2 x float] } 46@block2 = external addrspace(1) global %Block2 47 48define amdgpu_vs void @promote_store_aggr() #0 { 49 %i = alloca i32 50 %f1 = alloca [2 x float] 51 %tmp = getelementptr %Block2, %Block2 addrspace(1)* @block2, i32 0, i32 0 52 %tmp1 = load i32, i32 addrspace(1)* %tmp 53 store i32 %tmp1, i32* %i 54 %tmp2 = load i32, i32* %i 55 %tmp3 = sitofp i32 %tmp2 to float 56 %tmp4 = getelementptr [2 x float], [2 x float]* %f1, i32 0, i32 0 57 store float %tmp3, float* %tmp4 58 %tmp5 = getelementptr [2 x float], [2 x float]* %f1, i32 0, i32 1 59 store float 2.000000e+00, float* %tmp5 60 %tmp6 = load [2 x float], [2 x float]* %f1 61 %tmp7 = getelementptr %Block2, %Block2 addrspace(1)* @block2, i32 0, i32 1 62 store [2 x float] %tmp6, [2 x float] addrspace(1)* %tmp7 63 %tmp8 = getelementptr %gl_PerVertex, %gl_PerVertex addrspace(1)* @pv, i32 0, i32 0 64 store <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float> addrspace(1)* %tmp8 65 ret void 66} 67 68; OPT-LABEL: @promote_load_from_store_aggr( 69; OPT: store [2 x float] %tmp3, [2 x float]* %f1 70 71%Block3 = type { [2 x float], i32 } 72@block3 = external addrspace(1) global %Block3 73 74define amdgpu_vs void @promote_load_from_store_aggr() #0 { 75 %i = alloca i32 76 %f1 = alloca [2 x float] 77 %tmp = getelementptr %Block3, %Block3 addrspace(1)* @block3, i32 0, i32 1 78 %tmp1 = load i32, i32 addrspace(1)* %tmp 79 store i32 %tmp1, i32* %i 80 %tmp2 = getelementptr %Block3, %Block3 addrspace(1)* @block3, i32 0, i32 0 81 %tmp3 = load [2 x float], [2 x float] addrspace(1)* %tmp2 82 store [2 x float] %tmp3, [2 x float]* %f1 83 %tmp4 = load i32, i32* %i 84 %tmp5 = getelementptr [2 x float], [2 x float]* %f1, i32 0, i32 %tmp4 85 %tmp6 = load float, float* %tmp5 86 %tmp7 = alloca <4 x float> 87 %tmp8 = load <4 x float>, <4 x float>* %tmp7 88 %tmp9 = insertelement <4 x float> %tmp8, float %tmp6, i32 0 89 %tmp10 = insertelement <4 x float> %tmp9, float %tmp6, i32 1 90 %tmp11 = insertelement <4 x float> %tmp10, float %tmp6, i32 2 91 %tmp12 = insertelement <4 x float> %tmp11, float %tmp6, i32 3 92 %tmp13 = getelementptr %gl_PerVertex, %gl_PerVertex addrspace(1)* @pv, i32 0, i32 0 93 store <4 x float> %tmp12, <4 x float> addrspace(1)* %tmp13 94 ret void 95} 96 97; OPT-LABEL: @promote_double_aggr( 98; OPT: store [2 x double] %tmp5, [2 x double]* %s 99 100@tmp_g = external addrspace(1) global { [4 x double], <2 x double>, <3 x double>, <4 x double> } 101@frag_color = external addrspace(1) global <4 x float> 102 103define amdgpu_ps void @promote_double_aggr() #0 { 104 %s = alloca [2 x double] 105 %tmp = getelementptr { [4 x double], <2 x double>, <3 x double>, <4 x double> }, { [4 x double], <2 x double>, <3 x double>, <4 x double> } addrspace(1)* @tmp_g, i32 0, i32 0, i32 0 106 %tmp1 = load double, double addrspace(1)* %tmp 107 %tmp2 = getelementptr { [4 x double], <2 x double>, <3 x double>, <4 x double> }, { [4 x double], <2 x double>, <3 x double>, <4 x double> } addrspace(1)* @tmp_g, i32 0, i32 0, i32 1 108 %tmp3 = load double, double addrspace(1)* %tmp2 109 %tmp4 = insertvalue [2 x double] undef, double %tmp1, 0 110 %tmp5 = insertvalue [2 x double] %tmp4, double %tmp3, 1 111 store [2 x double] %tmp5, [2 x double]* %s 112 %tmp6 = getelementptr [2 x double], [2 x double]* %s, i32 0, i32 1 113 %tmp7 = load double, double* %tmp6 114 %tmp8 = getelementptr [2 x double], [2 x double]* %s, i32 0, i32 1 115 %tmp9 = load double, double* %tmp8 116 %tmp10 = fadd double %tmp7, %tmp9 117 %tmp11 = getelementptr [2 x double], [2 x double]* %s, i32 0, i32 0 118 store double %tmp10, double* %tmp11 119 %tmp12 = getelementptr [2 x double], [2 x double]* %s, i32 0, i32 0 120 %tmp13 = load double, double* %tmp12 121 %tmp14 = getelementptr [2 x double], [2 x double]* %s, i32 0, i32 1 122 %tmp15 = load double, double* %tmp14 123 %tmp16 = fadd double %tmp13, %tmp15 124 %tmp17 = fptrunc double %tmp16 to float 125 %tmp18 = insertelement <4 x float> undef, float %tmp17, i32 0 126 %tmp19 = insertelement <4 x float> %tmp18, float %tmp17, i32 1 127 %tmp20 = insertelement <4 x float> %tmp19, float %tmp17, i32 2 128 %tmp21 = insertelement <4 x float> %tmp20, float %tmp17, i32 3 129 store <4 x float> %tmp21, <4 x float> addrspace(1)* @frag_color 130 ret void 131} 132