1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=amdgcn-mesa-mesa3d -run-pass=si-optimize-exec-masking-pre-ra -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s 3 4# Check for regression from assuming an instruction was a copy after 5# dropping the opcode check. 6--- 7name: exec_src1_is_not_copy 8tracksRegLiveness: true 9machineFunctionInfo: 10 isEntryFunction: true 11 scratchRSrcReg: '$sgpr96_sgpr97_sgpr98_sgpr99' 12 frameOffsetReg: '$sgpr101' 13body: | 14 ; GCN-LABEL: name: exec_src1_is_not_copy 15 ; GCN: bb.0: 16 ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 17 ; GCN-NEXT: liveins: $vgpr0 18 ; GCN-NEXT: {{ $}} 19 ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $exec 20 ; GCN-NEXT: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF 21 ; GCN-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 0, [[DEF]], implicit $exec 22 ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec 23 ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY1]], [[V_CMP_NE_U32_e64_]], implicit-def dead $scc 24 ; GCN-NEXT: [[S_XOR_B64_:%[0-9]+]]:sreg_64 = S_XOR_B64 [[S_AND_B64_]], [[COPY1]], implicit-def dead $scc 25 ; GCN-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_]] 26 ; GCN-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec 27 ; GCN-NEXT: S_BRANCH %bb.1 28 ; GCN-NEXT: {{ $}} 29 ; GCN-NEXT: bb.1: 30 ; GCN-NEXT: successors: %bb.2(0x80000000) 31 ; GCN-NEXT: {{ $}} 32 ; GCN-NEXT: {{ $}} 33 ; GCN-NEXT: bb.2: 34 ; GCN-NEXT: successors: %bb.3(0x40000000), %bb.6(0x40000000) 35 ; GCN-NEXT: {{ $}} 36 ; GCN-NEXT: [[S_OR_SAVEEXEC_B64_:%[0-9]+]]:sreg_64 = S_OR_SAVEEXEC_B64 [[S_XOR_B64_]], implicit-def $exec, implicit-def $scc, implicit $exec 37 ; GCN-NEXT: $exec = S_AND_B64 $exec, [[COPY]], implicit-def dead $scc 38 ; GCN-NEXT: [[S_AND_B64_1:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, [[S_OR_SAVEEXEC_B64_]], implicit-def $scc 39 ; GCN-NEXT: $exec = S_XOR_B64_term $exec, [[S_AND_B64_1]], implicit-def $scc 40 ; GCN-NEXT: S_CBRANCH_EXECZ %bb.6, implicit $exec 41 ; GCN-NEXT: S_BRANCH %bb.3 42 ; GCN-NEXT: {{ $}} 43 ; GCN-NEXT: bb.3: 44 ; GCN-NEXT: successors: %bb.4(0x40000000), %bb.5(0x40000000) 45 ; GCN-NEXT: {{ $}} 46 ; GCN-NEXT: [[V_CMP_NE_U32_e64_1:%[0-9]+]]:sreg_64 = V_CMP_NE_U32_e64 0, [[DEF]], implicit $exec 47 ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_64 = COPY $exec, implicit-def $exec 48 ; GCN-NEXT: [[S_AND_B64_2:%[0-9]+]]:sreg_64 = S_AND_B64 [[COPY2]], [[V_CMP_NE_U32_e64_1]], implicit-def dead $scc 49 ; GCN-NEXT: $exec = S_MOV_B64_term [[S_AND_B64_2]] 50 ; GCN-NEXT: S_CBRANCH_EXECZ %bb.5, implicit $exec 51 ; GCN-NEXT: S_BRANCH %bb.4 52 ; GCN-NEXT: {{ $}} 53 ; GCN-NEXT: bb.4: 54 ; GCN-NEXT: successors: %bb.5(0x80000000) 55 ; GCN-NEXT: {{ $}} 56 ; GCN-NEXT: {{ $}} 57 ; GCN-NEXT: bb.5: 58 ; GCN-NEXT: successors: %bb.6(0x80000000) 59 ; GCN-NEXT: {{ $}} 60 ; GCN-NEXT: $exec = S_OR_B64 $exec, [[COPY2]], implicit-def $scc 61 ; GCN-NEXT: {{ $}} 62 ; GCN-NEXT: bb.6: 63 ; GCN-NEXT: $exec = S_OR_B64 $exec, [[S_AND_B64_1]], implicit-def $scc 64 bb.0: 65 successors: %bb.1, %bb.2 66 liveins: $vgpr0 67 68 %0:sreg_64 = COPY $exec 69 %1:vgpr_32 = IMPLICIT_DEF 70 %2:sreg_64 = V_CMP_NE_U32_e64 0, %1, implicit $exec 71 %3:sreg_64 = COPY $exec, implicit-def $exec 72 %4:sreg_64 = S_AND_B64 %3, %2, implicit-def dead $scc 73 %5:sreg_64 = S_XOR_B64 %4, %3, implicit-def dead $scc 74 $exec = S_MOV_B64_term %4 75 S_CBRANCH_EXECZ %bb.2, implicit $exec 76 S_BRANCH %bb.1 77 78 bb.1: 79 80 bb.2: 81 successors: %bb.3, %bb.6 82 83 %6:sreg_64 = S_OR_SAVEEXEC_B64 %5, implicit-def $exec, implicit-def $scc, implicit $exec 84 $exec = S_AND_B64 $exec, %0, implicit-def dead $scc 85 %7:sreg_64 = S_AND_B64 $exec, %6, implicit-def $scc 86 $exec = S_XOR_B64_term $exec, %7, implicit-def $scc 87 S_CBRANCH_EXECZ %bb.6, implicit $exec 88 S_BRANCH %bb.3 89 90 bb.3: 91 successors: %bb.4, %bb.5 92 93 %8:sreg_64 = V_CMP_NE_U32_e64 0, %1, implicit $exec 94 %9:sreg_64 = COPY $exec, implicit-def $exec 95 %10:sreg_64 = S_AND_B64 %9, %8, implicit-def dead $scc 96 $exec = S_MOV_B64_term %10 97 S_CBRANCH_EXECZ %bb.5, implicit $exec 98 S_BRANCH %bb.4 99 100 bb.4: 101 102 bb.5: 103 $exec = S_OR_B64 $exec, %9, implicit-def $scc 104 105 bb.6: 106 $exec = S_OR_B64 $exec, %7, implicit-def $scc 107 108... 109 110# When folding a v_cndmask and a v_cmp in a pattern leading to 111# s_cbranch_vccz, ensure that an undef operand is handled correctly. 112--- 113name: cndmask_cmp_cbranch_fold_undef 114tracksRegLiveness: true 115body: | 116 ; GCN-LABEL: name: cndmask_cmp_cbranch_fold_undef 117 ; GCN: bb.0: 118 ; GCN-NEXT: successors: %bb.1(0x80000000) 119 ; GCN-NEXT: {{ $}} 120 ; GCN-NEXT: $vcc = S_ANDN2_B64 $exec, undef %1:sreg_64_xexec, implicit-def dead $scc 121 ; GCN-NEXT: S_CBRANCH_VCCZ %bb.1, implicit $vcc 122 ; GCN-NEXT: {{ $}} 123 ; GCN-NEXT: bb.1: 124 bb.0: 125 126 %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, undef %0:sreg_64_xexec, implicit $exec 127 V_CMP_NE_U32_e32 1, %1, implicit-def $vcc, implicit $exec 128 $vcc = S_AND_B64 $exec, $vcc, implicit-def dead $scc 129 S_CBRANCH_VCCZ %bb.1, implicit $vcc 130 131 bb.1: 132 133... 134 135# Don't crash on exec copy to SGPR subregister. 136--- 137name: exec_copy_to_subreg 138tracksRegLiveness: true 139body: | 140 ; GCN-LABEL: name: exec_copy_to_subreg 141 ; GCN: bb.0: 142 ; GCN-NEXT: successors: %bb.1(0x80000000) 143 ; GCN-NEXT: {{ $}} 144 ; GCN-NEXT: dead undef %0.sub0:sgpr_256 = COPY $exec 145 ; GCN-NEXT: dead %1:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, undef %2:sreg_64_xexec, implicit $exec 146 ; GCN-NEXT: S_BRANCH %bb.1 147 ; GCN-NEXT: {{ $}} 148 ; GCN-NEXT: bb.1: 149 bb.0: 150 151 undef %0.sub0:sgpr_256 = COPY $exec 152 %2:vgpr_32 = V_CNDMASK_B32_e64 0, 0, 0, 1, undef %1:sreg_64_xexec, implicit $exec 153 S_BRANCH %bb.1 154 155 bb.1: 156 157... 158