1;RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s -check-prefix=CHECK
2;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s -check-prefix=CHECK
3
4; Test that buffer_load_format with VGPR resource descriptor is properly
5; legalized.
6
7; CHECK-LABEL: {{^}}test_none:
8; CHECK: buffer_load_format_x v0, off, {{s\[[0-9]+:[0-9]+\]}}, 0{{$}}
9define amdgpu_vs float @test_none(<4 x i32> addrspace(2)* inreg %base, i32 %i) {
10main_body:
11  %ptr = getelementptr <4 x i32>, <4 x i32> addrspace(2)* %base, i32 %i
12  %tmp2 = load <4 x i32>, <4 x i32> addrspace(2)* %ptr, align 32
13  %tmp7 = call float @llvm.amdgcn.buffer.load.format.f32(<4 x i32> %tmp2, i32 0, i32 0, i1 0, i1 0)
14  ret float %tmp7
15}
16
17; CHECK-LABEL: {{^}}test_idxen:
18; CHECK: buffer_load_format_x v0, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, 0 idxen{{$}}
19define amdgpu_vs float @test_idxen(<4 x i32> addrspace(2)* inreg %base, i32 %i) {
20main_body:
21  %ptr = getelementptr <4 x i32>, <4 x i32> addrspace(2)* %base, i32 %i
22  %tmp2 = load <4 x i32>, <4 x i32> addrspace(2)* %ptr, align 32
23  %tmp7 = call float @llvm.amdgcn.buffer.load.format.f32(<4 x i32> %tmp2, i32 undef, i32 0, i1 0, i1 0)
24  ret float %tmp7
25}
26
27; CHECK-LABEL: {{^}}test_offen:
28; CHECK: buffer_load_format_x v0, {{v[0-9]+}}, {{s\[[0-9]+:[0-9]+\]}}, 0 offen{{$}}
29define amdgpu_vs float @test_offen(<4 x i32> addrspace(2)* inreg %base, i32 %i) {
30main_body:
31  %ptr = getelementptr <4 x i32>, <4 x i32> addrspace(2)* %base, i32 %i
32  %tmp2 = load <4 x i32>, <4 x i32> addrspace(2)* %ptr, align 32
33  %tmp7 = call float @llvm.amdgcn.buffer.load.format.f32(<4 x i32> %tmp2, i32 0, i32 undef, i1 0, i1 0)
34  ret float %tmp7
35}
36
37; CHECK-LABEL: {{^}}test_both:
38; CHECK: buffer_load_format_x v0, {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 idxen offen{{$}}
39define amdgpu_vs float @test_both(<4 x i32> addrspace(2)* inreg %base, i32 %i) {
40main_body:
41  %ptr = getelementptr <4 x i32>, <4 x i32> addrspace(2)* %base, i32 %i
42  %tmp2 = load <4 x i32>, <4 x i32> addrspace(2)* %ptr, align 32
43  %tmp7 = call float @llvm.amdgcn.buffer.load.format.f32(<4 x i32> %tmp2, i32 undef, i32 undef, i1 0, i1 0)
44  ret float %tmp7
45}
46
47declare float @llvm.amdgcn.buffer.load.format.f32(<4 x i32>, i32, i32, i1, i1) nounwind readonly
48
49attributes #0 = { nounwind readnone }
50