1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -mcpu=gfx902 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
3
4define amdgpu_kernel void @vector_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) {
5; GCN-LABEL: vector_clause:
6; GCN:       ; %bb.0: ; %bb
7; GCN-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0x24
8; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x2c
9; GCN-NEXT:    v_lshlrev_b32_e32 v16, 4, v0
10; GCN-NEXT:    s_waitcnt lgkmcnt(0)
11; GCN-NEXT:    global_load_dwordx4 v[0:3], v16, s[2:3]
12; GCN-NEXT:    global_load_dwordx4 v[4:7], v16, s[2:3] offset:16
13; GCN-NEXT:    global_load_dwordx4 v[8:11], v16, s[2:3] offset:32
14; GCN-NEXT:    global_load_dwordx4 v[12:15], v16, s[2:3] offset:48
15; GCN-NEXT:    s_waitcnt vmcnt(3)
16; GCN-NEXT:    global_store_dwordx4 v16, v[0:3], s[4:5]
17; GCN-NEXT:    s_waitcnt vmcnt(3)
18; GCN-NEXT:    global_store_dwordx4 v16, v[4:7], s[4:5] offset:16
19; GCN-NEXT:    s_waitcnt vmcnt(3)
20; GCN-NEXT:    global_store_dwordx4 v16, v[8:11], s[4:5] offset:32
21; GCN-NEXT:    s_waitcnt vmcnt(3)
22; GCN-NEXT:    global_store_dwordx4 v16, v[12:15], s[4:5] offset:48
23; GCN-NEXT:    s_endpgm
24bb:
25  %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
26  %tmp2 = zext i32 %tmp to i64
27  %tmp3 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp2
28  %tmp4 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp3, align 16
29  %tmp5 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp2
30  %tmp6 = add nuw nsw i64 %tmp2, 1
31  %tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp6
32  %tmp8 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp7, align 16
33  %tmp9 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp6
34  %tmp10 = add nuw nsw i64 %tmp2, 2
35  %tmp11 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp10
36  %tmp12 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp11, align 16
37  %tmp13 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp10
38  %tmp14 = add nuw nsw i64 %tmp2, 3
39  %tmp15 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp14
40  %tmp16 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp15, align 16
41  %tmp17 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp14
42  store <4 x i32> %tmp4, <4 x i32> addrspace(1)* %tmp5, align 16
43  store <4 x i32> %tmp8, <4 x i32> addrspace(1)* %tmp9, align 16
44  store <4 x i32> %tmp12, <4 x i32> addrspace(1)* %tmp13, align 16
45  store <4 x i32> %tmp16, <4 x i32> addrspace(1)* %tmp17, align 16
46  ret void
47}
48
49define amdgpu_kernel void @scalar_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) {
50; GCN-LABEL: scalar_clause:
51; GCN:       ; %bb.0: ; %bb
52; GCN-NEXT:    s_load_dwordx2 s[16:17], s[0:1], 0x24
53; GCN-NEXT:    s_load_dwordx2 s[18:19], s[0:1], 0x2c
54; GCN-NEXT:    s_waitcnt lgkmcnt(0)
55; GCN-NEXT:    s_load_dwordx4 s[0:3], s[16:17], 0x0
56; GCN-NEXT:    s_load_dwordx4 s[4:7], s[16:17], 0x10
57; GCN-NEXT:    s_load_dwordx4 s[8:11], s[16:17], 0x20
58; GCN-NEXT:    s_load_dwordx4 s[12:15], s[16:17], 0x30
59; GCN-NEXT:    v_mov_b32_e32 v12, s18
60; GCN-NEXT:    s_waitcnt lgkmcnt(0)
61; GCN-NEXT:    v_mov_b32_e32 v0, s0
62; GCN-NEXT:    v_mov_b32_e32 v4, s4
63; GCN-NEXT:    v_mov_b32_e32 v8, s8
64; GCN-NEXT:    v_mov_b32_e32 v13, s19
65; GCN-NEXT:    v_mov_b32_e32 v1, s1
66; GCN-NEXT:    v_mov_b32_e32 v2, s2
67; GCN-NEXT:    v_mov_b32_e32 v3, s3
68; GCN-NEXT:    v_mov_b32_e32 v5, s5
69; GCN-NEXT:    v_mov_b32_e32 v6, s6
70; GCN-NEXT:    v_mov_b32_e32 v7, s7
71; GCN-NEXT:    v_mov_b32_e32 v9, s9
72; GCN-NEXT:    v_mov_b32_e32 v10, s10
73; GCN-NEXT:    v_mov_b32_e32 v11, s11
74; GCN-NEXT:    global_store_dwordx4 v[12:13], v[0:3], off
75; GCN-NEXT:    global_store_dwordx4 v[12:13], v[4:7], off offset:16
76; GCN-NEXT:    global_store_dwordx4 v[12:13], v[8:11], off offset:32
77; GCN-NEXT:    v_mov_b32_e32 v0, s12
78; GCN-NEXT:    v_mov_b32_e32 v1, s13
79; GCN-NEXT:    v_mov_b32_e32 v2, s14
80; GCN-NEXT:    v_mov_b32_e32 v3, s15
81; GCN-NEXT:    global_store_dwordx4 v[12:13], v[0:3], off offset:48
82; GCN-NEXT:    s_endpgm
83bb:
84  %tmp = load <4 x i32>, <4 x i32> addrspace(1)* %arg, align 16
85  %tmp2 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 1
86  %tmp3 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp2, align 16
87  %tmp4 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 1
88  %tmp5 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 2
89  %tmp6 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp5, align 16
90  %tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 2
91  %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 3
92  %tmp9 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp8, align 16
93  %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 3
94  store <4 x i32> %tmp, <4 x i32> addrspace(1)* %arg1, align 16
95  store <4 x i32> %tmp3, <4 x i32> addrspace(1)* %tmp4, align 16
96  store <4 x i32> %tmp6, <4 x i32> addrspace(1)* %tmp7, align 16
97  store <4 x i32> %tmp9, <4 x i32> addrspace(1)* %tmp10, align 16
98  ret void
99}
100
101define void @mubuf_clause(<4 x i32> addrspace(5)* noalias nocapture readonly %arg, <4 x i32> addrspace(5)* noalias nocapture %arg1) {
102; GCN-LABEL: mubuf_clause:
103; GCN:       ; %bb.0: ; %bb
104; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
105; GCN-NEXT:    v_and_b32_e32 v2, 0x3ff, v2
106; GCN-NEXT:    v_lshlrev_b32_e32 v2, 4, v2
107; GCN-NEXT:    v_add_u32_e32 v0, v0, v2
108; GCN-NEXT:    buffer_load_dword v3, v0, s[0:3], 0 offen
109; GCN-NEXT:    buffer_load_dword v4, v0, s[0:3], 0 offen offset:4
110; GCN-NEXT:    buffer_load_dword v5, v0, s[0:3], 0 offen offset:8
111; GCN-NEXT:    buffer_load_dword v6, v0, s[0:3], 0 offen offset:12
112; GCN-NEXT:    buffer_load_dword v7, v0, s[0:3], 0 offen offset:16
113; GCN-NEXT:    buffer_load_dword v8, v0, s[0:3], 0 offen offset:20
114; GCN-NEXT:    buffer_load_dword v9, v0, s[0:3], 0 offen offset:24
115; GCN-NEXT:    buffer_load_dword v10, v0, s[0:3], 0 offen offset:28
116; GCN-NEXT:    buffer_load_dword v11, v0, s[0:3], 0 offen offset:32
117; GCN-NEXT:    buffer_load_dword v12, v0, s[0:3], 0 offen offset:36
118; GCN-NEXT:    buffer_load_dword v13, v0, s[0:3], 0 offen offset:40
119; GCN-NEXT:    buffer_load_dword v14, v0, s[0:3], 0 offen offset:44
120; GCN-NEXT:    buffer_load_dword v15, v0, s[0:3], 0 offen offset:48
121; GCN-NEXT:    buffer_load_dword v16, v0, s[0:3], 0 offen offset:52
122; GCN-NEXT:    buffer_load_dword v17, v0, s[0:3], 0 offen offset:56
123; GCN-NEXT:    v_add_u32_e32 v1, v1, v2
124; GCN-NEXT:    buffer_load_dword v0, v0, s[0:3], 0 offen offset:60
125; GCN-NEXT:    s_waitcnt vmcnt(12)
126; GCN-NEXT:    buffer_store_dword v6, v1, s[0:3], 0 offen offset:12
127; GCN-NEXT:    buffer_store_dword v5, v1, s[0:3], 0 offen offset:8
128; GCN-NEXT:    buffer_store_dword v4, v1, s[0:3], 0 offen offset:4
129; GCN-NEXT:    buffer_store_dword v3, v1, s[0:3], 0 offen
130; GCN-NEXT:    s_waitcnt vmcnt(12)
131; GCN-NEXT:    buffer_store_dword v10, v1, s[0:3], 0 offen offset:28
132; GCN-NEXT:    buffer_store_dword v9, v1, s[0:3], 0 offen offset:24
133; GCN-NEXT:    buffer_store_dword v8, v1, s[0:3], 0 offen offset:20
134; GCN-NEXT:    buffer_store_dword v7, v1, s[0:3], 0 offen offset:16
135; GCN-NEXT:    s_waitcnt vmcnt(12)
136; GCN-NEXT:    buffer_store_dword v14, v1, s[0:3], 0 offen offset:44
137; GCN-NEXT:    buffer_store_dword v13, v1, s[0:3], 0 offen offset:40
138; GCN-NEXT:    buffer_store_dword v12, v1, s[0:3], 0 offen offset:36
139; GCN-NEXT:    buffer_store_dword v11, v1, s[0:3], 0 offen offset:32
140; GCN-NEXT:    s_waitcnt vmcnt(12)
141; GCN-NEXT:    buffer_store_dword v0, v1, s[0:3], 0 offen offset:60
142; GCN-NEXT:    buffer_store_dword v17, v1, s[0:3], 0 offen offset:56
143; GCN-NEXT:    buffer_store_dword v16, v1, s[0:3], 0 offen offset:52
144; GCN-NEXT:    buffer_store_dword v15, v1, s[0:3], 0 offen offset:48
145; GCN-NEXT:    s_waitcnt vmcnt(0)
146; GCN-NEXT:    s_setpc_b64 s[30:31]
147bb:
148  %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
149  %tmp2 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp
150  %tmp3 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp2, align 16
151  %tmp4 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp
152  %tmp5 = add nuw nsw i32 %tmp, 1
153  %tmp6 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp5
154  %tmp7 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp6, align 16
155  %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp5
156  %tmp9 = add nuw nsw i32 %tmp, 2
157  %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp9
158  %tmp11 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp10, align 16
159  %tmp12 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp9
160  %tmp13 = add nuw nsw i32 %tmp, 3
161  %tmp14 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp13
162  %tmp15 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp14, align 16
163  %tmp16 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp13
164  store <4 x i32> %tmp3, <4 x i32> addrspace(5)* %tmp4, align 16
165  store <4 x i32> %tmp7, <4 x i32> addrspace(5)* %tmp8, align 16
166  store <4 x i32> %tmp11, <4 x i32> addrspace(5)* %tmp12, align 16
167  store <4 x i32> %tmp15, <4 x i32> addrspace(5)* %tmp16, align 16
168  ret void
169}
170
171define amdgpu_kernel void @vector_clause_indirect(i64 addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture readnone %arg1, <4 x i32> addrspace(1)* noalias nocapture %arg2) {
172; GCN-LABEL: vector_clause_indirect:
173; GCN:       ; %bb.0: ; %bb
174; GCN-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0x24
175; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x34
176; GCN-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
177; GCN-NEXT:    s_waitcnt lgkmcnt(0)
178; GCN-NEXT:    global_load_dwordx2 v[8:9], v0, s[2:3]
179; GCN-NEXT:    s_waitcnt vmcnt(0)
180; GCN-NEXT:    global_load_dwordx4 v[0:3], v[8:9], off
181; GCN-NEXT:    global_load_dwordx4 v[4:7], v[8:9], off offset:16
182; GCN-NEXT:    v_mov_b32_e32 v9, s5
183; GCN-NEXT:    v_mov_b32_e32 v8, s4
184; GCN-NEXT:    s_waitcnt vmcnt(1)
185; GCN-NEXT:    global_store_dwordx4 v[8:9], v[0:3], off
186; GCN-NEXT:    s_waitcnt vmcnt(1)
187; GCN-NEXT:    global_store_dwordx4 v[8:9], v[4:7], off offset:16
188; GCN-NEXT:    s_endpgm
189bb:
190  %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
191  %tmp3 = zext i32 %tmp to i64
192  %tmp4 = getelementptr inbounds i64, i64 addrspace(1)* %arg, i64 %tmp3
193  %tmp5 = bitcast i64 addrspace(1)* %tmp4 to <4 x i32> addrspace(1)* addrspace(1)*
194  %tmp6 = load <4 x i32> addrspace(1)*, <4 x i32> addrspace(1)* addrspace(1)* %tmp5, align 8
195  %tmp7 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp6, align 16
196  %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %tmp6, i64 1
197  %tmp9 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp8, align 16
198  store <4 x i32> %tmp7, <4 x i32> addrspace(1)* %arg2, align 16
199  %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg2, i64 1
200  store <4 x i32> %tmp9, <4 x i32> addrspace(1)* %tmp10, align 16
201  ret void
202}
203
204define void @load_global_d16_hi(i16 addrspace(1)* %in, i16 %reg, <2 x i16> addrspace(1)* %out) {
205; GCN-LABEL: load_global_d16_hi:
206; GCN:       ; %bb.0: ; %entry
207; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
208; GCN-NEXT:    v_mov_b32_e32 v5, v2
209; GCN-NEXT:    global_load_short_d16_hi v5, v[0:1], off
210; GCN-NEXT:    s_nop 0
211; GCN-NEXT:    global_load_short_d16_hi v2, v[0:1], off offset:64
212; GCN-NEXT:    s_waitcnt vmcnt(1)
213; GCN-NEXT:    global_store_dword v[3:4], v5, off
214; GCN-NEXT:    s_waitcnt vmcnt(1)
215; GCN-NEXT:    global_store_dword v[3:4], v2, off offset:128
216; GCN-NEXT:    s_waitcnt vmcnt(0)
217; GCN-NEXT:    s_setpc_b64 s[30:31]
218entry:
219  %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 32
220  %load1 = load i16, i16 addrspace(1)* %in
221  %load2 = load i16, i16 addrspace(1)* %gep
222  %build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
223  %build1 = insertelement <2 x i16> %build0, i16 %load1, i32 1
224  store <2 x i16> %build1, <2 x i16> addrspace(1)* %out
225  %build2 = insertelement <2 x i16> undef, i16 %reg, i32 0
226  %build3 = insertelement <2 x i16> %build2, i16 %load2, i32 1
227  %gep2 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 32
228  store <2 x i16> %build3, <2 x i16> addrspace(1)* %gep2
229  ret void
230}
231
232define void @load_global_d16_lo(i16 addrspace(1)* %in, i32 %reg, <2 x i16> addrspace(1)* %out) {
233; GCN-LABEL: load_global_d16_lo:
234; GCN:       ; %bb.0: ; %entry
235; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
236; GCN-NEXT:    v_mov_b32_e32 v5, v2
237; GCN-NEXT:    global_load_short_d16 v5, v[0:1], off
238; GCN-NEXT:    s_nop 0
239; GCN-NEXT:    global_load_short_d16 v2, v[0:1], off offset:64
240; GCN-NEXT:    s_waitcnt vmcnt(1)
241; GCN-NEXT:    global_store_dword v[3:4], v5, off
242; GCN-NEXT:    s_waitcnt vmcnt(1)
243; GCN-NEXT:    global_store_dword v[3:4], v2, off offset:128
244; GCN-NEXT:    s_waitcnt vmcnt(0)
245; GCN-NEXT:    s_setpc_b64 s[30:31]
246entry:
247  %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 32
248  %reg.bc1 = bitcast i32 %reg to <2 x i16>
249  %reg.bc2 = bitcast i32 %reg to <2 x i16>
250  %load1 = load i16, i16 addrspace(1)* %in
251  %load2 = load i16, i16 addrspace(1)* %gep
252  %build1 = insertelement <2 x i16> %reg.bc1, i16 %load1, i32 0
253  %build2 = insertelement <2 x i16> %reg.bc2, i16 %load2, i32 0
254  %gep2 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 32
255  store <2 x i16> %build1, <2 x i16> addrspace(1)* %out
256  store <2 x i16> %build2, <2 x i16> addrspace(1)* %gep2
257  ret void
258}
259
260declare i32 @llvm.amdgcn.workitem.id.x()
261