1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -march=amdgcn -mcpu=gfx902 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
3
4define amdgpu_kernel void @vector_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) {
5; GCN-LABEL: vector_clause:
6; GCN:       ; %bb.0: ; %bb
7; GCN-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0x24
8; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x2c
9; GCN-NEXT:    v_lshlrev_b32_e32 v16, 4, v0
10; GCN-NEXT:    s_waitcnt lgkmcnt(0)
11; GCN-NEXT:    global_load_dwordx4 v[0:3], v16, s[2:3]
12; GCN-NEXT:    global_load_dwordx4 v[4:7], v16, s[2:3] offset:16
13; GCN-NEXT:    global_load_dwordx4 v[8:11], v16, s[2:3] offset:32
14; GCN-NEXT:    global_load_dwordx4 v[12:15], v16, s[2:3] offset:48
15; GCN-NEXT:    s_nop 0
16; GCN-NEXT:    s_waitcnt vmcnt(3)
17; GCN-NEXT:    global_store_dwordx4 v16, v[0:3], s[4:5]
18; GCN-NEXT:    s_waitcnt vmcnt(3)
19; GCN-NEXT:    global_store_dwordx4 v16, v[4:7], s[4:5] offset:16
20; GCN-NEXT:    s_waitcnt vmcnt(3)
21; GCN-NEXT:    global_store_dwordx4 v16, v[8:11], s[4:5] offset:32
22; GCN-NEXT:    s_waitcnt vmcnt(3)
23; GCN-NEXT:    global_store_dwordx4 v16, v[12:15], s[4:5] offset:48
24; GCN-NEXT:    s_endpgm
25bb:
26  %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
27  %tmp2 = zext i32 %tmp to i64
28  %tmp3 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp2
29  %tmp4 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp3, align 16
30  %tmp5 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp2
31  %tmp6 = add nuw nsw i64 %tmp2, 1
32  %tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp6
33  %tmp8 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp7, align 16
34  %tmp9 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp6
35  %tmp10 = add nuw nsw i64 %tmp2, 2
36  %tmp11 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp10
37  %tmp12 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp11, align 16
38  %tmp13 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp10
39  %tmp14 = add nuw nsw i64 %tmp2, 3
40  %tmp15 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp14
41  %tmp16 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp15, align 16
42  %tmp17 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp14
43  store <4 x i32> %tmp4, <4 x i32> addrspace(1)* %tmp5, align 16
44  store <4 x i32> %tmp8, <4 x i32> addrspace(1)* %tmp9, align 16
45  store <4 x i32> %tmp12, <4 x i32> addrspace(1)* %tmp13, align 16
46  store <4 x i32> %tmp16, <4 x i32> addrspace(1)* %tmp17, align 16
47  ret void
48}
49
50define amdgpu_kernel void @scalar_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) {
51; GCN-LABEL: scalar_clause:
52; GCN:       ; %bb.0: ; %bb
53; GCN-NEXT:    s_load_dwordx2 s[16:17], s[0:1], 0x24
54; GCN-NEXT:    s_load_dwordx2 s[18:19], s[0:1], 0x2c
55; GCN-NEXT:    s_nop 0
56; GCN-NEXT:    s_waitcnt lgkmcnt(0)
57; GCN-NEXT:    s_load_dwordx4 s[0:3], s[16:17], 0x0
58; GCN-NEXT:    s_load_dwordx4 s[4:7], s[16:17], 0x10
59; GCN-NEXT:    s_load_dwordx4 s[8:11], s[16:17], 0x20
60; GCN-NEXT:    s_load_dwordx4 s[12:15], s[16:17], 0x30
61; GCN-NEXT:    v_mov_b32_e32 v12, s18
62; GCN-NEXT:    s_waitcnt lgkmcnt(0)
63; GCN-NEXT:    v_mov_b32_e32 v0, s0
64; GCN-NEXT:    v_mov_b32_e32 v4, s4
65; GCN-NEXT:    v_mov_b32_e32 v8, s8
66; GCN-NEXT:    v_mov_b32_e32 v13, s19
67; GCN-NEXT:    v_mov_b32_e32 v1, s1
68; GCN-NEXT:    v_mov_b32_e32 v2, s2
69; GCN-NEXT:    v_mov_b32_e32 v3, s3
70; GCN-NEXT:    v_mov_b32_e32 v5, s5
71; GCN-NEXT:    v_mov_b32_e32 v6, s6
72; GCN-NEXT:    v_mov_b32_e32 v7, s7
73; GCN-NEXT:    v_mov_b32_e32 v9, s9
74; GCN-NEXT:    v_mov_b32_e32 v10, s10
75; GCN-NEXT:    v_mov_b32_e32 v11, s11
76; GCN-NEXT:    global_store_dwordx4 v[12:13], v[0:3], off
77; GCN-NEXT:    global_store_dwordx4 v[12:13], v[4:7], off offset:16
78; GCN-NEXT:    global_store_dwordx4 v[12:13], v[8:11], off offset:32
79; GCN-NEXT:    v_mov_b32_e32 v0, s12
80; GCN-NEXT:    v_mov_b32_e32 v1, s13
81; GCN-NEXT:    v_mov_b32_e32 v2, s14
82; GCN-NEXT:    v_mov_b32_e32 v3, s15
83; GCN-NEXT:    global_store_dwordx4 v[12:13], v[0:3], off offset:48
84; GCN-NEXT:    s_endpgm
85bb:
86  %tmp = load <4 x i32>, <4 x i32> addrspace(1)* %arg, align 16
87  %tmp2 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 1
88  %tmp3 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp2, align 16
89  %tmp4 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 1
90  %tmp5 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 2
91  %tmp6 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp5, align 16
92  %tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 2
93  %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 3
94  %tmp9 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp8, align 16
95  %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 3
96  store <4 x i32> %tmp, <4 x i32> addrspace(1)* %arg1, align 16
97  store <4 x i32> %tmp3, <4 x i32> addrspace(1)* %tmp4, align 16
98  store <4 x i32> %tmp6, <4 x i32> addrspace(1)* %tmp7, align 16
99  store <4 x i32> %tmp9, <4 x i32> addrspace(1)* %tmp10, align 16
100  ret void
101}
102
103define void @mubuf_clause(<4 x i32> addrspace(5)* noalias nocapture readonly %arg, <4 x i32> addrspace(5)* noalias nocapture %arg1) {
104; GCN-LABEL: mubuf_clause:
105; GCN:       ; %bb.0: ; %bb
106; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
107; GCN-NEXT:    v_and_b32_e32 v2, 0x3ff, v2
108; GCN-NEXT:    v_lshlrev_b32_e32 v2, 4, v2
109; GCN-NEXT:    v_add_u32_e32 v0, v0, v2
110; GCN-NEXT:    buffer_load_dword v3, v0, s[0:3], 0 offen
111; GCN-NEXT:    buffer_load_dword v4, v0, s[0:3], 0 offen offset:4
112; GCN-NEXT:    buffer_load_dword v5, v0, s[0:3], 0 offen offset:8
113; GCN-NEXT:    buffer_load_dword v6, v0, s[0:3], 0 offen offset:12
114; GCN-NEXT:    buffer_load_dword v7, v0, s[0:3], 0 offen offset:16
115; GCN-NEXT:    buffer_load_dword v8, v0, s[0:3], 0 offen offset:20
116; GCN-NEXT:    buffer_load_dword v9, v0, s[0:3], 0 offen offset:24
117; GCN-NEXT:    buffer_load_dword v10, v0, s[0:3], 0 offen offset:28
118; GCN-NEXT:    buffer_load_dword v11, v0, s[0:3], 0 offen offset:32
119; GCN-NEXT:    buffer_load_dword v12, v0, s[0:3], 0 offen offset:36
120; GCN-NEXT:    buffer_load_dword v13, v0, s[0:3], 0 offen offset:40
121; GCN-NEXT:    buffer_load_dword v14, v0, s[0:3], 0 offen offset:44
122; GCN-NEXT:    buffer_load_dword v15, v0, s[0:3], 0 offen offset:48
123; GCN-NEXT:    buffer_load_dword v16, v0, s[0:3], 0 offen offset:52
124; GCN-NEXT:    buffer_load_dword v17, v0, s[0:3], 0 offen offset:56
125; GCN-NEXT:    v_add_u32_e32 v1, v1, v2
126; GCN-NEXT:    buffer_load_dword v0, v0, s[0:3], 0 offen offset:60
127; GCN-NEXT:    s_nop 0
128; GCN-NEXT:    s_waitcnt vmcnt(15)
129; GCN-NEXT:    buffer_store_dword v3, v1, s[0:3], 0 offen
130; GCN-NEXT:    s_waitcnt vmcnt(15)
131; GCN-NEXT:    buffer_store_dword v4, v1, s[0:3], 0 offen offset:4
132; GCN-NEXT:    s_waitcnt vmcnt(15)
133; GCN-NEXT:    buffer_store_dword v5, v1, s[0:3], 0 offen offset:8
134; GCN-NEXT:    s_waitcnt vmcnt(15)
135; GCN-NEXT:    buffer_store_dword v6, v1, s[0:3], 0 offen offset:12
136; GCN-NEXT:    s_waitcnt vmcnt(15)
137; GCN-NEXT:    buffer_store_dword v7, v1, s[0:3], 0 offen offset:16
138; GCN-NEXT:    s_waitcnt vmcnt(15)
139; GCN-NEXT:    buffer_store_dword v8, v1, s[0:3], 0 offen offset:20
140; GCN-NEXT:    s_waitcnt vmcnt(15)
141; GCN-NEXT:    buffer_store_dword v9, v1, s[0:3], 0 offen offset:24
142; GCN-NEXT:    s_waitcnt vmcnt(15)
143; GCN-NEXT:    buffer_store_dword v10, v1, s[0:3], 0 offen offset:28
144; GCN-NEXT:    s_waitcnt vmcnt(15)
145; GCN-NEXT:    buffer_store_dword v11, v1, s[0:3], 0 offen offset:32
146; GCN-NEXT:    s_waitcnt vmcnt(15)
147; GCN-NEXT:    buffer_store_dword v12, v1, s[0:3], 0 offen offset:36
148; GCN-NEXT:    s_waitcnt vmcnt(15)
149; GCN-NEXT:    buffer_store_dword v13, v1, s[0:3], 0 offen offset:40
150; GCN-NEXT:    s_waitcnt vmcnt(15)
151; GCN-NEXT:    buffer_store_dword v14, v1, s[0:3], 0 offen offset:44
152; GCN-NEXT:    s_waitcnt vmcnt(15)
153; GCN-NEXT:    buffer_store_dword v15, v1, s[0:3], 0 offen offset:48
154; GCN-NEXT:    s_waitcnt vmcnt(15)
155; GCN-NEXT:    buffer_store_dword v16, v1, s[0:3], 0 offen offset:52
156; GCN-NEXT:    s_waitcnt vmcnt(15)
157; GCN-NEXT:    buffer_store_dword v17, v1, s[0:3], 0 offen offset:56
158; GCN-NEXT:    s_waitcnt vmcnt(15)
159; GCN-NEXT:    buffer_store_dword v0, v1, s[0:3], 0 offen offset:60
160; GCN-NEXT:    s_waitcnt vmcnt(0)
161; GCN-NEXT:    s_setpc_b64 s[30:31]
162bb:
163  %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
164  %tmp2 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp
165  %tmp3 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp2, align 16
166  %tmp4 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp
167  %tmp5 = add nuw nsw i32 %tmp, 1
168  %tmp6 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp5
169  %tmp7 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp6, align 16
170  %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp5
171  %tmp9 = add nuw nsw i32 %tmp, 2
172  %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp9
173  %tmp11 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp10, align 16
174  %tmp12 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp9
175  %tmp13 = add nuw nsw i32 %tmp, 3
176  %tmp14 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp13
177  %tmp15 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp14, align 16
178  %tmp16 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp13
179  store <4 x i32> %tmp3, <4 x i32> addrspace(5)* %tmp4, align 16
180  store <4 x i32> %tmp7, <4 x i32> addrspace(5)* %tmp8, align 16
181  store <4 x i32> %tmp11, <4 x i32> addrspace(5)* %tmp12, align 16
182  store <4 x i32> %tmp15, <4 x i32> addrspace(5)* %tmp16, align 16
183  ret void
184}
185
186define amdgpu_kernel void @vector_clause_indirect(i64 addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture readnone %arg1, <4 x i32> addrspace(1)* noalias nocapture %arg2) {
187; GCN-LABEL: vector_clause_indirect:
188; GCN:       ; %bb.0: ; %bb
189; GCN-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0x24
190; GCN-NEXT:    s_load_dwordx2 s[4:5], s[0:1], 0x34
191; GCN-NEXT:    v_lshlrev_b32_e32 v0, 3, v0
192; GCN-NEXT:    s_waitcnt lgkmcnt(0)
193; GCN-NEXT:    global_load_dwordx2 v[8:9], v0, s[2:3]
194; GCN-NEXT:    s_nop 0
195; GCN-NEXT:    s_waitcnt vmcnt(0)
196; GCN-NEXT:    global_load_dwordx4 v[0:3], v[8:9], off
197; GCN-NEXT:    global_load_dwordx4 v[4:7], v[8:9], off offset:16
198; GCN-NEXT:    v_mov_b32_e32 v9, s5
199; GCN-NEXT:    v_mov_b32_e32 v8, s4
200; GCN-NEXT:    s_waitcnt vmcnt(1)
201; GCN-NEXT:    global_store_dwordx4 v[8:9], v[0:3], off
202; GCN-NEXT:    s_waitcnt vmcnt(1)
203; GCN-NEXT:    global_store_dwordx4 v[8:9], v[4:7], off offset:16
204; GCN-NEXT:    s_endpgm
205bb:
206  %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
207  %tmp3 = zext i32 %tmp to i64
208  %tmp4 = getelementptr inbounds i64, i64 addrspace(1)* %arg, i64 %tmp3
209  %tmp5 = bitcast i64 addrspace(1)* %tmp4 to <4 x i32> addrspace(1)* addrspace(1)*
210  %tmp6 = load <4 x i32> addrspace(1)*, <4 x i32> addrspace(1)* addrspace(1)* %tmp5, align 8
211  %tmp7 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp6, align 16
212  %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %tmp6, i64 1
213  %tmp9 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp8, align 16
214  store <4 x i32> %tmp7, <4 x i32> addrspace(1)* %arg2, align 16
215  %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg2, i64 1
216  store <4 x i32> %tmp9, <4 x i32> addrspace(1)* %tmp10, align 16
217  ret void
218}
219
220define void @load_global_d16_hi(i16 addrspace(1)* %in, i16 %reg, <2 x i16> addrspace(1)* %out) {
221; GCN-LABEL: load_global_d16_hi:
222; GCN:       ; %bb.0: ; %entry
223; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
224; GCN-NEXT:    v_mov_b32_e32 v5, v2
225; GCN-NEXT:    global_load_short_d16_hi v5, v[0:1], off
226; GCN-NEXT:    s_nop 0
227; GCN-NEXT:    global_load_short_d16_hi v2, v[0:1], off offset:64
228; GCN-NEXT:    s_nop 0
229; GCN-NEXT:    s_waitcnt vmcnt(1)
230; GCN-NEXT:    global_store_dword v[3:4], v5, off
231; GCN-NEXT:    s_waitcnt vmcnt(1)
232; GCN-NEXT:    global_store_dword v[3:4], v2, off offset:128
233; GCN-NEXT:    s_waitcnt vmcnt(0)
234; GCN-NEXT:    s_setpc_b64 s[30:31]
235entry:
236  %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 32
237  %load1 = load i16, i16 addrspace(1)* %in
238  %load2 = load i16, i16 addrspace(1)* %gep
239  %build0 = insertelement <2 x i16> undef, i16 %reg, i32 0
240  %build1 = insertelement <2 x i16> %build0, i16 %load1, i32 1
241  store <2 x i16> %build1, <2 x i16> addrspace(1)* %out
242  %build2 = insertelement <2 x i16> undef, i16 %reg, i32 0
243  %build3 = insertelement <2 x i16> %build2, i16 %load2, i32 1
244  %gep2 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 32
245  store <2 x i16> %build3, <2 x i16> addrspace(1)* %gep2
246  ret void
247}
248
249define void @load_global_d16_lo(i16 addrspace(1)* %in, i32 %reg, <2 x i16> addrspace(1)* %out) {
250; GCN-LABEL: load_global_d16_lo:
251; GCN:       ; %bb.0: ; %entry
252; GCN-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
253; GCN-NEXT:    v_mov_b32_e32 v5, v2
254; GCN-NEXT:    global_load_short_d16 v5, v[0:1], off
255; GCN-NEXT:    s_nop 0
256; GCN-NEXT:    global_load_short_d16 v2, v[0:1], off offset:64
257; GCN-NEXT:    s_nop 0
258; GCN-NEXT:    s_waitcnt vmcnt(1)
259; GCN-NEXT:    global_store_dword v[3:4], v5, off
260; GCN-NEXT:    s_waitcnt vmcnt(1)
261; GCN-NEXT:    global_store_dword v[3:4], v2, off offset:128
262; GCN-NEXT:    s_waitcnt vmcnt(0)
263; GCN-NEXT:    s_setpc_b64 s[30:31]
264entry:
265  %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 32
266  %reg.bc1 = bitcast i32 %reg to <2 x i16>
267  %reg.bc2 = bitcast i32 %reg to <2 x i16>
268  %load1 = load i16, i16 addrspace(1)* %in
269  %load2 = load i16, i16 addrspace(1)* %gep
270  %build1 = insertelement <2 x i16> %reg.bc1, i16 %load1, i32 0
271  %build2 = insertelement <2 x i16> %reg.bc2, i16 %load2, i32 0
272  %gep2 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 32
273  store <2 x i16> %build1, <2 x i16> addrspace(1)* %out
274  store <2 x i16> %build2, <2 x i16> addrspace(1)* %gep2
275  ret void
276}
277
278declare i32 @llvm.amdgcn.workitem.id.x()
279