1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -march=amdgcn -mcpu=gfx902 -verify-machineinstrs -amdgpu-enable-global-sgpr-addr < %s | FileCheck -check-prefix=GCN %s 3 4define amdgpu_kernel void @vector_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) { 5; GCN-LABEL: vector_clause: 6; GCN: ; %bb.0: ; %bb 7; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 8; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c 9; GCN-NEXT: v_mov_b32_e32 v17, 0 10; GCN-NEXT: v_lshlrev_b32_e32 v16, 4, v0 11; GCN-NEXT: s_nop 0 12; GCN-NEXT: s_waitcnt lgkmcnt(0) 13; GCN-NEXT: s_nop 0 14; GCN-NEXT: global_load_dwordx4 v[0:3], v[16:17], s[2:3] 15; GCN-NEXT: global_load_dwordx4 v[4:7], v[16:17], s[2:3] offset:16 16; GCN-NEXT: global_load_dwordx4 v[8:11], v[16:17], s[2:3] offset:32 17; GCN-NEXT: global_load_dwordx4 v[12:15], v[16:17], s[2:3] offset:48 18; GCN-NEXT: s_nop 0 19; GCN-NEXT: s_waitcnt vmcnt(3) 20; GCN-NEXT: s_nop 0 21; GCN-NEXT: global_store_dwordx4 v[16:17], v[0:3], s[4:5] 22; GCN-NEXT: s_waitcnt vmcnt(3) 23; GCN-NEXT: global_store_dwordx4 v[16:17], v[4:7], s[4:5] offset:16 24; GCN-NEXT: s_waitcnt vmcnt(3) 25; GCN-NEXT: global_store_dwordx4 v[16:17], v[8:11], s[4:5] offset:32 26; GCN-NEXT: s_waitcnt vmcnt(3) 27; GCN-NEXT: global_store_dwordx4 v[16:17], v[12:15], s[4:5] offset:48 28; GCN-NEXT: s_endpgm 29bb: 30 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x() 31 %tmp2 = zext i32 %tmp to i64 32 %tmp3 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp2 33 %tmp4 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp3, align 16 34 %tmp5 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp2 35 %tmp6 = add nuw nsw i64 %tmp2, 1 36 %tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp6 37 %tmp8 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp7, align 16 38 %tmp9 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp6 39 %tmp10 = add nuw nsw i64 %tmp2, 2 40 %tmp11 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp10 41 %tmp12 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp11, align 16 42 %tmp13 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp10 43 %tmp14 = add nuw nsw i64 %tmp2, 3 44 %tmp15 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 %tmp14 45 %tmp16 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp15, align 16 46 %tmp17 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 %tmp14 47 store <4 x i32> %tmp4, <4 x i32> addrspace(1)* %tmp5, align 16 48 store <4 x i32> %tmp8, <4 x i32> addrspace(1)* %tmp9, align 16 49 store <4 x i32> %tmp12, <4 x i32> addrspace(1)* %tmp13, align 16 50 store <4 x i32> %tmp16, <4 x i32> addrspace(1)* %tmp17, align 16 51 ret void 52} 53 54define amdgpu_kernel void @scalar_clause(<4 x i32> addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture %arg1) { 55; GCN-LABEL: scalar_clause: 56; GCN: ; %bb.0: ; %bb 57; GCN-NEXT: s_load_dwordx2 s[16:17], s[0:1], 0x24 58; GCN-NEXT: s_load_dwordx2 s[18:19], s[0:1], 0x2c 59; GCN-NEXT: s_nop 0 60; GCN-NEXT: s_waitcnt lgkmcnt(0) 61; GCN-NEXT: s_load_dwordx4 s[0:3], s[16:17], 0x0 62; GCN-NEXT: s_load_dwordx4 s[4:7], s[16:17], 0x10 63; GCN-NEXT: s_load_dwordx4 s[8:11], s[16:17], 0x20 64; GCN-NEXT: s_load_dwordx4 s[12:15], s[16:17], 0x30 65; GCN-NEXT: v_mov_b32_e32 v12, s18 66; GCN-NEXT: s_waitcnt lgkmcnt(0) 67; GCN-NEXT: v_mov_b32_e32 v0, s0 68; GCN-NEXT: v_mov_b32_e32 v4, s4 69; GCN-NEXT: v_mov_b32_e32 v8, s8 70; GCN-NEXT: v_mov_b32_e32 v13, s19 71; GCN-NEXT: v_mov_b32_e32 v1, s1 72; GCN-NEXT: v_mov_b32_e32 v2, s2 73; GCN-NEXT: v_mov_b32_e32 v3, s3 74; GCN-NEXT: v_mov_b32_e32 v5, s5 75; GCN-NEXT: v_mov_b32_e32 v6, s6 76; GCN-NEXT: v_mov_b32_e32 v7, s7 77; GCN-NEXT: s_nop 0 78; GCN-NEXT: s_nop 0 79; GCN-NEXT: global_store_dwordx4 v[12:13], v[0:3], off 80; GCN-NEXT: global_store_dwordx4 v[12:13], v[4:7], off offset:16 81; GCN-NEXT: v_mov_b32_e32 v0, s12 82; GCN-NEXT: v_mov_b32_e32 v9, s9 83; GCN-NEXT: v_mov_b32_e32 v10, s10 84; GCN-NEXT: v_mov_b32_e32 v11, s11 85; GCN-NEXT: v_mov_b32_e32 v1, s13 86; GCN-NEXT: v_mov_b32_e32 v2, s14 87; GCN-NEXT: v_mov_b32_e32 v3, s15 88; GCN-NEXT: s_nop 0 89; GCN-NEXT: s_nop 0 90; GCN-NEXT: global_store_dwordx4 v[12:13], v[8:11], off offset:32 91; GCN-NEXT: global_store_dwordx4 v[12:13], v[0:3], off offset:48 92; GCN-NEXT: s_endpgm 93bb: 94 %tmp = load <4 x i32>, <4 x i32> addrspace(1)* %arg, align 16 95 %tmp2 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 1 96 %tmp3 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp2, align 16 97 %tmp4 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 1 98 %tmp5 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 2 99 %tmp6 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp5, align 16 100 %tmp7 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 2 101 %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg, i64 3 102 %tmp9 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp8, align 16 103 %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg1, i64 3 104 store <4 x i32> %tmp, <4 x i32> addrspace(1)* %arg1, align 16 105 store <4 x i32> %tmp3, <4 x i32> addrspace(1)* %tmp4, align 16 106 store <4 x i32> %tmp6, <4 x i32> addrspace(1)* %tmp7, align 16 107 store <4 x i32> %tmp9, <4 x i32> addrspace(1)* %tmp10, align 16 108 ret void 109} 110 111define void @mubuf_clause(<4 x i32> addrspace(5)* noalias nocapture readonly %arg, <4 x i32> addrspace(5)* noalias nocapture %arg1) { 112; GCN-LABEL: mubuf_clause: 113; GCN: ; %bb.0: ; %bb 114; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 115; GCN-NEXT: v_and_b32_e32 v2, 0x3ff, v2 116; GCN-NEXT: v_lshlrev_b32_e32 v2, 4, v2 117; GCN-NEXT: v_add_u32_e32 v0, v0, v2 118; GCN-NEXT: v_add_u32_e32 v1, v1, v2 119; GCN-NEXT: s_nop 0 120; GCN-NEXT: s_nop 0 121; GCN-NEXT: buffer_load_dword v6, v0, s[0:3], 0 offen offset:20 122; GCN-NEXT: buffer_load_dword v7, v0, s[0:3], 0 offen offset:24 123; GCN-NEXT: buffer_load_dword v8, v0, s[0:3], 0 offen offset:28 124; GCN-NEXT: buffer_load_dword v9, v0, s[0:3], 0 offen offset:32 125; GCN-NEXT: buffer_load_dword v10, v0, s[0:3], 0 offen offset:36 126; GCN-NEXT: buffer_load_dword v11, v0, s[0:3], 0 offen offset:40 127; GCN-NEXT: buffer_load_dword v12, v0, s[0:3], 0 offen offset:44 128; GCN-NEXT: buffer_load_dword v13, v0, s[0:3], 0 offen offset:48 129; GCN-NEXT: buffer_load_dword v14, v0, s[0:3], 0 offen offset:52 130; GCN-NEXT: buffer_load_dword v15, v0, s[0:3], 0 offen offset:56 131; GCN-NEXT: buffer_load_dword v16, v0, s[0:3], 0 offen offset:60 132; GCN-NEXT: buffer_load_dword v2, v0, s[0:3], 0 offen 133; GCN-NEXT: buffer_load_dword v3, v0, s[0:3], 0 offen offset:4 134; GCN-NEXT: buffer_load_dword v4, v0, s[0:3], 0 offen offset:8 135; GCN-NEXT: buffer_load_dword v5, v0, s[0:3], 0 offen offset:12 136; GCN-NEXT: s_nop 0 137; GCN-NEXT: s_nop 0 138; GCN-NEXT: buffer_load_dword v0, v0, s[0:3], 0 offen offset:16 139; GCN-NEXT: s_nop 0 140; GCN-NEXT: s_waitcnt vmcnt(4) 141; GCN-NEXT: s_nop 0 142; GCN-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen 143; GCN-NEXT: s_waitcnt vmcnt(4) 144; GCN-NEXT: buffer_store_dword v3, v1, s[0:3], 0 offen offset:4 145; GCN-NEXT: s_waitcnt vmcnt(4) 146; GCN-NEXT: buffer_store_dword v4, v1, s[0:3], 0 offen offset:8 147; GCN-NEXT: s_waitcnt vmcnt(4) 148; GCN-NEXT: buffer_store_dword v5, v1, s[0:3], 0 offen offset:12 149; GCN-NEXT: s_waitcnt vmcnt(4) 150; GCN-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen offset:16 151; GCN-NEXT: buffer_store_dword v6, v1, s[0:3], 0 offen offset:20 152; GCN-NEXT: buffer_store_dword v7, v1, s[0:3], 0 offen offset:24 153; GCN-NEXT: buffer_store_dword v8, v1, s[0:3], 0 offen offset:28 154; GCN-NEXT: buffer_store_dword v9, v1, s[0:3], 0 offen offset:32 155; GCN-NEXT: buffer_store_dword v10, v1, s[0:3], 0 offen offset:36 156; GCN-NEXT: buffer_store_dword v11, v1, s[0:3], 0 offen offset:40 157; GCN-NEXT: buffer_store_dword v12, v1, s[0:3], 0 offen offset:44 158; GCN-NEXT: buffer_store_dword v13, v1, s[0:3], 0 offen offset:48 159; GCN-NEXT: buffer_store_dword v14, v1, s[0:3], 0 offen offset:52 160; GCN-NEXT: buffer_store_dword v15, v1, s[0:3], 0 offen offset:56 161; GCN-NEXT: buffer_store_dword v16, v1, s[0:3], 0 offen offset:60 162; GCN-NEXT: s_waitcnt vmcnt(0) 163; GCN-NEXT: s_setpc_b64 s[30:31] 164bb: 165 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x() 166 %tmp2 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp 167 %tmp3 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp2, align 16 168 %tmp4 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp 169 %tmp5 = add nuw nsw i32 %tmp, 1 170 %tmp6 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp5 171 %tmp7 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp6, align 16 172 %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp5 173 %tmp9 = add nuw nsw i32 %tmp, 2 174 %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp9 175 %tmp11 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp10, align 16 176 %tmp12 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp9 177 %tmp13 = add nuw nsw i32 %tmp, 3 178 %tmp14 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg, i32 %tmp13 179 %tmp15 = load <4 x i32>, <4 x i32> addrspace(5)* %tmp14, align 16 180 %tmp16 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(5)* %arg1, i32 %tmp13 181 store <4 x i32> %tmp3, <4 x i32> addrspace(5)* %tmp4, align 16 182 store <4 x i32> %tmp7, <4 x i32> addrspace(5)* %tmp8, align 16 183 store <4 x i32> %tmp11, <4 x i32> addrspace(5)* %tmp12, align 16 184 store <4 x i32> %tmp15, <4 x i32> addrspace(5)* %tmp16, align 16 185 ret void 186} 187 188define amdgpu_kernel void @vector_clause_indirect(i64 addrspace(1)* noalias nocapture readonly %arg, <4 x i32> addrspace(1)* noalias nocapture readnone %arg1, <4 x i32> addrspace(1)* noalias nocapture %arg2) { 189; GCN-LABEL: vector_clause_indirect: 190; GCN: ; %bb.0: ; %bb 191; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 192; GCN-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34 193; GCN-NEXT: v_mov_b32_e32 v1, 0 194; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0 195; GCN-NEXT: s_nop 0 196; GCN-NEXT: s_waitcnt lgkmcnt(0) 197; GCN-NEXT: s_nop 0 198; GCN-NEXT: global_load_dwordx2 v[8:9], v[0:1], s[2:3] 199; GCN-NEXT: s_nop 0 200; GCN-NEXT: s_waitcnt vmcnt(0) 201; GCN-NEXT: s_nop 0 202; GCN-NEXT: global_load_dwordx4 v[0:3], v[8:9], off 203; GCN-NEXT: global_load_dwordx4 v[4:7], v[8:9], off offset:16 204; GCN-NEXT: v_mov_b32_e32 v9, s5 205; GCN-NEXT: v_mov_b32_e32 v8, s4 206; GCN-NEXT: s_nop 0 207; GCN-NEXT: s_waitcnt vmcnt(1) 208; GCN-NEXT: s_nop 0 209; GCN-NEXT: global_store_dwordx4 v[8:9], v[0:3], off 210; GCN-NEXT: s_waitcnt vmcnt(1) 211; GCN-NEXT: global_store_dwordx4 v[8:9], v[4:7], off offset:16 212; GCN-NEXT: s_endpgm 213bb: 214 %tmp = tail call i32 @llvm.amdgcn.workitem.id.x() 215 %tmp3 = zext i32 %tmp to i64 216 %tmp4 = getelementptr inbounds i64, i64 addrspace(1)* %arg, i64 %tmp3 217 %tmp5 = bitcast i64 addrspace(1)* %tmp4 to <4 x i32> addrspace(1)* addrspace(1)* 218 %tmp6 = load <4 x i32> addrspace(1)*, <4 x i32> addrspace(1)* addrspace(1)* %tmp5, align 8 219 %tmp7 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp6, align 16 220 %tmp8 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %tmp6, i64 1 221 %tmp9 = load <4 x i32>, <4 x i32> addrspace(1)* %tmp8, align 16 222 store <4 x i32> %tmp7, <4 x i32> addrspace(1)* %arg2, align 16 223 %tmp10 = getelementptr inbounds <4 x i32>, <4 x i32> addrspace(1)* %arg2, i64 1 224 store <4 x i32> %tmp9, <4 x i32> addrspace(1)* %tmp10, align 16 225 ret void 226} 227 228define void @load_global_d16_hi(i16 addrspace(1)* %in, i16 %reg, <2 x i16> addrspace(1)* %out) { 229; GCN-LABEL: load_global_d16_hi: 230; GCN: ; %bb.0: ; %entry 231; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 232; GCN-NEXT: v_mov_b32_e32 v5, v2 233; GCN-NEXT: s_nop 0 234; GCN-NEXT: s_nop 0 235; GCN-NEXT: global_load_short_d16_hi v5, v[0:1], off 236; GCN-NEXT: s_nop 0 237; GCN-NEXT: s_nop 0 238; GCN-NEXT: global_load_short_d16_hi v2, v[0:1], off offset:64 239; GCN-NEXT: s_nop 0 240; GCN-NEXT: s_waitcnt vmcnt(1) 241; GCN-NEXT: s_nop 0 242; GCN-NEXT: global_store_dword v[3:4], v5, off 243; GCN-NEXT: s_waitcnt vmcnt(1) 244; GCN-NEXT: global_store_dword v[3:4], v2, off offset:128 245; GCN-NEXT: s_waitcnt vmcnt(0) 246; GCN-NEXT: s_setpc_b64 s[30:31] 247entry: 248 %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 32 249 %load1 = load i16, i16 addrspace(1)* %in 250 %load2 = load i16, i16 addrspace(1)* %gep 251 %build0 = insertelement <2 x i16> undef, i16 %reg, i32 0 252 %build1 = insertelement <2 x i16> %build0, i16 %load1, i32 1 253 store <2 x i16> %build1, <2 x i16> addrspace(1)* %out 254 %build2 = insertelement <2 x i16> undef, i16 %reg, i32 0 255 %build3 = insertelement <2 x i16> %build2, i16 %load2, i32 1 256 %gep2 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 32 257 store <2 x i16> %build3, <2 x i16> addrspace(1)* %gep2 258 ret void 259} 260 261define void @load_global_d16_lo(i16 addrspace(1)* %in, i32 %reg, <2 x i16> addrspace(1)* %out) { 262; GCN-LABEL: load_global_d16_lo: 263; GCN: ; %bb.0: ; %entry 264; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) 265; GCN-NEXT: v_mov_b32_e32 v5, v2 266; GCN-NEXT: s_nop 0 267; GCN-NEXT: s_nop 0 268; GCN-NEXT: global_load_short_d16 v5, v[0:1], off 269; GCN-NEXT: s_nop 0 270; GCN-NEXT: s_nop 0 271; GCN-NEXT: global_load_short_d16 v2, v[0:1], off offset:64 272; GCN-NEXT: s_nop 0 273; GCN-NEXT: s_waitcnt vmcnt(1) 274; GCN-NEXT: s_nop 0 275; GCN-NEXT: global_store_dword v[3:4], v5, off 276; GCN-NEXT: s_waitcnt vmcnt(1) 277; GCN-NEXT: global_store_dword v[3:4], v2, off offset:128 278; GCN-NEXT: s_waitcnt vmcnt(0) 279; GCN-NEXT: s_setpc_b64 s[30:31] 280entry: 281 %gep = getelementptr inbounds i16, i16 addrspace(1)* %in, i64 32 282 %reg.bc1 = bitcast i32 %reg to <2 x i16> 283 %reg.bc2 = bitcast i32 %reg to <2 x i16> 284 %load1 = load i16, i16 addrspace(1)* %in 285 %load2 = load i16, i16 addrspace(1)* %gep 286 %build1 = insertelement <2 x i16> %reg.bc1, i16 %load1, i32 0 287 %build2 = insertelement <2 x i16> %reg.bc2, i16 %load2, i32 0 288 %gep2 = getelementptr inbounds <2 x i16>, <2 x i16> addrspace(1)* %out, i64 32 289 store <2 x i16> %build1, <2 x i16> addrspace(1)* %out 290 store <2 x i16> %build2, <2 x i16> addrspace(1)* %gep2 291 ret void 292} 293 294declare i32 @llvm.amdgcn.workitem.id.x() 295