1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -mtriple=amdgcn-- -amdgpu-lower-module-lds < %s | FileCheck -check-prefix=OPT %s
3; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-module-lds < %s | FileCheck -check-prefix=OPT %s
4; RUN: llc -march=amdgcn -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
5
6; Check that module LDS is allocated at address 0 and kernel starts its
7; allocation past module LDS.
8
9@lds.size.1.align.1 = internal unnamed_addr addrspace(3) global [1 x i8] undef, align 1
10@lds.size.16.align.16 = internal unnamed_addr addrspace(3) global [16 x i8] undef, align 16
11
12; GCN-LABEL: {{^}}k0:
13; GCN-DAG: v_mov_b32_e32 [[NULL:v[0-9]+]], 0
14; GCN-DAG: v_mov_b32_e32 [[ONE:v[0-9]+]], 1
15; GCN:     ds_write_b8 [[NULL]], [[ONE]]
16; GCN:     v_mov_b32_e32 [[TWO:v[0-9]+]], 2
17; GCN:     ds_write_b8 [[NULL]], [[TWO]] offset:16
18define amdgpu_kernel void @k0() {
19; OPT-LABEL: @k0(
20; OPT-NEXT:    call void @llvm.donothing() [ "ExplicitUse"([[LLVM_AMDGCN_MODULE_LDS_T:%.*]] addrspace(3)* @llvm.amdgcn.module.lds) ]
21; OPT-NEXT:    [[LDS_SIZE_1_ALIGN_1_BC:%.*]] = bitcast [1 x i8] addrspace(3)* getelementptr inbounds ([[LLVM_AMDGCN_MODULE_LDS_T]], [[LLVM_AMDGCN_MODULE_LDS_T]] addrspace(3)* @llvm.amdgcn.module.lds, i32 0, i32 0) to i8 addrspace(3)*
22; OPT-NEXT:    store i8 1, i8 addrspace(3)* [[LDS_SIZE_1_ALIGN_1_BC]], align 1
23; OPT-NEXT:    [[LDS_SIZE_16_ALIGN_16_BC:%.*]] = bitcast [16 x i8] addrspace(3)* getelementptr inbounds ([[LLVM_AMDGCN_KERNEL_K0_LDS_T:%.*]], [[LLVM_AMDGCN_KERNEL_K0_LDS_T]] addrspace(3)* @llvm.amdgcn.kernel.k0.lds, i32 0, i32 0) to i8 addrspace(3)*
24; OPT-NEXT:    store i8 2, i8 addrspace(3)* [[LDS_SIZE_16_ALIGN_16_BC]], align 16
25; OPT-NEXT:    ret void
26;
27  %lds.size.1.align.1.bc = bitcast [1 x i8] addrspace(3)* @lds.size.1.align.1 to i8 addrspace(3)*
28  store i8 1, i8 addrspace(3)* %lds.size.1.align.1.bc, align 1
29  %lds.size.16.align.16.bc = bitcast [16 x i8] addrspace(3)* @lds.size.16.align.16 to i8 addrspace(3)*
30  store i8 2, i8 addrspace(3)* %lds.size.16.align.16.bc, align 16
31  ret void
32}
33
34; GCN-LABEL: {{^}}f0:
35; GCN-DAG: v_mov_b32_e32 [[NULL:v[0-9]+]], 0
36; GCN-DAG: v_mov_b32_e32 [[TREE:v[0-9]+]], 3
37; GCN:     ds_write_b8 [[NULL]], [[TREE]]
38define void @f0() {
39; OPT-LABEL: @f0(
40; OPT-NEXT:    [[LDS_SIZE_1_ALIGN_1_BC:%.*]] = bitcast [1 x i8] addrspace(3)* getelementptr inbounds ([[LLVM_AMDGCN_MODULE_LDS_T:%.*]], [[LLVM_AMDGCN_MODULE_LDS_T]] addrspace(3)* @llvm.amdgcn.module.lds, i32 0, i32 0) to i8 addrspace(3)*
41; OPT-NEXT:    store i8 3, i8 addrspace(3)* [[LDS_SIZE_1_ALIGN_1_BC]], align 1
42; OPT-NEXT:    ret void
43;
44  %lds.size.1.align.1.bc = bitcast [1 x i8] addrspace(3)* @lds.size.1.align.1 to i8 addrspace(3)*
45  store i8 3, i8 addrspace(3)* %lds.size.1.align.1.bc, align 1
46  ret void
47}
48