1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs < %s | FileCheck %s
3
4; This example used to produce a verifier error resulting from the
5; register coalescer leaving behind a false live interval when a live
6; out copy introduced new liveness for a subregister.
7
8define <3 x float> @liveout_undef_subrange(<3 x float> %arg) {
9; CHECK-LABEL: liveout_undef_subrange:
10; CHECK:       ; %bb.0: ; %bb
11; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12; CHECK-NEXT:    v_add_f32_e32 v3, v2, v2
13; CHECK-NEXT:    v_add_f32_e32 v1, v1, v1
14; CHECK-NEXT:    v_add_f32_e32 v0, v0, v0
15; CHECK-NEXT:  .LBB0_1: ; %bb1
16; CHECK-NEXT:    ; =>This Loop Header: Depth=1
17; CHECK-NEXT:    ; Child Loop BB0_2 Depth 2
18; CHECK-NEXT:    s_mov_b64 s[4:5], 0
19; CHECK-NEXT:  .LBB0_2: ; %bb1
20; CHECK-NEXT:    ; Parent Loop BB0_1 Depth=1
21; CHECK-NEXT:    ; => This Inner Loop Header: Depth=2
22; CHECK-NEXT:    v_cmp_neq_f32_e32 vcc, 0, v2
23; CHECK-NEXT:    s_or_b64 s[4:5], vcc, s[4:5]
24; CHECK-NEXT:    s_andn2_b64 exec, exec, s[4:5]
25; CHECK-NEXT:    s_cbranch_execnz .LBB0_2
26; CHECK-NEXT:  ; %bb.3: ; %bb2
27; CHECK-NEXT:    ; in Loop: Header=BB0_1 Depth=1
28; CHECK-NEXT:    s_or_b64 exec, exec, s[4:5]
29; CHECK-NEXT:    v_mul_f32_e32 v2, v3, v2
30; CHECK-NEXT:    s_branch .LBB0_1
31bb:
32  br label %bb1
33
34bb1:                                              ; preds = %bb3, %bb
35  %i = phi <3 x float> [ %arg, %bb ], [ %i11, %bb3 ]
36  %i2 = extractelement <3 x float> %i, i64 2
37  %i3 = fmul float %i2, 1.000000e+00
38  %i4 = fmul nsz <3 x float> %arg, <float 2.000000e+00, float 2.000000e+00, float 2.000000e+00>
39  %i5 = insertelement <3 x float> undef, float %i3, i32 0
40  %i6 = shufflevector <3 x float> %i5, <3 x float> undef, <3 x i32> zeroinitializer
41  %i7 = fmul <3 x float> %i4, %i6
42  %i8 = fcmp oeq float %i3, 0.000000e+00
43  br i1 %i8, label %bb3, label %bb2
44
45bb2:                                              ; preds = %bb1
46  br label %bb3
47
48bb3:                                             ; preds = %bb2, %bb1
49  %i11 = phi <3 x float> [ %i7, %bb2 ], [ %i, %bb1 ]
50  br label %bb1
51}
52